val va_quick_Loop_rounds_3_7_11_body
      (i: nat)
      (msg: va_operand_vec_opr)
      (in_b: buffer128)
      (offset: nat)
    : (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg))
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
  : (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
  (va_QProc (va_code_Loop_rounds_3_7_11_body i msg) ([va_Mod_reg 4; va_mod_vec_opr msg])
    (va_wp_Loop_rounds_3_7_11_body i msg in_b offset) (va_wpProof_Loop_rounds_3_7_11_body i msg
    in_b offset))
val va_quick_Loop_rounds_3_7_11_body
      (i: nat)
      (msg: va_operand_vec_opr)
      (in_b: buffer128)
      (offset: nat)
    : (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg))
let va_quick_Loop_rounds_3_7_11_body
      (i: nat)
      (msg: va_operand_vec_opr)
      (in_b: buffer128)
      (offset: nat)
    : (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg)) =
(va_QProc (va_code_Loop_rounds_3_7_11_body i msg)
    ([va_Mod_reg 4; va_mod_vec_opr msg])
    (va_wp_Loop_rounds_3_7_11_body i msg in_b offset)
    (va_wpProof_Loop_rounds_3_7_11_body i msg in_b offset))
Vale.SHA.PPC64LE.Rounds.Core.fsti.checked
Vale.SHA2.Wrapper.fsti.checked Vale.SHA.PPC64LE.SHA_helpers.fsti.checked Vale.PPC64LE.State.fsti.checked Vale.PPC64LE.Stack_i.fsti.checked Vale.PPC64LE.QuickCodes.fsti.checked Vale.PPC64LE.QuickCode.fst.checked Vale.PPC64LE.Memory.fsti.checked Vale.PPC64LE.Machine_s.fst.checked Vale.PPC64LE.InsVector.fsti.checked Vale.PPC64LE.InsStack.fsti.checked Vale.PPC64LE.InsMem.fsti.checked Vale.PPC64LE.InsBasic.fsti.checked Vale.PPC64LE.Decls.fsti.checked Vale.Def.Words_s.fsti.checked Vale.Def.Words.Seq_s.fsti.checked Vale.Def.Types_s.fst.checked Vale.Def.Opaque_s.fsti.checked Vale.Arch.Types.fsti.checked Vale.Arch.HeapImpl.fsti.checked Spec.SHA2.fsti.checked Spec.Loops.fst.checked Spec.Hash.Definitions.fst.checked Spec.Agile.Hash.fsti.checked prims.fst.checked FStar.Seq.Base.fsti.checked FStar.Seq.fst.checked FStar.Pervasives.Native.fst.checked FStar.Pervasives.fsti.checked
Vale.SHA.PPC64LE.Rounds.Core.fsti
Prims.nat Vale.PPC64LE.Decls.va_operand_vec_opr Vale.PPC64LE.Memory.buffer128 Vale.PPC64LE.QuickCode.va_QProc Prims.unit Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_3_7_11_body Prims.Cons Vale.PPC64LE.QuickCode.mod_t Vale.PPC64LE.QuickCode.va_Mod_reg Vale.PPC64LE.QuickCode.va_mod_vec_opr Prims.Nil Vale.SHA.PPC64LE.Rounds.Core.va_wp_Loop_rounds_3_7_11_body Vale.SHA.PPC64LE.Rounds.Core.va_wpProof_Loop_rounds_3_7_11_body Vale.PPC64LE.QuickCode.va_quickCode
module Vale.SHA.PPC64LE.Rounds.Core
open Vale.Def.Opaque_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.Memory
open Vale.PPC64LE.Stack_i
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
open Vale.PPC64LE.QuickCodes
open Vale.PPC64LE.InsBasic
open Vale.PPC64LE.InsMem
open Vale.PPC64LE.InsStack
open Vale.PPC64LE.InsVector
open Vale.SHA.PPC64LE.SHA_helpers
open Spec.SHA2
open Spec.Agile.Hash
open Spec.Hash.Definitions
open Spec.Loops
open Vale.SHA2.Wrapper
#reset-options "--z3rlimit 2000"
//-- Loop_rounds_3_7_11_body

val va_code_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_code

val va_codegen_success_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> Tot va_pbool

val va_lemma_Loop_rounds_3_7_11_body : va_b0:va_code -> va_s0:va_state -> i:nat ->
  msg:va_operand_vec_opr -> in_b:buffer128 -> offset:nat
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Loop_rounds_3_7_11_body i msg) va_s0 /\
    va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
    `op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
    (va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
    Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64)))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
    (Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
    va_sM == va_get_reg 4 va_s0 + 16) /\ va_state_eq va_sM (va_update_reg 4 va_sM (va_update_ok
    va_sM (va_update_operand_vec_opr msg va_sM va_s0)))))
[@ va_qattr]
let va_wp_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
  (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
  (va_is_dst_vec_opr msg va_s0 /\ va_get_ok va_s0 /\ (l_and (l_and (0 <= i) (i < 15)) (i
    `op_Modulus` 4 == 3) /\ msg == i + 1 /\ Vale.PPC64LE.Decls.validSrcAddrsOffset128
    (va_get_mem_heaplet 0 va_s0) (va_get_reg 4 va_s0) in_b offset 1 (va_get_mem_layout va_s0)
    Secret /\ va_get_reg 4 va_s0 + 16 < pow2_64) /\ (forall (va_x_msg:va_value_vec_opr)
    (va_x_r4:nat64) . let va_sM = va_upd_reg 4 va_x_r4 (va_upd_operand_vec_opr msg va_x_msg va_s0)
    in va_get_ok va_sM /\ (va_eval_vec_opr va_sM msg == Vale.Def.Types_s.reverse_bytes_quad32
    (Vale.PPC64LE.Decls.buffer128_read in_b offset (va_get_mem_heaplet 0 va_sM)) /\ va_get_reg 4
    va_sM == va_get_reg 4 va_s0 + 16) ==> va_k va_sM (())))

val va_wpProof_Loop_rounds_3_7_11_body : i:nat -> msg:va_operand_vec_opr -> in_b:buffer128 ->
  offset:nat -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
  -> Ghost (va_state & va_fuel & unit)
  (requires (va_t_require va_s0 /\ va_wp_Loop_rounds_3_7_11_body i msg in_b offset va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop_rounds_3_7_11_body i msg)
    ([va_Mod_reg 4; va_mod_vec_opr msg]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Loop_rounds_3_7_11_body (i:nat) (msg:va_operand_vec_opr) (in_b:buffer128) (offset:nat)
val va_quick_Loop_rounds_3_7_11_body
      (i: nat)
      (msg: va_operand_vec_opr)
      (in_b: buffer128)
      (offset: nat)
    : (va_quickCode unit (va_code_Loop_rounds_3_7_11_body i msg))

    i: Prims.nat ->
    msg: Vale.PPC64LE.Decls.va_operand_vec_opr ->
    in_b: Vale.PPC64LE.Memory.buffer128 ->
    offset: Prims.nat
  -> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
      (Vale.SHA.PPC64LE.Rounds.Core.va_code_Loop_rounds_3_7_11_body i msg)