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## 2.5.1 Memory subsystem topology 

The z14 ZR1 memory subsystem uses high-speed, differential-ended communications memory channels. An overview of the CPC drawer memory topology of a z14 ZR1 server is shown in Figure 2-16. 

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The CPC drawer includes 5, 10, 15, or 20 DIMMs (up to four populated memory banks). DIMMs are connected to the memory control unit (MCU) on each PU SCM. Each PU SCM has one MCU, which uses five channels: one DIMM per channel, which implements a RAIM protection scheme (4 +1 design). Each CPC drawer can have one, two, or four populated memory banks. 

DIMMs are used in 32, 64, 128, 256, and 512 GB sizes with five DIMMs of the same size included in a memory feature (160, 320, 640, 1280, and 2560 GB RAIM array size). 

## 2.5.2 Redundant array of independent memory 

The z14 ZR1 server uses the RAIM protection scheme against hardware memory failures. The RAIM design detects and recovers from failures of dynamic random access memory (DRAM), sockets, memory channels, or DIMMs. 

