## 2.3.2 Processor memory 

The DS8888F, DS8886F, and DS8886 configurations offer up to 2 TB of total system memory. 

The DS8884F and DS8884 configuration offers up to 256 GB total. Each processor complex contains half of the total system memory. All memory that is installed in each CPC is accessible to all processors in that CPC. The absolute addresses that are assigned to the memory are common across all processors in the CPC. The set of processors is referred to as a symmetric multiprocessor (SMP) system. 

The POWER8 processor that is used in the DS8880 operates in simultaneous multithreading (SMT) mode, which executes multiple instruction streams in parallel. The number of simultaneous instruction streams varies according to processor and Licensed Internal Code (LIC) level. SMT mode enables the POWER8 processor to maximize the throughput of the processor cores by offering an increase in core efficiency. 

The DS8880 configuration options are based on the total installed memory, which in turn corresponds with a predetermined number of installed and active processor cores. 

The following DS8888F configuration upgrades can be performed nondisruptively: 

GLYPH<SM590000> Processor upgrade from two processors/24 cores, to four processors/48 cores 

GLYPH<SM590000> Processor memory upgrade, from 512 GB per server, to 1,024 GB per server 

The following DS8886F, DS8886 configuration upgrades can be performed nondisruptively: 

GLYPH<SM590000> Processor configuration upgrade, with 8, 16, or 24 cores per server 

GLYPH<SM590000> Processor memory upgrade, 64 - 1,024 GB per server 

The following DS8884F, DS8884configuration upgrade can be performed nondisruptively: 

GLYPH<SM590000> Processor memory upgrade, 32 - 128 GB per server 

Note:  System memory and processor upgrades are tightly coupled. They cannot be ordered or installed independently from each other. 

Caching  is a fundamental technique for reducing I/O latency. Like other modern caches, the DS8880 contains volatile memory that is used as a read and write cache and nonvolatile memory that is used to maintain and back up a second copy of the write cache. If power is lost, the batteries keep the system running until all data in nonvolatile storage (NVS) is written to the CPC’s internal disks. 

The NVS scales to the processor memory that is installed, which also helps to optimize performance. NVS is typically 1/16 of installed CPC memory, with a minimum of 4 GB. The exception is that NVS is 1/32 of installed CPC memory on systems with 2 TB of total system memory. 

The effectiveness of a read cache depends on the  read hit ratio , which is the fraction of requests that are served from the cache without necessitating a read from the disk (read miss). 

## 2.3.3 Flexible service processor 

Each Power8 processor complex is managed by a service processor that is called a flexible service processor (FSP). The FSP is an embedded controller that is based on an IBM PowerPCfi processor. 

