FpgaC
FpgaC is a compiler for a subset of the C programming language, which produces digital circuits that will execute the compiled programs. The circuits may use FPGAs or CPLDs as the target processor for reconfigurable computing, or even ASICs for dedicated applications.  FpgaC's goal is to be an efficient High Level Language (HLL) for reconfigurable computing, rather than a Hardware Description Language (HDL) for building efficient custom hardware circuits.

History
The historical roots of FpgaC are in the Transmogrifier C 3.1 (TMCC) HDL, a 1996 BSD licensed Open source offering from University of Toronto. TMCC is one of the first FPGA C compilers, with work starting in 1994 and presented at IEEE's FCCM95. This predated the evolution from the Handel language to Handel-C work done shortly afterward at Oxford University Computing Laboratory.

TMCC was renamed FpgaC for the initial SourceForge project release, with syntax modifications to start the evolution to ANSI C. Later development has removed all explicit HDL syntax from the language, and increased the subset of C supported. By capitalizing on ANSI C C99 extensions, the same functionality is now available by inference rather than non-standard language extensions. This shift away from non-standard HDL extensions was influenced in part by Streams-C from Los Alamos National Laboratory (now available commercially as Impulse C).

In the years that have followed, compiling ANSI C for execution as FPGA circuits has become a mainstream technology. Commercial FPGA C compilers are available from multiple vendors, and ANSI C based System Level Tools have gone mainstream for system description and simulation languages. FPGA based Reconfigurable Computing offerings from industry leaders like Altera, Silicon Graphics, Seymour Cray's SRC Computers, and Xilinx have capitalized on two decades of government and university reconfigurable computing research.

External links
 
 Transmogrifier C Homepage
 Oxford Handel-C
 FPGA System Level Tools

C (programming language) compilers
Gate arrays