Wide-issue
A wide-issue architecture is a computer processor that issues more than one instruction per clock cycle.  They can be considered in three broad types:

 Statically-scheduled superscalar architectures execute instructions in the order presented; the hardware logic determines which instructions are ready and safe to dispatch on each clock cycle.
 VLIW architectures rely on the programming software (compiler) to determine which instructions to dispatch on a given clock cycle.
 Dynamically-scheduled superscalar architectures execute instructions in an order that gives the same result as the order presented; the hardware logic determines which instructions are ready and safe to dispatch on each clock cycle.

See also
Out-of-order execution
Explicitly parallel instruction computing

References

Instruction processing
Parallel computing