GE-600 series
The GE-600 series was a family of 36-bit mainframe computers originating in the 1960s, built by General Electric (GE). When GE left the mainframe business the line was sold to Honeywell, which built similar systems into the 1990s as the division moved to Groupe Bull and then NEC.

The system is perhaps best known as the platform on which the Dartmouth Time Sharing System (DTSS) spent most of its life, and the base machine for the Multics operating system as well. Multics was supported by virtual memory additions made to later versions of the series.

Architecture
The 600 series used 36-bit words and 18-bit addresses. They had two 36-bit accumulators, eight 18-bit index registers, and one 8-bit exponent register. 
It supported floating point in both 36-bit single-precision and 2 x 36-bit double precision, the exponent being stored separately, allowing up to 71 bits of precision (one bit being used for the sign). It had an elaborate set of addressing modes, many of which used indirect words, some of which were auto-incrementing or auto-decrementing. It supported 6-bit and 9-bit bytes through addressing modes; these supported extracting specific bytes, and incrementing the byte pointer, but not random access to bytes.

It also included a number of channel controllers for handling I/O. The CPU could hand off short programs written in the channel controller's own machine language, which would then process the data, move it to or from the memory, and raise an interrupt when they completed. This allowed the main CPU to move on to other tasks while waiting for the slow I/O to complete, a primary feature of time sharing systems.

Operating systems
Originally the operating system for the 600-series computers was GECOS, developed by GE beginning in 1962. Between 1963 and 1964, the first version of the Dartmouth Time Sharing System (DTSS) was developed on the GE-235. DTSS was the first truly useful time sharing system and was very influential in the market. It is also the platform where the BASIC programming language was first developed. The Computer History Museum's Corporate Histories Collection describes GE's Mark I history this way:
The precursor of General Electric Information Services began as a business unit within General Electric formed to sell excess computer time on the computers used to give customer demos. In 1965, Warner Sinback recommended that they begin to sell time-sharing services using the time-sharing system (Mark 1) developed at Dartmouth on a General Electric 265 computer. The service was an instant success and by 1968, GEIS had 40% of the $ 70 million time-sharing market. The service continued to grow, and over time migrated to the GE developed Mark II and Mark III operating systems running on large mainframe computers.

The GE Mark II operating system (later Mark III) was used by GE Information Services as the basis for its timesharing and networked computing business. Although Mark II / Mark III was originally based on the Dartmouth system, the systems quickly diverged. Mark II/III incorporated many features normally associated with on-line transaction-processing systems, such as journalization and granular file locking. In the early-to-mid-1970s, Mark III adopted a high-reliability cluster technology, in which up to eight processing systems (each with its own copy of the operating system) had access to multiple file systems.

The Multics operating system was begun in 1964 as an advanced new operating system for the 600 series, though it was not production-ready until 1969. GE was hardware supplier to the project and one of development partners (the others were Massachusetts Institute of Technology and Bell Labs). GE saw this project as an opportunity to clearly separate themselves from other vendors by offering this advanced OS which would run best only on their machines. Multics required a number of additional features in the CPU to be truly effective, and John Couleur was joined by Edward Glaser at MIT to make the required modifications. The result was the GE-645, which included support for virtual memory. Addressing was modified to use an 18-bit segment in addition to the 18-bit address, dramatically increasing the theoretical memory size and making virtual memory much easier to support.

History
The GE-600 line of computers was developed by a team led by John Couleur out of work they had done for the military MISTRAM project in 1959. MISTRAM was a radar tracking system that was used on a number of projects, including Project Apollo. The Air Force required a data-collection computer to be installed in a tracking station downrange from Cape Canaveral. The data would eventually be shared with the 36-bit IBM 7094 machine at the Cape, so the computer would likely have to be 36-bits as well. GE built a machine called the M236 for the task, and as a result of the 36-bit needs, it ended up acting much like the 7094.

GE originally had not intended to enter the commercial computer market with their own machine. However, by the early 1960s GE was the largest user of IBM mainframes, and producing their own machines seemed like an excellent way to lower the costs of their computing department. In one estimate, the cost of development would be paid for in a single year free of IBM rental fees. Many remained skeptical, but after a year of internal wrangling, the project to commercialize the M236 eventually got the go-ahead in February 1963.

The machine was originally offered as the main GE-635, and the slower but compatible GE-625 and GE-615. While most were single-processor systems, the 635 could be configured with four CPUs and up to four input/output controllers (IOC's) each with up to 16 Common Peripheral Interface Channels. The 635 was likely the first example of a general purpose SMP system, though the GECOS/GCOS software treated the processors as a master and up to three slaves.

In August 1964, IBM considered the GE 600 series to be "severe competition in the medium and large-scale scientific areas". In May 1965 the first GE-625 computer was delivered to the GE Schenectady plant to replace five other computers of various sizes and makes.  A number of GE 635's were shipped during 1965 including two to Martin Marietta in November.

The 600 line consisted of six models: the 605, 615, 625, 635, 645, and 655.  GE offered a box to connect to the 635 called a 9SA that allowed the 635 to run 7094 programs.

The 615 was a 635 with Control Unit (CU) and Operations Unit (OU) overlap disabled, and a 36-bit-wide memory path. The 625 was a 635 with Control Unit and Operations Unit overlap disabled and 72-bit-wide memory path. The 635 had a 72-bit-wide memory path and CU/OU overlap enabled. The difference between these models was fewer than 10 wires on the backplane. Field service could convert a 615 to a 635 or 625 or vice versa in a couple of hours if necessary; other than those few wires, the 615, 625 and 635 were identical. The 605 was used in some realtime/military applications and was essentially a 615 without the floating point hardware. Programs coded for a 605 would run without any modification on any other 600 line processor. The 645 was a modified 635 processor that provided hardware support for the Multics operating system developed at MIT. 

The 605/615/625/635 and 645 were essentially second generation computers with discrete transistor TTL logic and a handful of integrated circuits. Memory consisted of a two-microsecond ferrite core, which could be interleaved. GE bought core memory from Fabri-Tek, Ampex and Lockheed. The Lockheed memory tended to be the most reliable.

Continuing problems with the reliability of the magnetic tape systems used with the system cast a pall over the entire project. In 1966 GE froze many orders while others were cancelled outright. By 1967 these problems were cleared up, and the machines were re-launched along with an upgraded version of the GECOS operating system.

A follow-on project to create a next-generation 635 started in 1967. The new GE-655 replaced the individual transistors from the earlier models with integrated circuits, which doubled the performance of the machine while also greatly reducing assembly costs. However, the machine was still in development in 1969, and was announced but probably never delivered under that name.

By that time the Multics project had finally produced an operating system usable by end-users. Besides MIT, Bell Labs, and GE, GE-645 systems running Multics were installed at the US Air Force Rome Development Center, Honeywell Billerica, and Machines Bull in Paris.  These last two systems were used as a "software factory" by a Honeywell/Bull project to design the Honeywell Level 64 computer.

GE sold its computer division to Honeywell in 1970, who renamed the GE-600 series as the Honeywell 6000 series. The 655 was officially released in 1973 as the Honeywell 6070 (with reduced performance versions, the 6030 and 6050). An optional Decimal/Business instruction set was added to improve COBOL performance. This was the Extended Instruction Set, aka EIS and the Decimal Unit or DU. The machines with EIS were the 'even' series, the 6040, 6060, 6080 and later the 6025. Several hundred of these processors were sold. Memory was initially 600 ns ferrite core made by Lockheed. Later versions used 750 ns MOS memory. The two could co-exist within a system, but not within a memory controller.

A version of the 6080 with the various Multics-related changes similar to the 645 was released as the 6180. A few dozen 6180-architecture CPUs were shipped. Later members of the 6000 series were released under various names, including Level 66, Level 68, DPS-8, DPS-88, DPS-90, DPS-9000 by Honeywell, Groupe Bull, and NEC.

See also
 GE-200 series
 GE-400 series

References

External links
The programming reference manual for the GE-635.  Includes complete description of registers, instruction set, and addressing modes.
Instruction set timings for the 625 and 635
GE-645 Circuit Board
"G.E. 600 Series", Digital Computer Newsletter, Office of Naval Research, Mathematical Sciences Division, vol. 16, no. 4, October 1964, pages 2-3
Shangri-la and the Paris 645
Myths about Multics

600
Transistorized computers
Time-sharing
36-bit computers
Computer-related introductions in 1963