     (println "library ieee;")
     (println "use ieee.std_logic_1164.all;")
     (println (to-vhdl (first entities)))
-    ;(println (lines (map to-vhdl entities)))
     )
   )


(defmethod to-vhdl 'process [process]
  (let [[type ports & definition] process]
    (indented-lines 1
      (str "process(" (apply str (interpose "," (map keyword-to-str ports))) ")")
      "begin"
      (apply lines (map to-vhdl definition))
      "end process;"
      )))

(defmethod to-vhdl 'case [statement]
  (let [[type target & cases] statement]
    (indented-lines 2
      (spaces "case" (keyword-to-str target) "is")
      ;(lines (map #(str "when" (str "\"" (first %) "\""))
      (apply lines (map #(str "when \"" (first %) "\" => " (to-vhdl (second %)) \;)
           (partition 2 cases)))
      "end case;"
    )))

(defmethod to-vhdl '<= [statement]
  (let [[type target expression] statement]
    (str (keyword-to-str target) " <= " (keyword-to-str expression))

(ns computer_build.vhdl)

(defn indented-lines [strings]
  (map #(str (apply str (take 1 (cycle ["  "]))) %) strings)
  )

(defn indent-lines [lines]
  (if (empty? lines) '()
    (if (string? (first lines)) (cons (first lines) (indent-lines (rest lines)))
      (concat (indented-lines (indent-lines (first lines))) (indent-lines (rest lines)))
      )))

(defn spaces [& strings]
  (apply str (interpose " " strings))
