     (str "architecture arch_" name " of " name " is")
     (map to-vhdl defs)
     "begin"
-    (map to-vhdl architecture)
+    (with-meta (map to-vhdl architecture) {:noindent true})
     (str "end arch_" name ";"))))))
 
 ; does not generate lines like block-level methods do

(defmethod to-vhdl :if [[type condition & body]]
  (list
    (spaces "if" (to-vhdl condition) "then")
    (map to-vhdl body)
    "end if;"))

(defmethod to-vhdl :and [[type condA condB]]

  (list
    (str "process(" (str-join "," (map keyword-to-str ports)) ")")
    "begin"
    (with-meta (map to-vhdl definition) {:noindent true})
    "end process;"))

(defmethod to-vhdl :case [[type target & cases]]
