             (save-excursion
               (re-search-backward verilog-module-re)
               (setq module-name (match-string 1))
-              (setq module-instance-re
-                    (concat "^\\s*" ; pcre regex
+              (setq module-instance-pcre ; pcre regex
+                    (concat "^\\s*"
                             module-name
                             "\\s+"
                             "(#\\s*\\((\\n|.)*?\\))*" ; optional hardware parameters
                                         ; '(\n|.)*?' does non-greedy multi-line grep
                             "(\\n|.)*?" ; optional newline/space before instance name
+                            "[^.]" ; do not match ".PARAM (PARAM_VAL),"
                             "\\K" ; don't highlight anything till this point
                             modi/verilog-identifier-re ; instance name
                             "(?=[^a-zA-Z0-9_]*\\()")) ; optional space/newline after instance name
                                         ; and before opening parenthesis `('
                                         ; don't highlight anything in (?=..)
-              (ag-regexp module-instance-re (projectile-project-root)))))))
+              ;; (message module-instance-pcre)
+              (ag-regexp module-instance-pcre (projectile-project-root)))))))
 
 ;;;; my/verilog-selective-indent
     ;; http://emacs.stackexchange.com/a/8033/115

    (setq verilog-tab-to-comment           nil) ; nil
    (setq verilog-date-scientific-format   t)   ; t

    (defconst modi/verilog-identifier-re "\\b[a-zA-Z][a-zA-Z0-9:_]*"
      ;; The : is to allow parsing extern methods like class::task
      "Regexp for a valid verilog identifier.")

    (defconst modi/verilog-module-instance-re
      (concat "^\\s-*"
              "\\(?1:" ; force group number to 1
              modi/verilog-identifier-re ; module name
              "\\)"
              "\\(?:\n\\|\\s-\\)+" ; newline/space
              ;; optional hardware parameters followed by optional comments
              ;; followed by optional space/newline before instance name
              "\\(#([^;]+?)\\(\\s-*//.*?\\)*[^;\\./]+?\\)*"
              "\\(?2:" ; force group number to 2
              modi/verilog-identifier-re
              "\\)" ; instance name
              "\\(?:\n\\|\\s-\\)*" ; optional newline/space
              "(" ; opening parenthesis `(' before port list
              )

              "\\|" "task" "\\)"
              "\\s-+"
              "\\([a-z]+\\s-+\\)*" ; void, static, automatic, ..
              "\\(?2:"
              "\\(?:" modi/verilog-identifier-re "::\\)*" ; allow parsing extern methods like class::task
              modi/verilog-identifier-re ; block name, force group number to 2
              "\\)"
              "\\b"
              )
      "Regexp for a valid verilog block header statement.")
