  Basic-block throughput models such as uiCA, IACA, GRANITE, Ithemal, llvm-mca,
OSACA, or CQA guide optimizing compilers and help performance engineers
identify and eliminate bottlenecks. For this purpose, basic-block throughput
models should ideally be fast, accurate, and interpretable.
  Recent advances have significantly improved accuracy: uiCA, the
state-of-the-art model, achieves an error of about 1% relative to measurements
across a wide range of microarchitectures. The computational efficiency of
throughput models, which is equally important for widespread adoption,
especially in compilers, has so far received little attention.
  In this paper, we introduce Facile, an analytical throughput model that is
fast, accurate, and interpretable. Facile analyzes different potential
bottlenecks independently and analytically. Due to its compositional nature,
Facile's predictions directly pinpoint the bottlenecks. We evaluate Facile on a
wide range of microarchitectures and show that it is almost two orders of
magnitude faster than existing models while achieving state-of-the-art
accuracy.

Performance