  The growth in data needs of modern applications has created significant
challenges for modern systems leading a "memory wall." Spintronic Domain Wall
Memory (DWM), related to Spin-Transfer Torque Memory (STT-MRAM), provides
near-SRAM read/write performance, energy savings and nonvolatility, potential
for extremely high storage density, and does not have significant endurance
limitations. However, DWM's benefits cannot address data access latency and
throughput limitations of memory bus bandwidth. We propose PIRM, a DWM-based
in-memory computing solution that leverages the properties of DWM nanowires and
allows them to serve as polymorphic gates. While normally DWM is accessed by
applying spin polarized currents orthogonal to the nanowire at access points to
read individual bits, transverse access along the DWM nanowire allows the
differentiation of the aggregate resistance of multiple bits in the nanowire,
akin to a multilevel cell. PIRM leverages this transverse reading to directly
provide bulk-bitwise logic of multiple adjacent operands in the nanowire,
simultaneously. Based on this in-memory logic, PIRM provides a technique to
conduct multi-operand addition and two operand multiplication using transverse
access. PIRM provides a 1.6x speedup compared to the leading DRAM PIM technique
for query applications that leverage bulk bitwise operations. Compared to the
leading PIM technique for DWM, PIRM improves performance by 6.9x, 2.3x and
energy by 5.5x, 3.4x for 8-bit addition and multiplication, respectively. For
arithmetic heavy benchmarks, PIRM reduces access latency by 2.1x, while
decreasing energy consumption by 25.2x for a reasonable 10% area overhead
versus non-PIM DWM.

Emerging Technologies