  The human brain comprises about a hundred billion neurons connected through
quadrillion synapses. Spiking Neural Networks (SNNs) take inspiration from the
brain to model complex cognitive and learning tasks. Neuromorphic engineering
implements SNNs in hardware, aspiring to mimic the brain at scale (i.e., 100
billion neurons) with biological area and energy efficiency. The design of
ultra-energy efficient and compact neurons is essential for the large-scale
implementation of SNNs in hardware. In this work, we have experimentally
demonstrated a Partially Depleted (PD) Silicon-On-Insulator (SOI) MOSFET based
Leaky-Integrate & Fire (LIF) neuron where energy-and area-efficiency is enabled
by two elements of design - first tunneling based operation and second compact
sub-threshold SOI control circuit design. Band-to-Band Tunneling (BTBT) induced
hole storage in the body is used for the "Integrate" function of the neuron. A
compact control circuit "Fires" a spike when the body potential exceeds the
firing threshold. The neuron then "Resets" by removing the stored holes from
the body contact of the device. Additionally, the control circuit provides
"Leakiness" in the neuron which is an essential property of biological neurons.
The proposed neuron provides 10x higher area efficiency compared to CMOS design
with equivalent energy/spike. Alternatively, it has 10^4x higher energy
efficiency at area-equivalent neuron technologies. Biologically comparable
energy- and area-efficiency along with CMOS compatibility make the proposed
device attractive for large-scale hardware implementation of SNNs.

Neural and Evolutionary Computing