  This paper presents an automated algorithm for optimum configuration of
routing interconnection network in Xilinx Zynq-7000 All programmable
system-on-chip (APSoC) fabrics. A method to configure circuits with optimum
routing resources is presented along with their performance parameters with and
without the proposed algorithm. The proposed algorithm enables full control
over routing resources for using different interconnection types in order to
create routing-based circuit-under-test. The algorithm proposes the routing
techniques through the 2-D array of switch matrices inside the interconnection
network and automatically identifies the involved programmable interconnection
points associated with a node. An experimental setup is proposed to measure the
performance parameters such as slack time and power with and without the
applied algorithm on the APSoC routing resources. The proposed setup requires
no external equipment such as manufactured equipments or external instruments
for performance measurement.

Hardware Architecture