  Nowadays, various memory-hungry applications like machine learning algorithms
are knocking "the memory wall". Toward this, emerging memories featuring
computational capacity are foreseen as a promising solution that performs data
process inside the memory itself, so-called computation-in-memory, while
eliminating the need for costly data movement. Recent research shows that
utilizing the custom extension of RISC-V instruction set architecture to
support computation-in-memory operations is effective. To evaluate the
applicability of such methods further, this work enhances the standard GNU
binary utilities to generate RISC-V executables with Logic-in-Memory (LiM)
operations and develop a new gem5 simulation environment, which simulates the
entire system (CPU, peripherals, etc.) in a cycle-accurate manner together with
a user-defined LiM module integrated into the system. This work provides a
modular testbed for the research community to evaluate potential LiM solutions
and co-designs between hardware and software.

Hardware Architecture