  Reversible logic has become immensely popular research area and its
applications have spread in various technologies for their low power
consumption. In this paper we proposed an efficient design of random access
memory using reversible logic. In the way of designing the reversible random
access memory we proposed a reversible decoder and a write enable reversible
master slave D flip-flop. All the reversible designs are superior in terms of
quantum cost, delay and garbage outputs compared to the designs existing in
literature.

Emerging Technologies;Hardware Architecture