  This paper presents a novel approach for performing computations using
Look-Up Tables (LUTs) tailored specifically for Compute-in-Memory applications.
The aim is to address the scalability challenges associated with LUT-based
computation by reducing storage requirements and energy consumption while
capitalizing on the faster and more energy-efficient nature of look-up methods
compared to conventional mathematical computations. The proposed method
leverages a divide and conquer (D&C) strategy to enhance the scalability of
LUT-based computation. By breaking down high-precision multiplications into
lower-precision operations, the technique achieves significantly lower area
overheads, up to approximately 3.7 times less than conventional LUT-based
approaches, without compromising accuracy. To validate the effectiveness of the
proposed method, extensive simulations using TSMC 65 nm technology were
conducted. The experimental analysis reveals that the proposed approach
accounts for less than 0.1\% of the total energy consumption, with only a 32\%
increase in area overhead. These results demonstrate considerable improvements
achieved in energy efficiency and area utilization through the novel
low-energy, low-area-overhead LUT-based computation in an SRAM array.

Hardware Architecture;Emerging Technologies