  Low-power asymmetric multicore processors (AMPs) attract considerable
attention due to their appealing performance-power ratio for energy-constrained
environments. However, these processors pose a significant programming
challenge due to the integration of cores with different performance
capabilities, asking for an asymmetry-aware scheduling solution that carefully
distributes the workload.
  The recent HEVC standard, which offers several high-level parallelization
strategies, is an important application that can benefit from an implementation
tailored for the low-power AMPs present in many current mobile or hand-held
devices. In this scenario, we present an architecture-aware implementation of
an HEVC decoder that embeds a criticality-aware scheduling strategy tuned for a
Samsung Exynos 5422 system-on-chip furnished with an ARM big.LITTLE AMP. The
performance and energy efficiency of our solution is further enhanced by
exploiting the NEON vector engine available in the ARM big.LITTLE architecture.
Experimental results expose a 1080p real-time HEVC decoding at 24 frames/sec,
and a reduction of energy consumption over 20%.

Distributed, Parallel, and Cluster Computing;Multimedia;Performance