Single-chip processors have reached their limits
The best chiplet interconnect may turn out to be no interconnect at all.  Wafer scale integration [1] has come up periodically over the years.  In short, just make a physically larger integrated circuit, potentially as large as the entire wafer -- like a foot across.  As I understand it, there's no particular technical hurdle, and indeed the progress with self-healing and self-testing designs with redundancy to improve yield for small processors, also makes really large designs more feasible than in the past.   The economics never worked out in the favour of this approach before, but now we're at the scaling limit maybe that will change.At least one company is pursuing this at the very high end.  The Cerebras WFE-2 [2] ("wafer scale engine") has 2.6 trillion transistors with 800,000 cores and 48 gigabytes of RAM, on a single, giant, integrated circuit (shown in the linked article).  I'm just an interested follower of the field, no expert, so what do I know.  But I think that we may see a shift in that direction eventually.  Everything on-die with a really big die.  System on a chip, but for the high end, not just tiny microcontrollers.[1] https://en.wikipedia.org/wiki/Wafer-scale_integration[2] https://www.zdnet.com/article/cerebras-continues-absolute-do...