Reinventing the Network Stack for Compute-Intensive Applications
8 dual port 100G NICs (available for a while)or 2 dual port 400 gigabit NICs (not yet available) would out-bandwidth the memory controller on an Epyc 7742; how are NICs such a bottleneck that they need to be increased 100x to keep up when DDR5 only doubles the bandwidth?I forget what the bandwidth of CPU cache is but I'm guessing it's not 10 terabit/second either.