Errata prompt Intel to disable TSX in Haswell, early Broadwell CPUs
For those wondering, the TSX instruction set is http://en.wikipedia.org/wiki/Transactional_Synchronization_E...I first heard about transactional memory when Sun had plans to implement it for its UltraSPARC Rock processor. There is a decent overview of the concept at http://en.wikipedia.org/wiki/Transactional_memory