cp ../../../game_over.mif .


mkdir work
echo "Compiling Core Verilog UNISIM/Behavioral model"
ncvlog -work work ../../../game_over.v 
ncvhdl -v93 -work work ../../example_design/game_over_exdes.vhd

echo "Compiling Test Bench Files"

ncvhdl -v93 -work work    ../bmg_tb_pkg.vhd
ncvhdl -v93 -work work    ../addr_gen.vhd
ncvhdl -v93 -work work    ../bmg_stim_gen.vhd
ncvhdl -v93 -work work    ../game_over_synth.vhd 
ncvhdl -v93 -work work    ../game_over_tb.vhd

echo "Elaborating Design"
ncvlog -work work $XILINX/verilog/src/glbl.v
ncelab -access +rwc glbl work.game_over_tb

echo "Simulating Design"
ncsim -gui -input @"simvision -input wave_ncsim.sv" work.game_over_tb
