C64 CIRCUIT THEORYRAM Control Logic. U13 and U25 are multiplexers. The address output from the microprocessor are passed to RAM viaU13 and U25 when the output Address Enable Control (AEC) from the VIC IC is "high". When AECis "low" the VIC IC outputs refresh addresses on pins 24 - 31. AEC goes "low" when the systemclock, phase 2, is "low". Since all I/O decoding occurs when phase 2 is "high", refresh is transparentto the processor. Eight 4164 DRAMS provide 64k bytes of memory. One 2114 RAM (U6) provides 512 bytes of memoryallocated for screen color data storage.