/* Initalize RH to the default address. 
/* Initialize RH to the default address. 
static int __init etrax_usb_hc_init(void){	static etrax_hc_t *hc;	struct usb_bus *bus;	struct usb_device *usb_rh;	int i;	DBFENTER;	info("ETRAX 100LX USB-HCD %s (c) 2001-2003 Axis Communications AB\n", usb_hcd_version); 	hc = kmalloc(sizeof(etrax_hc_t), GFP_KERNEL);	assert(hc != NULL);	/* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */	/* Note that we specify sizeof(USB_EP_Desc_t) as the size, but also allocate	   SB descriptors from this cache. This is ok since sizeof(USB_EP_Desc_t) ==	   sizeof(USB_SB_Desc_t). */	usb_desc_cache = kmem_cache_create("usb_desc_cache", sizeof(USB_EP_Desc_t), 0,					   SLAB_HWCACHE_ALIGN, 0, 0);	assert(usb_desc_cache != NULL);	top_half_reg_cache = kmem_cache_create("top_half_reg_cache",					       sizeof(usb_interrupt_registers_t),					       0, SLAB_HWCACHE_ALIGN, 0, 0);	assert(top_half_reg_cache != NULL);	isoc_compl_cache = kmem_cache_create("isoc_compl_cache",						sizeof(usb_isoc_complete_data_t),						0, SLAB_HWCACHE_ALIGN, 0, 0);	assert(isoc_compl_cache != NULL);	etrax_usb_bus = bus = usb_alloc_bus(&etrax_usb_device_operations);	hc->bus = bus;	bus->bus_name="ETRAX 100LX";	bus->hcpriv = hc;	/* Initalize RH to the default address.	   And make sure that we have no status change indication */	hc->rh.numports = 2;  /* The RH has two ports */	hc->rh.devnum = 1;	hc->rh.wPortChange_1 = 0;	hc->rh.wPortChange_2 = 0;	/* Also initate the previous values to zero */	hc->rh.prev_wPortStatus_1 = 0;	hc->rh.prev_wPortStatus_2 = 0;	/* Initialize the intr-traffic flags */	/* FIXME: This isn't used. (Besides, the error field isn't initialized.) */	hc->intr.sleeping = 0;	hc->intr.wq = NULL;	epid_usage_bitmask = 0;	epid_out_traffic = 0;	/* Mark the invalid epid as being used. */	set_bit(INVALID_EPID, (void *)&epid_usage_bitmask);	*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, INVALID_EPID);	nop();	/* The valid bit should still be set ('invalid' is in our world; not the hardware's). */	*R_USB_EPT_DATA = (IO_STATE(R_USB_EPT_DATA, valid, yes) |			   IO_FIELD(R_USB_EPT_DATA, max_len, 1));	/* Mark the dummy epid as being used. */	set_bit(DUMMY_EPID, (void *)&epid_usage_bitmask);	*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, DUMMY_EPID);	nop();	*R_USB_EPT_DATA = (IO_STATE(R_USB_EPT_DATA, valid, no) |			   IO_FIELD(R_USB_EPT_DATA, max_len, 1));	/* Initialize the urb list by initiating a head for each list. */	for (i = 0; i < NBR_OF_EPIDS; i++) {		INIT_LIST_HEAD(&urb_list[i]);	}	spin_lock_init(&urb_list_lock);	INIT_LIST_HEAD(&urb_unlink_list);	/* Initiate the bulk start timer. */	init_timer(&bulk_start_timer);	bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;	bulk_start_timer.function = etrax_usb_bulk_start_timer_func;	add_timer(&bulk_start_timer);	/* Initiate the bulk eot timer. */	init_timer(&bulk_eot_timer);	bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;	bulk_eot_timer.function = etrax_usb_bulk_eot_timer_func;	add_timer(&bulk_eot_timer);	/* Set up the data structures for USB traffic. Note that this must be done before	   any interrupt that relies on sane DMA list occurrs. */	init_rx_buffers();	init_tx_bulk_ep();	init_tx_ctrl_ep();	init_tx_intr_ep();	init_tx_isoc_ep();        device_initialize(&fake_device);        kobject_set_name(&fake_device.kobj, "etrax_usb");        kobject_add(&fake_device.kobj);        kobject_hotplug(&fake_device.kobj, KOBJ_ADD);        hc->bus->controller = &fake_device;	usb_register_bus(hc->bus);	*R_IRQ_MASK2_SET =		/* Note that these interrupts are not used. */		IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |		/* Sub channel 1 (ctrl) descr. interrupts are used. */		IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |		IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |		/* Sub channel 3 (isoc) descr. interrupts are used. */		IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);	/* Note that the dma9_descr interrupt is not used. */	*R_IRQ_MASK2_SET =		IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |		IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);	/* FIXME: Enable iso_eof only when isoc traffic is running. */	*R_USB_IRQ_MASK_SET =		IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) |		IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |		IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |		IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |		IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);	if (request_irq(ETRAX_USB_HC_IRQ, etrax_usb_hc_interrupt_top_half, 0,			"ETRAX 100LX built-in USB (HC)", hc)) {		err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);		etrax_usb_hc_cleanup();		DBFEXIT;		return -1;	}	if (request_irq(ETRAX_USB_RX_IRQ, etrax_usb_rx_interrupt, 0,			"ETRAX 100LX built-in USB (Rx)", hc)) {		err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);		etrax_usb_hc_cleanup();		DBFEXIT;		return -1;	}	if (request_irq(ETRAX_USB_TX_IRQ, etrax_usb_tx_interrupt, 0,			"ETRAX 100LX built-in USB (Tx)", hc)) {		err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);		etrax_usb_hc_cleanup();		DBFEXIT;		return -1;	}	/* R_USB_COMMAND:	   USB commands in host mode. The fields in this register should all be	   written to in one write. Do not read-modify-write one field at a time. A	   write to this register will trigger events in the USB controller and an	   incomplete command may lead to unpredictable results, and in worst case	   even to a deadlock in the controller.	   (Note however that the busy field is read-only, so no need to write to it.) */	/* Check the busy bit before writing to R_USB_COMMAND. */	while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));	/* Reset the USB interface. */	*R_USB_COMMAND =		IO_STATE(R_USB_COMMAND, port_sel, nop) |		IO_STATE(R_USB_COMMAND, port_cmd, reset) |		IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);	/* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to 0x2A30 (10800),	   to guarantee that control traffic gets 10% of the bandwidth, and periodic transfer may	   allocate the rest (90%). This doesn't work though. Read on for a lenghty explanation.	   While there is a difference between rev. 2 and rev. 3 of the ETRAX 100LX regarding the NAK	   behaviour, it doesn't solve this problem. What happens is that a control transfer will not	   be interrupted in its data stage when PSTART happens (the point at which periodic traffic	   is started). Thus, if PSTART is set to 10800 and its IN or OUT token is NAKed until just before	   PSTART happens, it will continue the IN/OUT transfer as long as it's ACKed. After it's done,	   there may be too little time left for an isochronous transfer, causing an epid attention	   interrupt due to perror. The work-around for this is to let the control transfers run at the	   end of the frame instead of at the beginning, and will be interrupted just fine if it doesn't	   fit into the frame. However, since there will *always* be a control transfer at the beginning	   of the frame, regardless of what we set PSTART to, that transfer might be a 64-byte transfer	   which consumes up to 15% of the frame, leaving only 85% for periodic traffic. The solution to	   this would be to 'dummy allocate' 5% of the frame with the usb_claim_bandwidth function to make	   sure that the periodic transfers that are inserted will always fit in the frame.	   The idea was suggested that a control transfer could be split up into several 8 byte transfers,	   so that it would be interrupted by PSTART, but since this can't be done for an IN transfer this	   hasn't been implemented.	   The value 11960 is chosen to be just after the SOF token, with a couple of bit times extra	   for possible bit stuffing. */	*R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);#ifdef CONFIG_ETRAX_USB_HOST_PORT1	*R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);#endif#ifdef CONFIG_ETRAX_USB_HOST_PORT2	*R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);#endif	while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));	/* Configure the USB interface as a host controller. */	*R_USB_COMMAND =		IO_STATE(R_USB_COMMAND, port_sel, nop) |		IO_STATE(R_USB_COMMAND, port_cmd, reset) |		IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);	/* Note: Do not reset any ports here. Await the port status interrupts, to have a controlled	   sequence of resetting the ports. If we reset both ports now, and there are devices	   on both ports, we will get a bus error because both devices will answer the set address	   request. */	while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));	/* Start processing of USB traffic. */	*R_USB_COMMAND =		IO_STATE(R_USB_COMMAND, port_sel, nop) |		IO_STATE(R_USB_COMMAND, port_cmd, reset) |		IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);	while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));	usb_rh = usb_alloc_dev(NULL, hc->bus, 0);	hc->bus->root_hub = usb_rh;        usb_rh->state = USB_STATE_ADDRESS;        usb_rh->speed = USB_SPEED_FULL;        usb_rh->devnum = 1;        hc->bus->devnum_next = 2;        usb_rh->ep0.desc.wMaxPacketSize = __const_cpu_to_le16(64);        usb_get_device_descriptor(usb_rh, USB_DT_DEVICE_SIZE);	usb_new_device(usb_rh);	DBFEXIT;	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/093cf723b2b06d774929ea07982f6a466ff22314/hc_crisv10.c/clean/drivers/usb/host/hc_crisv10.c