sz = pci_size(l, sz, PCI_BASE_ADDRESS_MEM_MASK); 
sz = pci_size(l, sz, (u32)PCI_BASE_ADDRESS_MEM_MASK); 
static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom){	unsigned int pos, reg, next;	u32 l, sz;	struct resource *res;	for(pos=0; pos<howmany; pos = next) {		next = pos+1;		res = &dev->resource[pos];		res->name = pci_name(dev);		reg = PCI_BASE_ADDRESS_0 + (pos << 2);		pci_read_config_dword(dev, reg, &l);		pci_write_config_dword(dev, reg, ~0);		pci_read_config_dword(dev, reg, &sz);		pci_write_config_dword(dev, reg, l);		if (!sz || sz == 0xffffffff)			continue;		if (l == 0xffffffff)			l = 0;		if ((l & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) {			sz = pci_size(l, sz, PCI_BASE_ADDRESS_MEM_MASK);			if (!sz)				continue;			res->start = l & PCI_BASE_ADDRESS_MEM_MASK;			res->flags |= l & ~PCI_BASE_ADDRESS_MEM_MASK;		} else {			sz = pci_size(l, sz, PCI_BASE_ADDRESS_IO_MASK & 0xffff);			if (!sz)				continue;			res->start = l & PCI_BASE_ADDRESS_IO_MASK;			res->flags |= l & ~PCI_BASE_ADDRESS_IO_MASK;		}		res->end = res->start + (unsigned long) sz;		res->flags |= pci_calc_resource_flags(l);		if ((l & (PCI_BASE_ADDRESS_SPACE | PCI_BASE_ADDRESS_MEM_TYPE_MASK))		    == (PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64)) {			pci_read_config_dword(dev, reg+4, &l);			next++;#if BITS_PER_LONG == 64			res->start |= ((unsigned long) l) << 32;			res->end = res->start + sz;			pci_write_config_dword(dev, reg+4, ~0);			pci_read_config_dword(dev, reg+4, &sz);			pci_write_config_dword(dev, reg+4, l);			sz = pci_size(l, sz, 0xffffffff);			if (sz) {				/* This BAR needs > 4GB?  Wow. */				res->end |= (unsigned long)sz<<32;			}#else			if (l) {				printk(KERN_ERR "PCI: Unable to handle 64-bit address for device %s\n", pci_name(dev));				res->start = 0;				res->flags = 0;				continue;			}#endif		}	}	if (rom) {		dev->rom_base_reg = rom;		res = &dev->resource[PCI_ROM_RESOURCE];		res->name = pci_name(dev);		pci_read_config_dword(dev, rom, &l);		pci_write_config_dword(dev, rom, ~PCI_ROM_ADDRESS_ENABLE);		pci_read_config_dword(dev, rom, &sz);		pci_write_config_dword(dev, rom, l);		if (l == 0xffffffff)			l = 0;		if (sz && sz != 0xffffffff) {			sz = pci_size(l, sz, PCI_ROM_ADDRESS_MASK);			if (sz) {				res->flags = (l & IORESOURCE_ROM_ENABLE) |				  IORESOURCE_MEM | IORESOURCE_PREFETCH |				  IORESOURCE_READONLY | IORESOURCE_CACHEABLE;				res->start = l & PCI_ROM_ADDRESS_MASK;				res->end = res->start + (unsigned long) sz;			}		}	}}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/3c6de9295d28a4fc868b2c09f23e318e3e7b9b6b/probe.c/buggy/drivers/pci/probe.c