printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n", print_mhz(s3c2440_clk_upll.rate)); 
printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz, DVS %s\n", print_mhz(s3c2440_clk_upll.rate), (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); 
static int s3c2440_clk_add(struct sys_device *sysdev){	unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);	struct clk *clk_h;	struct clk *clk_p;	struct clk *clk_xtal;	clk_xtal = clk_get(NULL, "xtal");	if (IS_ERR(clk_xtal)) {		printk(KERN_ERR "S3C2440: Failed to get clk_xtal\n");		return -EINVAL;	}	s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);	printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",	       print_mhz(s3c2440_clk_upll.rate));	clk_p = clk_get(NULL, "pclk");	clk_h = clk_get(NULL, "hclk");	if (IS_ERR(clk_p) || IS_ERR(clk_h)) {		printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");		return -EINVAL;	}	s3c2440_clk_cam.parent = clk_h;	s3c2440_clk_ac97.parent = clk_p;	s3c24xx_register_clock(&s3c2440_clk_ac97);	s3c24xx_register_clock(&s3c2440_clk_cam);	s3c24xx_register_clock(&s3c2440_clk_upll);	clk_disable(&s3c2440_clk_ac97);	clk_disable(&s3c2440_clk_cam);	return 0;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/01b9c414828d951148a3792237ff3bf6e6debc85/s3c2440-clock.c/clean/arch/arm/mach-s3c2410/s3c2440-clock.c