if (unlikely(ck_dpll1.rate == 0)) { omap_writew(ptr->dpllctl_val, DPLL_CTL); ck_dpll1.rate = ptr->pll_rate; } omap_writew(ptr->ckctl_val, ARM_CKCTL); 
ck_dpll1.rate = ptr->pll_rate; 
static int select_table_rate(struct clk *  clk, unsigned long rate){	/* Find the highest supported frequency <= rate and switch to it */	struct mpu_rate *  ptr;	if (clk != &virtual_ck_mpu)		return -EINVAL;	for (ptr = rate_table; ptr->rate; ptr++) {		if (ptr->xtal != ck_ref.rate)			continue;		/* DPLL1 cannot be reprogrammed without risking system crash */		if (likely(ck_dpll1.rate!=0) && ptr->pll_rate != ck_dpll1.rate)			continue;		/* Can check only after xtal frequency check */		if (ptr->rate <= rate)			break;	}	if (!ptr->rate)		return -EINVAL;	if (!ptr->rate)		return -EINVAL;	if (unlikely(ck_dpll1.rate == 0)) {		omap_writew(ptr->dpllctl_val, DPLL_CTL);		ck_dpll1.rate = ptr->pll_rate;	}	omap_writew(ptr->ckctl_val, ARM_CKCTL);	propagate_rate(&ck_dpll1);	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/92105bb70634abacc08bbe12bf6f888fbd7dad38/clock.c/buggy/arch/arm/plat-omap/clock.c