if (APIC_INTEGRATED(v)) {	/* !82489DX */ if (maxlvt > 3)		/* Due to Pentium errata 3AP and 11AP. */ apic_write(APIC_ESR, 0); apic_read(APIC_ESR); } 
apic_write(APIC_ESR, 0); apic_read(APIC_ESR); 
void clear_local_APIC(void){	int maxlvt;	unsigned int v;	maxlvt = get_maxlvt();	/*	 * Masking an LVT entry on a P6 can trigger a local APIC error	 * if the vector is zero. Mask LVTERR first to prevent this.	 */	if (maxlvt >= 3) {		v = ERROR_APIC_VECTOR; /* any non-zero vector will do */		apic_write_around(APIC_LVTERR, v | APIC_LVT_MASKED);	}	/*	 * Careful: we have to set masks only first to deassert	 * any level-triggered sources.	 */	v = apic_read(APIC_LVTT);	apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED);	v = apic_read(APIC_LVT0);	apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED);	v = apic_read(APIC_LVT1);	apic_write_around(APIC_LVT1, v | APIC_LVT_MASKED);	if (maxlvt >= 4) {		v = apic_read(APIC_LVTPC);		apic_write_around(APIC_LVTPC, v | APIC_LVT_MASKED);	}	/*	 * Clean APIC state for other OSs:	 */	apic_write_around(APIC_LVTT, APIC_LVT_MASKED);	apic_write_around(APIC_LVT0, APIC_LVT_MASKED);	apic_write_around(APIC_LVT1, APIC_LVT_MASKED);	if (maxlvt >= 3)		apic_write_around(APIC_LVTERR, APIC_LVT_MASKED);	if (maxlvt >= 4)		apic_write_around(APIC_LVTPC, APIC_LVT_MASKED);	v = GET_APIC_VERSION(apic_read(APIC_LVR));	if (APIC_INTEGRATED(v)) {	/* !82489DX */		if (maxlvt > 3)		/* Due to Pentium errata 3AP and 11AP. */			apic_write(APIC_ESR, 0);		apic_read(APIC_ESR);	}}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/5a40b7c2abdedcf53c9a6ee790991acfcef5b6c7/apic.c/buggy/arch/x86_64/kernel/apic.c