port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; 
port->ignore_status_mask |= UART011_DR_FE | UART011_DR_PE; 
pl011_set_termios(struct uart_port *port, struct termios *termios,		     struct termios *old){	unsigned int lcr_h, old_cr;	unsigned long flags;	unsigned int baud, quot;	/*	 * Ask the core to calculate the divisor for us.	 */	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);	quot = port->uartclk * 4 / baud;	switch (termios->c_cflag & CSIZE) {	case CS5:		lcr_h = UART01x_LCRH_WLEN_5;		break;	case CS6:		lcr_h = UART01x_LCRH_WLEN_6;		break;	case CS7:		lcr_h = UART01x_LCRH_WLEN_7;		break;	default: // CS8		lcr_h = UART01x_LCRH_WLEN_8;		break;	}	if (termios->c_cflag & CSTOPB)		lcr_h |= UART01x_LCRH_STP2;	if (termios->c_cflag & PARENB) {		lcr_h |= UART01x_LCRH_PEN;		if (!(termios->c_cflag & PARODD))			lcr_h |= UART01x_LCRH_EPS;	}	if (port->fifosize > 1)		lcr_h |= UART01x_LCRH_FEN;	spin_lock_irqsave(&port->lock, flags);	/*	 * Update the per-port timeout.	 */	uart_update_timeout(port, termios->c_cflag, baud);	port->read_status_mask = UART01x_RSR_OE;	if (termios->c_iflag & INPCK)		port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;	if (termios->c_iflag & (BRKINT | PARMRK))		port->read_status_mask |= UART01x_RSR_BE;	/*	 * Characters to ignore	 */	port->ignore_status_mask = 0;	if (termios->c_iflag & IGNPAR)		port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;	if (termios->c_iflag & IGNBRK) {		port->ignore_status_mask |= UART01x_RSR_BE;		/*		 * If we're ignoring parity and break indicators,		 * ignore overruns too (for real raw support).		 */		if (termios->c_iflag & IGNPAR)			port->ignore_status_mask |= UART01x_RSR_OE;	}	/*	 * Ignore all characters if CREAD is not set.	 */	if ((termios->c_cflag & CREAD) == 0)		port->ignore_status_mask |= UART_DUMMY_RSR_RX;	if (UART_ENABLE_MS(port, termios->c_cflag))		pl011_enable_ms(port);	/* first, disable everything */	old_cr = readw(port->membase + UART011_CR);	writew(0, port->membase + UART011_CR);	/* Set baud rate */	writew(quot & 0x3f, port->membase + UART011_FBRD);	writew(quot >> 6, port->membase + UART011_IBRD);	/*	 * ----------v----------v----------v----------v-----	 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L	 * ----------^----------^----------^----------^-----	 */	writew(lcr_h, port->membase + UART011_LCRH);	writew(old_cr, port->membase + UART011_CR);	spin_unlock_irqrestore(&port->lock, flags);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/b63d4f0fb80918ab37b6c0ee1adcd49e05c9994c/amba-pl011.c/clean/drivers/serial/amba-pl011.c