!pci_set_dma_mask(pdev, (u64) 0xffffffffffffffffULL)) { 
!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { 
static int __devinit gem_init_one(struct pci_dev *pdev,				  const struct pci_device_id *ent){	static int gem_version_printed = 0;	unsigned long gemreg_base, gemreg_len;	struct net_device *dev;	struct gem *gp;	int i, err, pci_using_dac;	if (gem_version_printed++ == 0)		printk(KERN_INFO "%s", version);	/* Apple gmac note: during probe, the chip is powered up by	 * the arch code to allow the code below to work (and to let	 * the chip be probed on the config space. It won't stay powered	 * up until the interface is brought up however, so we can't rely	 * on register configuration done at this point.	 */	err = pci_enable_device(pdev);	if (err) {		printk(KERN_ERR PFX "Cannot enable MMIO operation, "		       "aborting.\n");		return err;	}	pci_set_master(pdev);	/* Configure DMA attributes. */	/* All of the GEM documentation states that 64-bit DMA addressing	 * is fully supported and should work just fine.  However the	 * front end for RIO based GEMs is different and only supports	 * 32-bit addressing.	 *	 * For now we assume the various PPC GEMs are 32-bit only as well.	 */	if (pdev->vendor == PCI_VENDOR_ID_SUN &&	    pdev->device == PCI_DEVICE_ID_SUN_GEM &&	    !pci_set_dma_mask(pdev, (u64) 0xffffffffffffffffULL)) {		pci_using_dac = 1;	} else {		err = pci_set_dma_mask(pdev, (u64) 0xffffffff);		if (err) {			printk(KERN_ERR PFX "No usable DMA configuration, "			       "aborting.\n");			goto err_disable_device;		}		pci_using_dac = 0;	}		gemreg_base = pci_resource_start(pdev, 0);	gemreg_len = pci_resource_len(pdev, 0);	if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {		printk(KERN_ERR PFX "Cannot find proper PCI device "		       "base address, aborting.\n");		err = -ENODEV;		goto err_disable_device;	}	dev = alloc_etherdev(sizeof(*gp));	if (!dev) {		printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n");		err = -ENOMEM;		goto err_disable_device;	}	SET_MODULE_OWNER(dev);	SET_NETDEV_DEV(dev, &pdev->dev);	gp = dev->priv;	err = pci_request_regions(pdev, DRV_NAME);	if (err) {		printk(KERN_ERR PFX "Cannot obtain PCI resources, "		       "aborting.\n");		goto err_out_free_netdev;	}	gp->pdev = pdev;	dev->base_addr = (long) pdev;	gp->dev = dev;	gp->msg_enable = DEFAULT_MSG;	spin_lock_init(&gp->lock);	spin_lock_init(&gp->tx_lock);	init_MUTEX(&gp->pm_sem);	init_timer(&gp->link_timer);	gp->link_timer.function = gem_link_timer;	gp->link_timer.data = (unsigned long) gp;	INIT_WORK(&gp->reset_task, gem_reset_task, gp);		gp->lstate = link_down;	gp->timer_ticks = 0;	netif_carrier_off(dev);	gp->regs = ioremap(gemreg_base, gemreg_len);	if (gp->regs == 0UL) {		printk(KERN_ERR PFX "Cannot map device registers, "		       "aborting.\n");		err = -EIO;		goto err_out_free_res;	}	/* On Apple, we want a reference to the Open Firmware device-tree	 * node. We use it for clock control.	 */#ifdef CONFIG_PPC_PMAC	gp->of_node = pci_device_to_OF_node(pdev);#endif	/* Only Apple version supports WOL afaik */	if (pdev->vendor == PCI_VENDOR_ID_APPLE)		gp->has_wol = 1;	/* Make sure cell is enabled */	gem_get_cell(gp);	/* Make sure everything is stopped and in init state */	gem_reset(gp);	/* Fill up the mii_phy structure (even if we won't use it) */	gp->phy_mii.dev = dev;	gp->phy_mii.mdio_read = _phy_read;	gp->phy_mii.mdio_write = _phy_write;	/* By default, we start with autoneg */	gp->want_autoneg = 1;	/* Check fifo sizes, PHY type, etc... */	if (gem_check_invariants(gp)) {		err = -ENODEV;		goto err_out_iounmap;	}	/* It is guaranteed that the returned buffer will be at least	 * PAGE_SIZE aligned.	 */	gp->init_block = (struct gem_init_block *)		pci_alloc_consistent(pdev, sizeof(struct gem_init_block),				     &gp->gblock_dvma);	if (!gp->init_block) {		printk(KERN_ERR PFX "Cannot allocate init block, "		       "aborting.\n");		err = -ENOMEM;		goto err_out_iounmap;	}	if (gem_get_device_address(gp))		goto err_out_free_consistent;	dev->open = gem_open;	dev->stop = gem_close;	dev->hard_start_xmit = gem_start_xmit;	dev->get_stats = gem_get_stats;	dev->set_multicast_list = gem_set_multicast;	dev->do_ioctl = gem_ioctl;	dev->poll = gem_poll;	dev->weight = 64;	dev->ethtool_ops = &gem_ethtool_ops;	dev->tx_timeout = gem_tx_timeout;	dev->watchdog_timeo = 5 * HZ;	dev->change_mtu = gem_change_mtu;	dev->irq = pdev->irq;	dev->dma = 0;#ifdef CONFIG_NET_POLL_CONTROLLER	dev->poll_controller = gem_poll_controller;#endif	/* Set that now, in case PM kicks in now */	pci_set_drvdata(pdev, dev);	/* Detect & init PHY, start autoneg, we release the cell now	 * too, it will be managed by whoever needs it	 */	gem_init_phy(gp);	spin_lock_irq(&gp->lock);	gem_put_cell(gp);	spin_unlock_irq(&gp->lock);	/* Register with kernel */	if (register_netdev(dev)) {		printk(KERN_ERR PFX "Cannot register net device, "		       "aborting.\n");		err = -ENOMEM;		goto err_out_free_consistent;	}	printk(KERN_INFO "%s: Sun GEM (PCI) 10/100/1000BaseT Ethernet ",	       dev->name);	for (i = 0; i < 6; i++)		printk("%2.2x%c", dev->dev_addr[i],		       i == 5 ? ' ' : ':');	printk("\n");	if (gp->phy_type == phy_mii_mdio0 ||     	    gp->phy_type == phy_mii_mdio1)		printk(KERN_INFO "%s: Found %s PHY\n", dev->name, 			gp->phy_mii.def ? gp->phy_mii.def->name : "no");	/* GEM can do it all... */	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_LLTX;	if (pci_using_dac)		dev->features |= NETIF_F_HIGHDMA;	return 0;err_out_free_consistent:	gem_remove_one(pdev);err_out_iounmap:	gem_put_cell(gp);	iounmap(gp->regs);err_out_free_res:	pci_release_regions(pdev);err_out_free_netdev:	free_netdev(dev);err_disable_device:	pci_disable_device(pdev);	return err;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/1e7f0bd8c8f2d0496ad338be5e69ff4395d77da4/sungem.c/buggy/drivers/net/sungem.c