rxdr->count = 80; 
if(!rxdr->count) rxdr->count = E1000_DEFAULT_RXD; 
e1000_setup_desc_rings(struct e1000_adapter *adapter){	struct e1000_desc_ring *txdr = &adapter->test_tx_ring;	struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;	struct pci_dev *pdev = adapter->pdev;	uint32_t rctl;	int size, i, ret_val;	/* Setup Tx descriptor ring and Tx buffers */	txdr->count = 80;	size = txdr->count * sizeof(struct e1000_buffer);	if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {		ret_val = 1;		goto err_nomem;	}	memset(txdr->buffer_info, 0, size);	txdr->size = txdr->count * sizeof(struct e1000_tx_desc);	E1000_ROUNDUP(txdr->size, 4096);	if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {		ret_val = 2;		goto err_nomem;	}	memset(txdr->desc, 0, txdr->size);	txdr->next_to_use = txdr->next_to_clean = 0;	E1000_WRITE_REG(&adapter->hw, TDBAL,			((uint64_t) txdr->dma & 0x00000000FFFFFFFF));	E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));	E1000_WRITE_REG(&adapter->hw, TDLEN,			txdr->count * sizeof(struct e1000_tx_desc));	E1000_WRITE_REG(&adapter->hw, TDH, 0);	E1000_WRITE_REG(&adapter->hw, TDT, 0);	E1000_WRITE_REG(&adapter->hw, TCTL,			E1000_TCTL_PSP | E1000_TCTL_EN |			E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |			E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);	for(i = 0; i < txdr->count; i++) {		struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);		struct sk_buff *skb;		unsigned int size = 1024;		if(!(skb = alloc_skb(size, GFP_KERNEL))) {			ret_val = 3;			goto err_nomem;		}		skb_put(skb, size);		txdr->buffer_info[i].skb = skb;		txdr->buffer_info[i].length = skb->len;		txdr->buffer_info[i].dma =			pci_map_single(pdev, skb->data, skb->len,				       PCI_DMA_TODEVICE);		tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);		tx_desc->lower.data = cpu_to_le32(skb->len);		tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |						   E1000_TXD_CMD_IFCS |						   E1000_TXD_CMD_RPS);		tx_desc->upper.data = 0;	}	/* Setup Rx descriptor ring and Rx buffers */	rxdr->count = 80;	size = rxdr->count * sizeof(struct e1000_buffer);	if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {		ret_val = 4;		goto err_nomem;	}	memset(rxdr->buffer_info, 0, size);	rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);	if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {		ret_val = 5;		goto err_nomem;	}	memset(rxdr->desc, 0, rxdr->size);	rxdr->next_to_use = rxdr->next_to_clean = 0;	rctl = E1000_READ_REG(&adapter->hw, RCTL);	E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);	E1000_WRITE_REG(&adapter->hw, RDBAL,			((uint64_t) rxdr->dma & 0xFFFFFFFF));	E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));	E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);	E1000_WRITE_REG(&adapter->hw, RDH, 0);	E1000_WRITE_REG(&adapter->hw, RDT, 0);	rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |		E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |		(adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);	E1000_WRITE_REG(&adapter->hw, RCTL, rctl);	for(i = 0; i < rxdr->count; i++) {		struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);		struct sk_buff *skb;		if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, 				GFP_KERNEL))) {			ret_val = 6;			goto err_nomem;		}		skb_reserve(skb, NET_IP_ALIGN);		rxdr->buffer_info[i].skb = skb;		rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;		rxdr->buffer_info[i].dma =			pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,				       PCI_DMA_FROMDEVICE);		rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);		memset(skb->data, 0x00, skb->len);	}	return 0;err_nomem:	e1000_free_desc_rings(adapter);	return ret_val;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/e4eff7291c977308989b24fdfc7215a501302e6a/e1000_ethtool.c/buggy/drivers/net/e1000/e1000_ethtool.c