 if ((busnum == 0) && (PCI_SLOT(devfn) == 0)) /* Galileo itself is devfn 0, don't move it around */ return -1; 
static int gt64120_pcibios_config_access(unsigned char access_type,	struct pci_bus *bus, unsigned int devfn, int where, u32 * data){	unsigned char busnum = bus->number;	u32 intr;	if ((busnum == 0) && (PCI_SLOT(devfn) == 0))		/* Galileo itself is devfn 0, don't move it around */		return -1;	if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0)))		return -1;	/* Because of a bug in the galileo (for slot 31). */	/* Clear cause register bits */	GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |	                             GT_INTRCAUSE_TARABORT0_BIT));	/* Setup address */	GT_WRITE(GT_PCI0_CFGADDR_OFS,		 (busnum << GT_PCI0_CFGADDR_BUSNUM_SHF) |		 (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |		 ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |		 GT_PCI0_CFGADDR_CONFIGEN_BIT);	if (access_type == PCI_ACCESS_WRITE) {		if (busnum == 0 && PCI_SLOT(devfn) == 0) {			/*			 * The Galileo system controller is acting			 * differently than other devices.			 */			GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);		} else			__GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);	} else {		if (busnum == 0 && PCI_SLOT(devfn) == 0) {			/*			 * The Galileo system controller is acting			 * differently than other devices.			 */			*data = GT_READ(GT_PCI0_CFGDATA_OFS);		} else			*data = __GT_READ(GT_PCI0_CFGDATA_OFS);	}	/* Check for master or target abort */	intr = GT_READ(GT_INTRCAUSE_OFS);	if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {		/* Error occurred */		/* Clear bits */		GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |		                             GT_INTRCAUSE_TARABORT0_BIT));		return -1;	}	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/aa0980b8090878bf42bc73a13d051a203a201d7d/ops-gt64120.c/clean/arch/mips/pci/ops-gt64120.c