blksize = (1 << data->blksz_bits) + 2; 
if (host->bus_width == MMC_BUS_WIDTH_1) { blksize = (1 << data->blksz_bits) + 2;  wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0); wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); } else if (host->bus_width == MMC_BUS_WIDTH_4) { blksize = (1 << data->blksz_bits) + 2 * 4; 
static void wbsd_prepare_data(struct wbsd_host* host, struct mmc_data* data){	u16 blksize;	u8 setup;	unsigned long dmaflags;	DBGF("blksz %04x blks %04x flags %08x\n",		1 << data->blksz_bits, data->blocks, data->flags);	DBGF("tsac %d ms nsac %d clk\n",		data->timeout_ns / 1000000, data->timeout_clks);		/*	 * Calculate size.	 */	host->size = data->blocks << data->blksz_bits;	/*	 * Check timeout values for overflow.	 * (Yes, some cards cause this value to overflow).	 */	if (data->timeout_ns > 127000000)		wbsd_write_index(host, WBSD_IDX_TAAC, 127);	else		wbsd_write_index(host, WBSD_IDX_TAAC, data->timeout_ns/1000000);		if (data->timeout_clks > 255)		wbsd_write_index(host, WBSD_IDX_NSAC, 255);	else		wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);		/*	 * Inform the chip of how large blocks will be	 * sent. It needs this to determine when to	 * calculate CRC.	 *	 * Space for CRC must be included in the size.	 */	blksize = (1 << data->blksz_bits) + 2;		wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);	wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);	/*	 * Clear the FIFO. This is needed even for DMA	 * transfers since the chip still uses the FIFO	 * internally.	 */	setup = wbsd_read_index(host, WBSD_IDX_SETUP);	setup |= WBSD_FIFO_RESET;	wbsd_write_index(host, WBSD_IDX_SETUP, setup);		/*	 * DMA transfer?	 */	if (host->dma >= 0)	{			/*		 * The buffer for DMA is only 64 kB.		 */		BUG_ON(host->size > 0x10000);		if (host->size > 0x10000)		{			data->error = MMC_ERR_INVALID;			return;		}				/*		 * Transfer data from the SG list to		 * the DMA buffer.		 */		if (data->flags & MMC_DATA_WRITE)			wbsd_sg_to_dma(host, data);				/*		 * Initialise the ISA DMA controller.		 */			dmaflags = claim_dma_lock();		disable_dma(host->dma);		clear_dma_ff(host->dma);		if (data->flags & MMC_DATA_READ)			set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);		else			set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);		set_dma_addr(host->dma, host->dma_addr);		set_dma_count(host->dma, host->size);		enable_dma(host->dma);		release_dma_lock(dmaflags);		/*		 * Enable DMA on the host.		 */		wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);	}	else	{		/*		 * This flag is used to keep printk		 * output to a minimum.		 */		host->firsterr = 1;				/*		 * Initialise the SG list.		 */		wbsd_init_sg(host, data);			/*		 * Turn off DMA.		 */		wbsd_write_index(host, WBSD_IDX_DMA, 0);			/*		 * Set up FIFO threshold levels (and fill		 * buffer if doing a write).		 */		if (data->flags & MMC_DATA_READ)		{			wbsd_write_index(host, WBSD_IDX_FIFOEN,				WBSD_FIFOEN_FULL | 8);		}		else		{			wbsd_write_index(host, WBSD_IDX_FIFOEN,				WBSD_FIFOEN_EMPTY | 8);			wbsd_fill_fifo(host);		}	}				data->error = MMC_ERR_NONE;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/65ae2118e84616680dce37b951ffc366dcce7cf0/wbsd.c/buggy/drivers/mmc/wbsd.c