hw_cons = bp->status_blk->status_tx_quick_consumer_index0; 
hw_cons = bp->hw_tx_cons = sblk->status_tx_quick_consumer_index0; 
bnx2_tx_int(struct bnx2 *bp){	u16 hw_cons, sw_cons, sw_ring_cons;	int tx_free_bd = 0;	hw_cons = bp->status_blk->status_tx_quick_consumer_index0;	if ((hw_cons & MAX_TX_DESC_CNT) == MAX_TX_DESC_CNT) {		hw_cons++;	}	sw_cons = bp->tx_cons;	while (sw_cons != hw_cons) {		struct sw_bd *tx_buf;		struct sk_buff *skb;		int i, last;		sw_ring_cons = TX_RING_IDX(sw_cons);		tx_buf = &bp->tx_buf_ring[sw_ring_cons];		skb = tx_buf->skb;#ifdef BCM_TSO 		/* partial BD completions possible with TSO packets */		if (skb_shinfo(skb)->tso_size) {			u16 last_idx, last_ring_idx;			last_idx = sw_cons +				skb_shinfo(skb)->nr_frags + 1;			last_ring_idx = sw_ring_cons +				skb_shinfo(skb)->nr_frags + 1;			if (unlikely(last_ring_idx >= MAX_TX_DESC_CNT)) {				last_idx++;			}			if (((s16) ((s16) last_idx - (s16) hw_cons)) > 0) {				break;			}		}#endif		pci_unmap_single(bp->pdev, pci_unmap_addr(tx_buf, mapping),			skb_headlen(skb), PCI_DMA_TODEVICE);		tx_buf->skb = NULL;		last = skb_shinfo(skb)->nr_frags;		for (i = 0; i < last; i++) {			sw_cons = NEXT_TX_BD(sw_cons);			pci_unmap_page(bp->pdev,				pci_unmap_addr(					&bp->tx_buf_ring[TX_RING_IDX(sw_cons)],				       	mapping),				skb_shinfo(skb)->frags[i].size,				PCI_DMA_TODEVICE);		}		sw_cons = NEXT_TX_BD(sw_cons);		tx_free_bd += last + 1;		dev_kfree_skb_irq(skb);		hw_cons = bp->status_blk->status_tx_quick_consumer_index0;		if ((hw_cons & MAX_TX_DESC_CNT) == MAX_TX_DESC_CNT) {			hw_cons++;		}	}	bp->tx_cons = sw_cons;	if (unlikely(netif_queue_stopped(bp->dev))) {		spin_lock(&bp->tx_lock);		if ((netif_queue_stopped(bp->dev)) &&		    (bnx2_tx_avail(bp) > MAX_SKB_FRAGS)) {			netif_wake_queue(bp->dev);		}		spin_unlock(&bp->tx_lock);	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/f4e418f7f3286f854883f9f7e3bbf7005340d2de/bnx2.c/buggy/drivers/net/bnx2.c