static int nxt2002_setup_frontend_parameters (struct dvb_frontend* fe,					     struct dvb_frontend_parameters *p){	struct nxt2002_state* state = fe->demodulator_priv;	u32 freq = 0;	u16 tunerfreq = 0;	u8 buf[4];	freq = 44000 + ( p->frequency / 1000 );	dprintk("freq = %d      p->frequency = %d\n",freq,p->frequency);	tunerfreq = freq * 24/4000;	buf[0] = (tunerfreq >> 8) & 0x7F;	buf[1] = (tunerfreq & 0xFF);	if (p->frequency <= 214000000) {		buf[2] = 0x84 + (0x06 << 3);		buf[3] = (p->frequency <= 172000000) ? 0x01 : 0x02;	} else if (p->frequency <= 721000000) {		buf[2] = 0x84 + (0x07 << 3);		buf[3] = (p->frequency <= 467000000) ? 0x02 : 0x08;	} else if (p->frequency <= 841000000) {		buf[2] = 0x84 + (0x0E << 3);		buf[3] = 0x08;	} else {		buf[2] = 0x84 + (0x0F << 3);		buf[3] = 0x02;	}	/* write frequency information */	nxt2002_writetuner(state,buf);	/* reset the agc now that tuning has been completed */	nxt2002_agc_reset(state);	/* set target power level */	switch (p->u.vsb.modulation) {		case QAM_64:		case QAM_256:				buf[0] = 0x74;				break;		case VSB_8:				buf[0] = 0x70;				break;		default:				return -EINVAL;				break;	}	i2c_writebytes(state,0x42,buf,1);	/* configure sdm */	buf[0] = 0x87;	i2c_writebytes(state,0x57,buf,1);	/* write sdm1 input */	buf[0] = 0x10;	buf[1] = 0x00;	nxt2002_writereg_multibyte(state,0x58,buf,2);	/* write sdmx input */	switch (p->u.vsb.modulation) {		case QAM_64:				buf[0] = 0x68;				break;		case QAM_256:				buf[0] = 0x64;				break;		case VSB_8:				buf[0] = 0x60;				break;		default:				return -EINVAL;				break;	}	buf[1] = 0x00;	nxt2002_writereg_multibyte(state,0x5C,buf,2);	/* write adc power lpf fc */	buf[0] = 0x05;	i2c_writebytes(state,0x43,buf,1);	/* write adc power lpf fc */	buf[0] = 0x05;	i2c_writebytes(state,0x43,buf,1);	/* write accumulator2 input */	buf[0] = 0x80;	buf[1] = 0x00;	nxt2002_writereg_multibyte(state,0x4B,buf,2);	/* write kg1 */	buf[0] = 0x00;	i2c_writebytes(state,0x4D,buf,1);	/* write sdm12 lpf fc */	buf[0] = 0x44;	i2c_writebytes(state,0x55,buf,1);	/* write agc control reg */	buf[0] = 0x04;	i2c_writebytes(state,0x41,buf,1);	/* write agc ucgp0 */	switch (p->u.vsb.modulation) {		case QAM_64:				buf[0] = 0x02;				break;		case QAM_256:				buf[0] = 0x03;				break;		case VSB_8:				buf[0] = 0x00;				break;		default:				return -EINVAL;				break;	}	i2c_writebytes(state,0x30,buf,1);	/* write agc control reg */	buf[0] = 0x00;	i2c_writebytes(state,0x41,buf,1);	/* write accumulator2 input */	buf[0] = 0x80;	buf[1] = 0x00;	nxt2002_writereg_multibyte(state,0x49,buf,2);	nxt2002_writereg_multibyte(state,0x4B,buf,2);	/* write agc control reg */	buf[0] = 0x04;	i2c_writebytes(state,0x41,buf,1);	nxt2002_microcontroller_start(state);	/* adjacent channel detection should be done here, but I don't	have any stations with this need so I cannot test it */	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/0b3f5a57bf110b519b706365c86ada199075f34e/nxt2002.c/buggy/drivers/media/dvb/frontends/nxt2002.c