/* 
/* 
static void python_countermeasures(struct device_node *dev,				   unsigned int addr_size_words){	struct reg_property64 reg_struct;	void __iomem *chip_regs;	volatile u32 val;	if (get_phb_reg_prop(dev, addr_size_words, &reg_struct))		return;	/* Python's register file is 1 MB in size. */	chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000);	/* 	 * Firmware doesn't always clear this bit which is critical	 * for good performance - Anton	 */#define PRG_CL_RESET_VALID 0x00010000	val = in_be32(chip_regs + 0xf6030);	if (val & PRG_CL_RESET_VALID) {		printk(KERN_INFO "Python workaround: ");		val &= ~PRG_CL_RESET_VALID;		out_be32(chip_regs + 0xf6030, val);		/*		 * We must read it back for changes to		 * take effect		 */		val = in_be32(chip_regs + 0xf6030);		printk("reg0: %x\n", val);	}	iounmap(chip_regs);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/ae65a391caf1830aea9e4cadd69bb1aa69aad492/rtas_pci.c/clean/arch/ppc64/kernel/rtas_pci.c