#if defined(CONFIG_WALNUT) || defined(CONFIG_ASH) || defined(CONFIG_SYCAMORE) 
#if defined(CONFIG_WALNUT) || defined(CONFIG_SYCAMORE) 
ppc4xx_calibrate_decr(void){	unsigned int freq;	bd_t *bip = &__res;#if defined(CONFIG_WALNUT) || defined(CONFIG_ASH) || defined(CONFIG_SYCAMORE)	/* Walnut boot rom sets DCR CHCR1 (aka CPC0_CR1) bit CETE to 1 */	mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE);#endif	freq = bip->bi_tbfreq;	tb_ticks_per_jiffy = freq / HZ;	tb_to_us = mulhwu_scale_factor(freq, 1000000);	/* Set the time base to zero.	   ** At 200 Mhz, time base will rollover in ~2925 years.	 */	mtspr(SPRN_TBWL, 0);	mtspr(SPRN_TBWU, 0);	/* Clear any pending timer interrupts */	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS);	mtspr(SPRN_TCR, TCR_PIE | TCR_ARE);	/* Set the PIT reload value and just let it run. */	mtspr(SPRN_PIT, tb_ticks_per_jiffy);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/f4f1269cb36adfb452c04dcb3d40f51b8a1956bb/ppc4xx_setup.c/buggy/arch/ppc/syslib/ppc4xx_setup.c