cached_kn02_csr &= ~KN03_CSR_IOINTEN; 
cached_kn02_csr &= ~KN02_CSR_IOINTEN; 
void __init init_kn02_irqs(int base){	volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;	unsigned long flags;	int i;	/* Mask interrupts. */	spin_lock_irqsave(&kn02_lock, flags);	cached_kn02_csr &= ~KN03_CSR_IOINTEN;	*csr = cached_kn02_csr;	iob();	spin_unlock_irqrestore(&kn02_lock, flags);	for (i = base; i < base + KN02_IRQ_LINES; i++) {		irq_desc[i].status = IRQ_DISABLED;		irq_desc[i].action = 0;		irq_desc[i].depth = 1;		irq_desc[i].handler = &kn02_irq_type;	}	kn02_irq_base = base;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/64dac503e8265007ea5c53b4d6bf42488a8a8d7a/kn02-irq.c/buggy/arch/mips/dec/kn02-irq.c