if (unlikely(lpar_rc != H_Success)) 
if (unlikely(lpar_rc != H_Success)) { if (!(vflags & HPTE_V_BOLTED)) DBG_LOW(" lpar err %d\n", lpar_rc); 
long pSeries_lpar_hpte_insert(unsigned long hpte_group,			      unsigned long va, unsigned long prpn,			      unsigned long vflags, unsigned long rflags){	unsigned long lpar_rc;	unsigned long flags;	unsigned long slot;	unsigned long hpte_v, hpte_r;	unsigned long dummy0, dummy1;	hpte_v = ((va >> 23) << HPTE_V_AVPN_SHIFT) | vflags | HPTE_V_VALID;	if (vflags & HPTE_V_LARGE)		hpte_v &= ~(1UL << HPTE_V_AVPN_SHIFT);	hpte_r = (prpn << HPTE_R_RPN_SHIFT) | rflags;	/* Now fill in the actual HPTE */	/* Set CEC cookie to 0         */	/* Zero page = 0               */	/* I-cache Invalidate = 0      */	/* I-cache synchronize = 0     */	/* Exact = 0                   */	flags = 0;	/* XXX why is this here? - Anton */	if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))		hpte_r &= ~_PAGE_COHERENT;	lpar_rc = plpar_hcall(H_ENTER, flags, hpte_group, hpte_v,			      hpte_r, &slot, &dummy0, &dummy1);	if (unlikely(lpar_rc == H_PTEG_Full))		return -1;	/*	 * Since we try and ioremap PHBs we don't own, the pte insert	 * will fail. However we must catch the failure in hash_page	 * or we will loop forever, so return -2 in this case.	 */	if (unlikely(lpar_rc != H_Success))		return -2;	/* Because of iSeries, we have to pass down the secondary	 * bucket bit here as well	 */	return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/3c726f8dee6f55e96475574e9f645327e461884c/lpar.c/clean/arch/powerpc/platforms/pseries/lpar.c