pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) { 
pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { 
void SkGeDeInit(SK_AC	*pAC,		/* adapter context */SK_IOC	IoC)		/* IO context */{	int	i;	SK_U16	Word;#ifdef SK_PHY_LP_MODE	SK_U8	Byte;	SK_U16	PmCtlSts;#endif /* SK_PHY_LP_MODE */#if (!defined(SK_SLIM) && !defined(VCPU))	/* ensure I2C is ready */	SkI2cWaitIrq(pAC, IoC);#endif		/* stop all current transfer activity */	for (i = 0; i < pAC->GIni.GIMacsFound; i++) {		if (pAC->GIni.GP[i].PState != SK_PRT_STOP &&			pAC->GIni.GP[i].PState != SK_PRT_RESET) {			SkGeStopPort(pAC, IoC, i, SK_STOP_ALL, SK_HARD_RST);		}	}#ifdef SK_PHY_LP_MODE    /*	 * for power saving purposes within mobile environments	 * we set the PHY to coma mode and switch to D3 power state.	 */	if (pAC->GIni.GIYukonLite &&		pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {		/* for all ports switch PHY to coma mode */		for (i = 0; i < pAC->GIni.GIMacsFound; i++) {						SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP);		}		if (pAC->GIni.GIVauxAvail) {			/* switch power to VAUX */			Byte = PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF;			SK_OUT8(IoC, B0_POWER_CTRL, Byte);		}				/* switch to D3 state */		SK_IN16(IoC, PCI_C(PCI_PM_CTL_STS), &PmCtlSts);		PmCtlSts |= PCI_PM_STATE_D3;		SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);		SK_OUT16(IoC, PCI_C(PCI_PM_CTL_STS), PmCtlSts);	}#endif /* SK_PHY_LP_MODE */	/* Reset all bits in the PCI STATUS register */	/*	 * Note: PCI Cfg cycles cannot be used, because they are not	 *	 available on some platforms after 'boot time'.	 */	SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);		SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);	SK_OUT16(IoC, PCI_C(PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));	SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);	/* do the reset, all LEDs are switched off now */	SK_OUT8(IoC, B0_CTST, CS_RST_SET);		pAC->GIni.GILevel = SK_INIT_DATA;}	/* SkGeDeInit */
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/3f309db33e7868fe11f8fc3a0dd291703df3c662/skgeinit.c/clean/drivers/net/sk98lin/skgeinit.c