} else { 
void nmi_watchdog_tick (struct pt_regs * regs){	/*	 * Since current_thread_info()-> is always on the stack, and we	 * always switch the stack NMI-atomically, it's safe to use	 * smp_processor_id().	 */	int sum, cpu = smp_processor_id();	sum = per_cpu(irq_stat, cpu).apic_timer_irqs;	if (last_irq_sums[cpu] == sum) {		/*		 * Ayiee, looks like this CPU is stuck ...		 * wait a few IRQs (5 seconds) before doing the oops ...		 */		alert_counter[cpu]++;		if (alert_counter[cpu] == 5*nmi_hz)			die_nmi(regs, "NMI Watchdog detected LOCKUP");	} else {		last_irq_sums[cpu] = sum;		alert_counter[cpu] = 0;	}	if (nmi_perfctr_msr) {		if (nmi_perfctr_msr == MSR_P4_IQ_COUNTER0) {			/*			 * P4 quirks:			 * - An overflown perfctr will assert its interrupt			 *   until the OVF flag in its CCCR is cleared.			 * - LVTPC is masked on interrupt and must be			 *   unmasked by the LVTPC handler.			 */			wrmsr(MSR_P4_IQ_CCCR0, nmi_p4_cccr_val, 0);			apic_write(APIC_LVTPC, APIC_DM_NMI);		}		else if (nmi_perfctr_msr == MSR_P6_PERFCTR0) {			/* Only P6 based Pentium M need to re-unmask			 * the apic vector but it doesn't hurt			 * other P6 variant */			apic_write(APIC_LVTPC, APIC_DM_NMI);		}		write_watchdog_counter(NULL);	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/748f2edb52712aa3d926470a888608dc500d17e8/nmi.c/buggy/arch/i386/kernel/nmi.c