void __init early_identify_cpu(struct cpuinfo_x86 *c) 
void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) 
void __init early_identify_cpu(struct cpuinfo_x86 *c){	u32 tfms;	c->loops_per_jiffy = loops_per_jiffy;	c->x86_cache_size = -1;	c->x86_vendor = X86_VENDOR_UNKNOWN;	c->x86_model = c->x86_mask = 0;	/* So far unknown... */	c->x86_vendor_id[0] = '\0'; /* Unset */	c->x86_model_id[0] = '\0';  /* Unset */	c->x86_clflush_size = 64;	c->x86_cache_alignment = c->x86_clflush_size;	c->x86_num_cores = 1;	c->extended_cpuid_level = 0;	memset(&c->x86_capability, 0, sizeof c->x86_capability);	/* Get vendor name */	cpuid(0x00000000, (unsigned int *)&c->cpuid_level,	      (unsigned int *)&c->x86_vendor_id[0],	      (unsigned int *)&c->x86_vendor_id[8],	      (unsigned int *)&c->x86_vendor_id[4]);			get_cpu_vendor(c);	/* Initialize the standard set of capabilities */	/* Note that the vendor-specific code below might override */	/* Intel-defined flags: level 0x00000001 */	if (c->cpuid_level >= 0x00000001) {		__u32 misc;		cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],		      &c->x86_capability[0]);		c->x86 = (tfms >> 8) & 0xf;		c->x86_model = (tfms >> 4) & 0xf;		c->x86_mask = tfms & 0xf;		if (c->x86 == 0xf) {			c->x86 += (tfms >> 20) & 0xff;			c->x86_model += ((tfms >> 16) & 0xF) << 4;		} 		if (c->x86_capability[0] & (1<<19)) 			c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;	} else {		/* Have CPUID level 0 only - unheard of */		c->x86 = 4;	}#ifdef CONFIG_SMP	phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;#endif}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/e6982c671c560da4a0bc5c908cbcbec12bd5991d/setup.c/clean/arch/x86_64/kernel/setup.c