case 0x041: /* Stack Fault */ case 0x241: /* Stack Fault | Direction */ 
/* * swd & 0x240 == 0x040: Stack Underflow * swd & 0x240 == 0x240: Stack Overflow * User must clear the SF bit (0x40) if set */ 
void math_error(void __user *eip){	struct task_struct * task;	siginfo_t info;	unsigned short cwd, swd;	/*	 * Save the info for the exception handler and clear the error.	 */	task = current;	save_init_fpu(task);	task->thread.trap_no = 16;	task->thread.error_code = 0;	info.si_signo = SIGFPE;	info.si_errno = 0;	info.si_code = __SI_FAULT;	info.si_addr = eip;	/*	 * (~cwd & swd) will mask out exceptions that are not set to unmasked	 * status.  0x3f is the exception bits in these regs, 0x200 is the	 * C1 reg you need in case of a stack fault, 0x040 is the stack	 * fault bit.  We should only be taking one exception at a time,	 * so if this combination doesn't produce any single exception,	 * then we have a bad program that isn't syncronizing its FPU usage	 * and it will suffer the consequences since we won't be able to	 * fully reproduce the context of the exception	 */	cwd = get_fpu_cwd(task);	swd = get_fpu_swd(task);	switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) {		case 0x000:		default:			break;		case 0x001: /* Invalid Op */		case 0x041: /* Stack Fault */		case 0x241: /* Stack Fault | Direction */			info.si_code = FPE_FLTINV;			/* Should we clear the SF or let user space do it ???? */			break;		case 0x002: /* Denormalize */		case 0x010: /* Underflow */			info.si_code = FPE_FLTUND;			break;		case 0x004: /* Zero Divide */			info.si_code = FPE_FLTDIV;			break;		case 0x008: /* Overflow */			info.si_code = FPE_FLTOVF;			break;		case 0x020: /* Precision */			info.si_code = FPE_FLTRES;			break;	}	force_sig_info(SIGFPE, &info, task);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/b1daec3089a129a67169d3ae975985a7480fe17f/traps.c/buggy/arch/i386/kernel/traps.c