DRM_GET_USER_UNCHECKED(mask, &((const drm_savage_cmd_header_t *)data) ->clear1.mask); DRM_GET_USER_UNCHECKED(value, &((const drm_savage_cmd_header_t *)data) ->clear1.value); 
DRM_GET_USER_UNCHECKED(mask, &data->clear1.mask); DRM_GET_USER_UNCHECKED(value, &data->clear1.value); 
static int savage_dispatch_clear(drm_savage_private_t * dev_priv,				 const drm_savage_cmd_header_t * cmd_header,				 const drm_savage_cmd_header_t __user * data,				 unsigned int nbox,				 const drm_clip_rect_t __user * usr_boxes){	unsigned int flags = cmd_header->clear0.flags, mask, value;	unsigned int clear_cmd;	unsigned int i, nbufs;	DMA_LOCALS;	if (nbox == 0)		return 0;	DRM_GET_USER_UNCHECKED(mask, &((const drm_savage_cmd_header_t *)data)			       ->clear1.mask);	DRM_GET_USER_UNCHECKED(value, &((const drm_savage_cmd_header_t *)data)			       ->clear1.value);	clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP |	    BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW;	BCI_CMD_SET_ROP(clear_cmd, 0xCC);	nbufs = ((flags & SAVAGE_FRONT) ? 1 : 0) +	    ((flags & SAVAGE_BACK) ? 1 : 0) + ((flags & SAVAGE_DEPTH) ? 1 : 0);	if (nbufs == 0)		return 0;	if (mask != 0xffffffff) {		/* set mask */		BEGIN_DMA(2);		DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1);		DMA_WRITE(mask);		DMA_COMMIT();	}	for (i = 0; i < nbox; ++i) {		drm_clip_rect_t box;		unsigned int x, y, w, h;		unsigned int buf;		DRM_COPY_FROM_USER_UNCHECKED(&box, &usr_boxes[i], sizeof(box));		x = box.x1, y = box.y1;		w = box.x2 - box.x1;		h = box.y2 - box.y1;		BEGIN_DMA(nbufs * 6);		for (buf = SAVAGE_FRONT; buf <= SAVAGE_DEPTH; buf <<= 1) {			if (!(flags & buf))				continue;			DMA_WRITE(clear_cmd);			switch (buf) {			case SAVAGE_FRONT:				DMA_WRITE(dev_priv->front_offset);				DMA_WRITE(dev_priv->front_bd);				break;			case SAVAGE_BACK:				DMA_WRITE(dev_priv->back_offset);				DMA_WRITE(dev_priv->back_bd);				break;			case SAVAGE_DEPTH:				DMA_WRITE(dev_priv->depth_offset);				DMA_WRITE(dev_priv->depth_bd);				break;			}			DMA_WRITE(value);			DMA_WRITE(BCI_X_Y(x, y));			DMA_WRITE(BCI_W_H(w, h));		}		DMA_COMMIT();	}	if (mask != 0xffffffff) {		/* reset mask */		BEGIN_DMA(2);		DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1);		DMA_WRITE(0xffffffff);		DMA_COMMIT();	}	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/b3a83639895a422b25f72eec0a5d1d88c3ac4e9e/savage_state.c/buggy/drivers/char/drm/savage_state.c