dprintk(1, "cx8802_start_mpegport_dma %d\n", buf->vb.width); 
dprintk(0, "cx8802_start_dma %d\n", buf->vb.width); 
static int cx8802_start_dma(struct cx8802_dev    *dev,			    struct cx88_dmaqueue *q,			    struct cx88_buffer   *buf){	struct cx88_core *core = dev->core;	dprintk(1, "cx8802_start_mpegport_dma %d\n", buf->vb.width);	/* setup fifo + format */	cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28],				dev->ts_packet_size, buf->risc.dma);	/* write TS length to chip */	cx_write(MO_TS_LNGTH, buf->vb.width);#if 1	/* FIXME: this needs a review.	 * also: move to cx88-blackbird + cx88-dvb source files? */	if (cx88_boards[core->board].dvb) {		/* negedge driven & software reset */		cx_write(TS_GEN_CNTRL, 0x40);		udelay(100);		cx_write(MO_PINMUX_IO, 0x00);		cx_write(TS_HW_SOP_CNTRL,47<<16|188<<4|0x00);		cx_write(TS_SOP_STAT,0x00);		cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl);		udelay(100);	}	if (cx88_boards[core->board].blackbird) {		cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */		// cx_write(TS_F2_CMD_STAT_MM, 0x2900106); /* F2_CMD_STAT_MM defaults + master + memory space */		cx_write(TS_GEN_CNTRL, 0x46); /* punctured clock TS & posedge driven & software reset */		udelay(100);		cx_write(TS_HW_SOP_CNTRL, 0x408); /* mpeg start byte */		//cx_write(TS_HW_SOP_CNTRL, 0x2F0BC0); /* mpeg start byte ts: 0x2F0BC0 ? */		cx_write(TS_VALERR_CNTRL, 0x2000);		cx_write(TS_GEN_CNTRL, 0x06); /* punctured clock TS & posedge driven */		udelay(100);	}#endif	/* reset counter */	cx_write(MO_TS_GPCNTRL, GP_COUNT_CONTROL_RESET);	q->count = 1;	/* enable irqs */	cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x04);	cx_write(MO_TS_INTMSK,  0x1f0011);	/* start dma */	cx_write(MO_DEV_CNTRL2, (1<<5)); /* FIXME: s/write/set/ ??? */	cx_write(MO_TS_DMACNTRL, 0x11);	return 0;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/b45009b0288a96a3458f4f8e93cb776678d41875/cx88-mpeg.c/clean/drivers/media/video/cx88/cx88-mpeg.c