u8 ier = readb(&ch->ch_neo_uart->ier); u8 efr = readb(&ch->ch_neo_uart->efr); 
u8 ier, efr; ier = readb(&ch->ch_neo_uart->ier); efr = readb(&ch->ch_neo_uart->efr); 
static void neo_set_rts_flow_control(struct jsm_channel *ch){	u8 ier = readb(&ch->ch_neo_uart->ier);	u8 efr = readb(&ch->ch_neo_uart->efr);	jsm_printk(PARAM, INFO, &ch->ch_bd->pci_dev, "Setting RTSFLOW\n");	/* Turn on auto RTS flow control */	ier |= (UART_17158_IER_RTSDTR);	efr |= (UART_17158_EFR_ECB | UART_17158_EFR_RTSDTR);	/* Turn off auto Xoff flow control */	ier &= ~(UART_17158_IER_XOFF);	efr &= ~(UART_17158_EFR_IXOFF);	/* Why? Becuz Exar's spec says we have to zero it out before setting it */	writeb(0, &ch->ch_neo_uart->efr);	/* Turn on UART enhanced bits */	writeb(efr, &ch->ch_neo_uart->efr);	writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr);	ch->ch_r_watermark = 4;	writeb(56, &ch->ch_neo_uart->rfifo);	ch->ch_r_tlevel = 56;	writeb(ier, &ch->ch_neo_uart->ier);	/*	 * From the Neo UART spec sheet:	 * The auto RTS/DTR function must be started by asserting	 * RTS/DTR# output pin (MCR bit-0 or 1 to logic 1 after	 * it is enabled.	 */	ch->ch_mostat |= (UART_MCR_RTS);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/c223695634fb360ed65e5a811161853a05e46962/jsm_neo.c/clean/drivers/serial/jsm/jsm_neo.c