return -ENOMEM; 
ret = -ENOMEM; goto exit_disable_device; 
static int zt5550_hc_config(struct pci_dev *pdev){	/* Since we know that no boards exist with two HC chips, treat it as an error */	if(hc_dev) {		err("too many host controller devices?");		return -EBUSY;	}	hc_dev = pdev;	dbg("hc_dev = %p", hc_dev);	dbg("pci resource start %lx", pci_resource_start(hc_dev, 1));	dbg("pci resource len %lx", pci_resource_len(hc_dev, 1));	if(!request_mem_region(pci_resource_start(hc_dev, 1),				pci_resource_len(hc_dev, 1), MY_NAME)) {		err("cannot reserve MMIO region");		return -ENOMEM;	}	hc_registers =	    ioremap(pci_resource_start(hc_dev, 1), pci_resource_len(hc_dev, 1));	if(!hc_registers) {		err("cannot remap MMIO region %lx @ %lx",		    pci_resource_len(hc_dev, 1), pci_resource_start(hc_dev, 1));		release_mem_region(pci_resource_start(hc_dev, 1),				   pci_resource_len(hc_dev, 1));		return -ENODEV;	}	csr_hc_index = hc_registers + CSR_HCINDEX;	csr_hc_data = hc_registers + CSR_HCDATA;	csr_int_status = hc_registers + CSR_INTSTAT;	csr_int_mask = hc_registers + CSR_INTMASK;	/*	 * Disable host control, fault and serial interrupts	 */	dbg("disabling host control, fault and serial interrupts");	writeb((u8) HC_INT_MASK_REG, csr_hc_index);	writeb((u8) ALL_INDEXED_INTS_MASK, csr_hc_data);	dbg("disabled host control, fault and serial interrupts");	/*	 * Disable timer0, timer1 and ENUM interrupts	 */	dbg("disabling timer0, timer1 and ENUM interrupts");	writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask);	dbg("disabled timer0, timer1 and ENUM interrupts");	return 0;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/c8920f0c8b3b42537ab4a54ff92c11daf48fdfec/cpcihp_zt5550.c/clean/drivers/pci/hotplug/cpcihp_zt5550.c