reg2 = pci_bus_clock_list(speed, (struct chipset_bus_clock_list_entry *) pci_get_drvdata(dev)); 
reg2 = pci_bus_clock_list(speed, info->speed);  
static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed){	struct pci_dev *dev	= HWIF(drive)->pci_dev;	u8 speed		= hpt3xx_ratefilter(drive, xferspeed);//	u8 speed		= ide_rate_filter(hpt3xx_ratemask(drive), xferspeed);	u8 regtime		= (drive->select.b.unit & 0x01) ? 0x44 : 0x40;	u8 regfast		= (HWIF(drive)->channel) ? 0x55 : 0x51;	u8 drive_fast		= 0;	u32 reg1 = 0, reg2	= 0;	/*	 * Disable the "fast interrupt" prediction.	 */	pci_read_config_byte(dev, regfast, &drive_fast);#if 0	if (drive_fast & 0x02)		pci_write_config_byte(dev, regfast, drive_fast & ~0x20);#else	if (drive_fast & 0x80)		pci_write_config_byte(dev, regfast, drive_fast & ~0x80);#endif	reg2 = pci_bus_clock_list(speed,		(struct chipset_bus_clock_list_entry *) pci_get_drvdata(dev));	/*	 * Disable on-chip PIO FIFO/buffer	 *  (to avoid problems handling I/O errors later)	 */	pci_read_config_dword(dev, regtime, &reg1);	if (speed >= XFER_MW_DMA_0) {		reg2 = (reg2 & ~0xc0000000) | (reg1 & 0xc0000000);	} else {		reg2 = (reg2 & ~0x30070000) | (reg1 & 0x30070000);	}		reg2 &= ~0x80000000;	pci_write_config_dword(dev, regtime, reg2);	return ide_config_drive_speed(drive, speed);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/b39b01ffb75e14ed76510e4229ffb575007df0fb/hpt366.c/buggy/drivers/ide/pci/hpt366.c