uaddr += PAGE_SIZE; 
uaddr += TCE_PAGE_SIZE; 
static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages,		unsigned long uaddr, enum dma_data_direction direction){	u64 rc;	union tce_entry tce;	while (npages--) {		tce.te_word = 0;		tce.te_bits.tb_rpn = virt_to_abs(uaddr) >> PAGE_SHIFT;		if (tbl->it_type == TCE_VB) {			/* Virtual Bus */			tce.te_bits.tb_valid = 1;			tce.te_bits.tb_allio = 1;			if (direction != DMA_TO_DEVICE)				tce.te_bits.tb_rdwr = 1;		} else {			/* PCI Bus */			tce.te_bits.tb_rdwr = 1; /* Read allowed */			if (direction != DMA_TO_DEVICE)				tce.te_bits.tb_pciwr = 1;		}		rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index,				tce.te_word);		if (rc)			panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",					rc);		index++;		uaddr += PAGE_SIZE;	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/3c726f8dee6f55e96475574e9f645327e461884c/iommu.c/buggy/arch/powerpc/platforms/iseries/iommu.c