dinitprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n", 
ddvprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n", 
mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum){	u8			*pbuf;	dma_addr_t		 buf_dma;	CONFIGPARMS		 cfg;	ConfigPageHeader_t	 header;	int			 ii;	int			 data, rc = 0;	/* Allocate memory	 */	if (!ioc->spi_data.nvram) {		int	 sz;		u8	*mem;		sz = MPT_MAX_SCSI_DEVICES * sizeof(int);		mem = kmalloc(sz, GFP_ATOMIC);		if (mem == NULL)			return -EFAULT;		ioc->spi_data.nvram = (int *) mem;		dprintk((MYIOC_s_INFO_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",			ioc->name, ioc->spi_data.nvram, sz));	}	/* Invalidate NVRAM information	 */	for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {		ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;	}	/* Read SPP0 header, allocate memory, then read page.	 */	header.PageVersion = 0;	header.PageLength = 0;	header.PageNumber = 0;	header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;	cfg.cfghdr.hdr = &header;	cfg.physAddr = -1;	cfg.pageAddr = portnum;	cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;	cfg.dir = 0;	cfg.timeout = 0;	/* use default */	if (mpt_config(ioc, &cfg) != 0)		 return -EFAULT;	if (header.PageLength > 0) {		pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);		if (pbuf) {			cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;			cfg.physAddr = buf_dma;			if (mpt_config(ioc, &cfg) != 0) {				ioc->spi_data.maxBusWidth = MPT_NARROW;				ioc->spi_data.maxSyncOffset = 0;				ioc->spi_data.minSyncFactor = MPT_ASYNC;				ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;				rc = 1;			} else {				/* Save the Port Page 0 data				 */				SCSIPortPage0_t  *pPP0 = (SCSIPortPage0_t  *) pbuf;				pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);				pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);				if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {					ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;					dinitprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n",						ioc->name, pPP0->Capabilities));				}				ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;				data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;				if (data) {					ioc->spi_data.maxSyncOffset = (u8) (data >> 16);					data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;					ioc->spi_data.minSyncFactor = (u8) (data >> 8);				} else {					ioc->spi_data.maxSyncOffset = 0;					ioc->spi_data.minSyncFactor = MPT_ASYNC;				}				ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;				/* Update the minSyncFactor based on bus type.				 */				if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||					(ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE))  {				if (ioc->spi_data.minSyncFactor < MPT_ULTRA)						ioc->spi_data.minSyncFactor = MPT_ULTRA;				}			}			if (pbuf) {				pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);			}		}	}	/* SCSI Port Page 2 - Read the header then the page.	 */	header.PageVersion = 0;	header.PageLength = 0;	header.PageNumber = 2;	header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;	cfg.cfghdr.hdr = &header;	cfg.physAddr = -1;	cfg.pageAddr = portnum;	cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;	cfg.dir = 0;	if (mpt_config(ioc, &cfg) != 0)		return -EFAULT;	if (header.PageLength > 0) {		/* Allocate memory and read SCSI Port Page 2		 */		pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);		if (pbuf) {			cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;			cfg.physAddr = buf_dma;			if (mpt_config(ioc, &cfg) != 0) {				/* Nvram data is left with INVALID mark				 */				rc = 1;			} else {				SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t  *) pbuf;				MpiDeviceInfo_t	*pdevice = NULL;				/* Save the Port Page 2 data				 * (reformat into a 32bit quantity)				 */				data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;				ioc->spi_data.PortFlags = data;				for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {					pdevice = &pPP2->DeviceSettings[ii];					data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |						(pdevice->SyncFactor << 8) | pdevice->Timeout;					ioc->spi_data.nvram[ii] = data;				}			}			pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);		}	}	/* Update Adapter limits with those from NVRAM	 * Comment: Don't need to do this. Target performance	 * parameters will never exceed the adapters limits.	 */	return rc;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/c6678e0cfb41b029c3600c54b5bb65954de1230a/mptbase.c/clean/drivers/message/fusion/mptbase.c