memcpy(pda->cnodeid_to_nasid_table, pdacpu(0)->cnodeid_to_nasid_table, sizeof(pda->cnodeid_to_nasid_table)); 
/* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */ memcpy(sn_cnodeid_to_nasid, (&per_cpu(__sn_cnodeid_to_nasid, 0)), sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid))); 
void __init sn_cpu_init(void){	int cpuid;	int cpuphyid;	int nasid;	int subnode;	int slice;	int cnode;	int i;	static int wars_have_been_checked;	memset(pda, 0, sizeof(pda));	if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift,				&sn_system_size, &sn_sharing_domain_size, &sn_partition_id,				&sn_coherency_id, &sn_region_size))		BUG();	sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;	/*	 * The boot cpu makes this call again after platform initialization is	 * complete.	 */	if (nodepdaindr[0] == NULL)		return;	cpuid = smp_processor_id();	cpuphyid = get_sapicid();	if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))		BUG();	for (i=0; i < MAX_NUMNODES; i++) {		if (nodepdaindr[i]) {			nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;			nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;			nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;		}	}	cnode = nasid_to_cnodeid(nasid);	pda->p_nodepda = nodepdaindr[cnode];	pda->led_address =	    (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));	pda->led_state = LED_ALWAYS_SET;	pda->hb_count = HZ / 2;	pda->hb_state = 0;	pda->idle_flag = 0;	if (cpuid != 0) {		memcpy(pda->cnodeid_to_nasid_table,		       pdacpu(0)->cnodeid_to_nasid_table,		       sizeof(pda->cnodeid_to_nasid_table));	}	/*	 * Check for WARs.	 * Only needs to be done once, on BSP.	 * Has to be done after loop above, because it uses pda.cnodeid_to_nasid_table[i].	 * Has to be done before assignment below.	 */	if (!wars_have_been_checked) {		sn_check_for_wars();		wars_have_been_checked = 1;	}	sn_hub_info->shub_1_1_found = shub_1_1_found;	/*	 * Set up addresses of PIO/MEM write status registers.	 */	{		u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};		u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1, 			SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3};		u64 *pio;		pio = is_shub1() ? pio1 : pio2;		pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);		pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;	}	/*	 * WAR addresses for SHUB 1.x.	 */	if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {		int buddy_nasid;		buddy_nasid =		    cnodeid_to_nasid(numa_node_id() ==				     num_online_nodes() - 1 ? 0 : numa_node_id() + 1);		pda->pio_shub_war_cam_addr =		    (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,							      SH1_PI_CAM_CONTROL);	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/2e34f07ff0c944399a6456e2d91cf0ca1d9a497c/setup.c/clean/arch/ia64/sn/kernel/setup.c