((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "X" : ""), ((tp->tg3_flags & TG3_FLAG_PCI_HIGH_SPEED) ? ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "133MHz" : "66MHz") : ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "100MHz" : "33MHz")), ((tp->tg3_flags & TG3_FLAG_PCI_32BIT) ? "32-bit" : "64-bit"), 
tg3_bus_string(tp, str), 
static int __devinit tg3_init_one(struct pci_dev *pdev,				  const struct pci_device_id *ent){	static int tg3_version_printed = 0;	unsigned long tg3reg_base, tg3reg_len;	struct net_device *dev;	struct tg3 *tp;	int i, err, pci_using_dac, pm_cap;	if (tg3_version_printed++ == 0)		printk(KERN_INFO "%s", version);	err = pci_enable_device(pdev);	if (err) {		printk(KERN_ERR PFX "Cannot enable PCI device, "		       "aborting.\n");		return err;	}	if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {		printk(KERN_ERR PFX "Cannot find proper PCI device "		       "base address, aborting.\n");		err = -ENODEV;		goto err_out_disable_pdev;	}	err = pci_request_regions(pdev, DRV_MODULE_NAME);	if (err) {		printk(KERN_ERR PFX "Cannot obtain PCI resources, "		       "aborting.\n");		goto err_out_disable_pdev;	}	pci_set_master(pdev);	/* Find power-management capability. */	pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);	if (pm_cap == 0) {		printk(KERN_ERR PFX "Cannot find PowerManagement capability, "		       "aborting.\n");		err = -EIO;		goto err_out_free_res;	}	/* Configure DMA attributes. */	err = pci_set_dma_mask(pdev, 0xffffffffffffffffULL);	if (!err) {		pci_using_dac = 1;		err = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);		if (err < 0) {			printk(KERN_ERR PFX "Unable to obtain 64 bit DMA "			       "for consistent allocations\n");			goto err_out_free_res;		}	} else {		err = pci_set_dma_mask(pdev, 0xffffffffULL);		if (err) {			printk(KERN_ERR PFX "No usable DMA configuration, "			       "aborting.\n");			goto err_out_free_res;		}		pci_using_dac = 0;	}	tg3reg_base = pci_resource_start(pdev, 0);	tg3reg_len = pci_resource_len(pdev, 0);	dev = alloc_etherdev(sizeof(*tp));	if (!dev) {		printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n");		err = -ENOMEM;		goto err_out_free_res;	}	SET_MODULE_OWNER(dev);	SET_NETDEV_DEV(dev, &pdev->dev);	if (pci_using_dac)		dev->features |= NETIF_F_HIGHDMA;	dev->features |= NETIF_F_LLTX;#if TG3_VLAN_TAG_USED	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;	dev->vlan_rx_register = tg3_vlan_rx_register;	dev->vlan_rx_kill_vid = tg3_vlan_rx_kill_vid;#endif	tp = netdev_priv(dev);	tp->pdev = pdev;	tp->dev = dev;	tp->pm_cap = pm_cap;	tp->mac_mode = TG3_DEF_MAC_MODE;	tp->rx_mode = TG3_DEF_RX_MODE;	tp->tx_mode = TG3_DEF_TX_MODE;	tp->mi_mode = MAC_MI_MODE_BASE;	if (tg3_debug > 0)		tp->msg_enable = tg3_debug;	else		tp->msg_enable = TG3_DEF_MSG_ENABLE;	/* The word/byte swap controls here control register access byte	 * swapping.  DMA data byte swapping is controlled in the GRC_MODE	 * setting below.	 */	tp->misc_host_ctrl =		MISC_HOST_CTRL_MASK_PCI_INT |		MISC_HOST_CTRL_WORD_SWAP |		MISC_HOST_CTRL_INDIR_ACCESS |		MISC_HOST_CTRL_PCISTATE_RW;	/* The NONFRM (non-frame) byte/word swap controls take effect	 * on descriptor entries, anything which isn't packet data.	 *	 * The StrongARM chips on the board (one for tx, one for rx)	 * are running in big-endian mode.	 */	tp->grc_mode = (GRC_MODE_WSWAP_DATA | GRC_MODE_BSWAP_DATA |			GRC_MODE_WSWAP_NONFRM_DATA);#ifdef __BIG_ENDIAN	tp->grc_mode |= GRC_MODE_BSWAP_NONFRM_DATA;#endif	spin_lock_init(&tp->lock);	spin_lock_init(&tp->tx_lock);	spin_lock_init(&tp->indirect_lock);	INIT_WORK(&tp->reset_task, tg3_reset_task, tp);	tp->regs = ioremap_nocache(tg3reg_base, tg3reg_len);	if (tp->regs == 0UL) {		printk(KERN_ERR PFX "Cannot map device registers, "		       "aborting.\n");		err = -ENOMEM;		goto err_out_free_dev;	}	tg3_init_link_config(tp);	tp->rx_pending = TG3_DEF_RX_RING_PENDING;	tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING;	tp->tx_pending = TG3_DEF_TX_RING_PENDING;	dev->open = tg3_open;	dev->stop = tg3_close;	dev->get_stats = tg3_get_stats;	dev->set_multicast_list = tg3_set_rx_mode;	dev->set_mac_address = tg3_set_mac_addr;	dev->do_ioctl = tg3_ioctl;	dev->tx_timeout = tg3_tx_timeout;	dev->poll = tg3_poll;	dev->ethtool_ops = &tg3_ethtool_ops;	dev->weight = 64;	dev->watchdog_timeo = TG3_TX_TIMEOUT;	dev->change_mtu = tg3_change_mtu;	dev->irq = pdev->irq;#ifdef CONFIG_NET_POLL_CONTROLLER	dev->poll_controller = tg3_poll_controller;#endif	err = tg3_get_invariants(tp);	if (err) {		printk(KERN_ERR PFX "Problem fetching invariants of chip, "		       "aborting.\n");		goto err_out_iounmap;	}	tg3_init_bufmgr_config(tp);#if TG3_TSO_SUPPORT != 0	if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {		tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;	}	else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 ||	    tp->pci_chip_rev_id == CHIPREV_ID_5705_A0 ||	    (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) {		tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE;	} else {		tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;	}	/* TSO is off by default, user can enable using ethtool.  */#if 0	if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE)		dev->features |= NETIF_F_TSO;#endif#endif	if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 &&	    !(tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) &&	    !(tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH)) {		tp->tg3_flags2 |= TG3_FLG2_MAX_RXPEND_64;		tp->rx_pending = 63;	}	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704)		tp->pdev_peer = tg3_find_5704_peer(tp);	err = tg3_get_device_address(tp);	if (err) {		printk(KERN_ERR PFX "Could not obtain valid ethernet address, "		       "aborting.\n");		goto err_out_iounmap;	}	/*	 * Reset chip in case UNDI or EFI driver did not shutdown	 * DMA self test will enable WDMAC and we'll see (spurious)	 * pending DMA on the PCI bus at that point.	 */	if ((tr32(HOSTCC_MODE) & HOSTCC_MODE_ENABLE) ||	    (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) {		pci_save_state(tp->pdev);		tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);		tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);	}	err = tg3_test_dma(tp);	if (err) {		printk(KERN_ERR PFX "DMA engine test failed, aborting.\n");		goto err_out_iounmap;	}	/* Tigon3 can do ipv4 only... and some chips have buggy	 * checksumming.	 */	if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) {		dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;		tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS;	} else		tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS;	if (tp->tg3_flags2 & TG3_FLG2_IS_5788)		dev->features &= ~NETIF_F_HIGHDMA;	/* flow control autonegotiation is default behavior */	tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG;	tg3_init_coal(tp);	/* Now that we have fully setup the chip, save away a snapshot	 * of the PCI config space.  We need to restore this after	 * GRC_MISC_CFG core clock resets and some resume events.	 */	pci_save_state(tp->pdev);	err = register_netdev(dev);	if (err) {		printk(KERN_ERR PFX "Cannot register net device, "		       "aborting.\n");		goto err_out_iounmap;	}	pci_set_drvdata(pdev, dev);	printk(KERN_INFO "%s: Tigon3 [partno(%s) rev %04x PHY(%s)] (PCI%s:%s:%s) %sBaseT Ethernet ",	       dev->name,	       tp->board_part_number,	       tp->pci_chip_rev_id,	       tg3_phy_string(tp),	       ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "X" : ""),	       ((tp->tg3_flags & TG3_FLAG_PCI_HIGH_SPEED) ?		((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "133MHz" : "66MHz") :		((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "100MHz" : "33MHz")),	       ((tp->tg3_flags & TG3_FLAG_PCI_32BIT) ? "32-bit" : "64-bit"),	       (tp->tg3_flags & TG3_FLAG_10_100_ONLY) ? "10/100" : "10/100/1000");	for (i = 0; i < 6; i++)		printk("%2.2x%c", dev->dev_addr[i],		       i == 5 ? '\n' : ':');	printk(KERN_INFO "%s: RXcsums[%d] LinkChgREG[%d] "	       "MIirq[%d] ASF[%d] Split[%d] WireSpeed[%d] "	       "TSOcap[%d] \n",	       dev->name,	       (tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) != 0,	       (tp->tg3_flags & TG3_FLAG_USE_LINKCHG_REG) != 0,	       (tp->tg3_flags & TG3_FLAG_USE_MI_INTERRUPT) != 0,	       (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0,	       (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) != 0,	       (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED) == 0,	       (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) != 0);	printk(KERN_INFO "%s: dma_rwctrl[%08x]\n",	       dev->name, tp->dma_rwctrl);	return 0;err_out_iounmap:	if (tp->regs) {		iounmap(tp->regs);		tp->regs = NULL;	}err_out_free_dev:	free_netdev(dev);err_out_free_res:	pci_release_regions(pdev);err_out_disable_pdev:	pci_disable_device(pdev);	pci_set_drvdata(pdev, NULL);	return err;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/f9804ddbeec2ea709255830a8822bfb4e7584f6a/tg3.c/buggy/drivers/net/tg3.c