mdelay (1); 
mdelay(1); 
mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag){	u32 diag0val;	u32 doorbell;	int hard_reset_done = 0;	int count = 0;#ifdef MPT_DEBUG	u32 diag1val = 0;#endif	/* Clear any existing interrupts */	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);	/* Use "Diagnostic reset" method! (only thing available!) */	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);#ifdef MPT_DEBUG	if (ioc->alt_ioc)		diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);	dprintk((MYIOC_s_INFO_FMT "DbG1: diag0=%08x, diag1=%08x\n",			ioc->name, diag0val, diag1val));#endif	/* Do the reset if we are told to ignore the reset history	 * or if the reset history is 0	 */	if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {		while ((diag0val & MPI_DIAG_DRWE) == 0) {			/* Write magic sequence to WriteSequence register			 * Loop until in diagnostic mode			 */			CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);			/* wait 100 msec */			if (sleepFlag == CAN_SLEEP) {				msleep_interruptible (100);			} else {				mdelay (100);			}			count++;			if (count > 20) {				printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",						ioc->name, diag0val);				return -2;			}			diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);			dprintk((MYIOC_s_INFO_FMT "Wrote magic DiagWriteEn sequence (%x)\n",					ioc->name, diag0val));		}#ifdef MPT_DEBUG		if (ioc->alt_ioc)			diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);		dprintk((MYIOC_s_INFO_FMT "DbG2: diag0=%08x, diag1=%08x\n",				ioc->name, diag0val, diag1val));#endif		/*		 * Disable the ARM (Bug fix)		 *		 */		CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);		mdelay (1);		/*		 * Now hit the reset bit in the Diagnostic register		 * (THE BIG HAMMER!) (Clears DRWE bit).		 */		CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);		hard_reset_done = 1;		dprintk((MYIOC_s_INFO_FMT "Diagnostic reset performed\n",				ioc->name));		/*		 * Call each currently registered protocol IOC reset handler		 * with pre-reset indication.		 * NOTE: If we're doing _IOC_BRINGUP, there can be no		 * MptResetHandlers[] registered yet.		 */		{			int	 ii;			int	 r = 0;			for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {				if (MptResetHandlers[ii]) {					dprintk((MYIOC_s_INFO_FMT "Calling IOC pre_reset handler #%d\n",							ioc->name, ii));					r += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_PRE_RESET);					if (ioc->alt_ioc) {						dprintk((MYIOC_s_INFO_FMT "Calling alt-%s pre_reset handler #%d\n",								ioc->name, ioc->alt_ioc->name, ii));						r += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_PRE_RESET);					}				}			}			/* FIXME?  Examine results here? */		}		if (ioc->cached_fw) {			/* If the DownloadBoot operation fails, the			 * IOC will be left unusable. This is a fatal error			 * case.  _diag_reset will return < 0			 */			for (count = 0; count < 30; count ++) {				diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);				if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {					break;				}				/* wait 1 sec */				if (sleepFlag == CAN_SLEEP) {					ssleep(1);				} else {					mdelay (1000);				}			}			if ((count = mpt_downloadboot(ioc, sleepFlag)) < 0) {				printk(KERN_WARNING MYNAM					": firmware downloadboot failure (%d)!\n", count);			}		} else {			/* Wait for FW to reload and for board			 * to go to the READY state.			 * Maximum wait is 60 seconds.			 * If fail, no error will check again			 * with calling program.			 */			for (count = 0; count < 60; count ++) {				doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);				doorbell &= MPI_IOC_STATE_MASK;				if (doorbell == MPI_IOC_STATE_READY) {					break;				}				/* wait 1 sec */				if (sleepFlag == CAN_SLEEP) {					msleep_interruptible (1000);				} else {					mdelay (1000);				}			}		}	}	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);#ifdef MPT_DEBUG	if (ioc->alt_ioc)		diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);	dprintk((MYIOC_s_INFO_FMT "DbG3: diag0=%08x, diag1=%08x\n",		ioc->name, diag0val, diag1val));#endif	/* Clear RESET_HISTORY bit!  Place board in the	 * diagnostic mode to update the diag register.	 */	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);	count = 0;	while ((diag0val & MPI_DIAG_DRWE) == 0) {		/* Write magic sequence to WriteSequence register		 * Loop until in diagnostic mode		 */		CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);		/* wait 100 msec */		if (sleepFlag == CAN_SLEEP) {			msleep_interruptible (100);		} else {			mdelay (100);		}		count++;		if (count > 20) {			printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",					ioc->name, diag0val);			break;		}		diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);	}	diag0val &= ~MPI_DIAG_RESET_HISTORY;	CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);	if (diag0val & MPI_DIAG_RESET_HISTORY) {		printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",				ioc->name);	}	/* Disable Diagnostic Mode	 */	CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);	/* Check FW reload status flags.	 */	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);	if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {		printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",				ioc->name, diag0val);		return -3;	}#ifdef MPT_DEBUG	if (ioc->alt_ioc)		diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);	dprintk((MYIOC_s_INFO_FMT "DbG4: diag0=%08x, diag1=%08x\n",			ioc->name, diag0val, diag1val));#endif	/*	 * Reset flag that says we've enabled event notification	 */	ioc->facts.EventState = 0;	if (ioc->alt_ioc)		ioc->alt_ioc->facts.EventState = 0;	return hard_reset_done;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/c6678e0cfb41b029c3600c54b5bb65954de1230a/mptbase.c/clean/drivers/message/fusion/mptbase.c