/* Disabled, Priority 10..13 */ openpic_initipi(i, 10+i, OPENPIC_VEC_IPI+i+offset); 
/* Disabled, increased priorities 10..13 */ openpic_initipi(i, OPENPIC_PRIORITY_IPI_BASE+i, OPENPIC_VEC_IPI+i+offset); 
void __init openpic_init(int offset){	u_int t, i;	u_int timerfreq;	const char *version;	if (!OpenPIC_Addr) {		printk("No OpenPIC found !\n");		return;	}	OpenPIC = (volatile struct OpenPIC __iomem *)OpenPIC_Addr;#ifdef CONFIG_EPIC_SERIAL_MODE	/* Have to start from ground zero.	*/	openpic_reset();#endif	if (ppc_md.progress) ppc_md.progress("openpic: enter", 0x122);	t = openpic_read(&OpenPIC->Global.Feature_Reporting0);	switch (t & OPENPIC_FEATURE_VERSION_MASK) {	case 1:		version = "1.0";		break;	case 2:		version = "1.2";		break;	case 3:		version = "1.3";		break;	default:		version = "?";		break;	}	NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >>			 OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;	if (NumSources == 0)		openpic_set_sources(0,				    ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>				     OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1,				    NULL);	printk("OpenPIC Version %s (%d CPUs and %d IRQ sources) at %p\n",	       version, NumProcessors, NumSources, OpenPIC);	timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency);	if (timerfreq)		printk("OpenPIC timer frequency is %d.%06d MHz\n",		       timerfreq / 1000000, timerfreq % 1000000);	open_pic_irq_offset = offset;	/* Initialize timer interrupts */	if ( ppc_md.progress ) ppc_md.progress("openpic: timer",0x3ba);	for (i = 0; i < OPENPIC_NUM_TIMERS; i++) {		/* Disabled, Priority 0 */		openpic_inittimer(i, 0, OPENPIC_VEC_TIMER+i+offset);		/* No processor */		openpic_maptimer(i, CPU_MASK_NONE);	}#ifdef CONFIG_SMP	/* Initialize IPI interrupts */	if ( ppc_md.progress ) ppc_md.progress("openpic: ipi",0x3bb);	for (i = 0; i < OPENPIC_NUM_IPI; i++) {		/* Disabled, Priority 10..13 */		openpic_initipi(i, 10+i, OPENPIC_VEC_IPI+i+offset);		/* IPIs are per-CPU */		irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU;		irq_desc[OPENPIC_VEC_IPI+i+offset].handler = &open_pic_ipi;	}#endif	/* Initialize external interrupts */	if (ppc_md.progress) ppc_md.progress("openpic: external",0x3bc);	openpic_set_priority(0xf);	/* Init all external sources, including possibly the cascade. */	for (i = 0; i < NumSources; i++) {		int sense;		if (ISR[i] == 0)			continue;		/* the bootloader may have left it enabled (bad !) */		openpic_disable_irq(i+offset);		sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: \				(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE);		if (sense & IRQ_SENSE_MASK)			irq_desc[i+offset].status = IRQ_LEVEL;		/* Enabled, Priority 8 */		openpic_initirq(i, 8, i+offset, (sense & IRQ_POLARITY_MASK),				(sense & IRQ_SENSE_MASK));		/* Processor 0 */		openpic_mapirq(i, CPU_MASK_CPU0, CPU_MASK_NONE);	}	/* Init descriptors */	for (i = offset; i < NumSources + offset; i++)		irq_desc[i].handler = &open_pic;	/* Initialize the spurious interrupt */	if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd);	openpic_set_spurious(OPENPIC_VEC_SPURIOUS);	openpic_disable_8259_pass_through();#ifdef CONFIG_EPIC_SERIAL_MODE	if (epic_serial_mode) {		openpic_eicr_set_clk(7);	/* Slowest value until we know better */		openpic_enable_sie();	}#endif	openpic_set_priority(0);	if (ppc_md.progress) ppc_md.progress("openpic: exit",0x222);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/e4ee69c8c1e7ff9790fbce29c7be50db57323a6f/open_pic.c/buggy/arch/ppc/syslib/open_pic.c