} else { 
} else omap_sram_idle(); 
void omap_pm_idle(void){	int (*func_ptr)(void) = 0;	unsigned int mask32 = 0;	/*	 * If the DSP is being used let's just idle the CPU, the overhead	 * to wake up from Big Sleep is big, milliseconds versus micro	 * seconds for wait for interrupt.	 */	local_irq_disable();	local_fiq_disable();	if (need_resched()) {		local_fiq_enable();		local_irq_enable();		return;	}	mask32 = omap_readl(ARM_SYSST);	/*	 * Since an interrupt may set up a timer, we don't want to	 * reprogram the hardware timer with interrupts enabled.	 * Re-enable interrupts only after returning from idle.	 */	timer_dyn_reprogram();	if ((mask32 & DSP_IDLE) == 0) {		__asm__ volatile ("mcr	p15, 0, r0, c7, c0, 4");	} else {		if (cpu_is_omap1510()) {			func_ptr = (void *)(OMAP1510_SRAM_IDLE_SUSPEND);		} else if (cpu_is_omap1610() || cpu_is_omap1710()) {			func_ptr = (void *)(OMAP1610_SRAM_IDLE_SUSPEND);		} else if (cpu_is_omap5912()) {			func_ptr = (void *)(OMAP5912_SRAM_IDLE_SUSPEND);		}		func_ptr();	}	local_fiq_enable();	local_irq_enable();}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/92105bb70634abacc08bbe12bf6f888fbd7dad38/pm.c/buggy/arch/arm/plat-omap/pm.c