void __init display_cacheinfo(struct cpuinfo_x86 *c) 
void __devinit display_cacheinfo(struct cpuinfo_x86 *c) 
void __init display_cacheinfo(struct cpuinfo_x86 *c){	unsigned int n, dummy, ecx, edx, l2size;	n = cpuid_eax(0x80000000);	if (n >= 0x80000005) {		cpuid(0x80000005, &dummy, &dummy, &ecx, &edx);		printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",			edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);		c->x86_cache_size=(ecx>>24)+(edx>>24);		}	if (n < 0x80000006)	/* Some chips just has a large L1. */		return;	ecx = cpuid_ecx(0x80000006);	l2size = ecx >> 16;		/* do processor-specific cache resizing */	if (this_cpu->c_size_cache)		l2size = this_cpu->c_size_cache(c,l2size);	/* Allow user to override all this if necessary. */	if (cachesize_override != -1)		l2size = cachesize_override;	if ( l2size == 0 )		return;		/* Again, no L2 cache is possible */	c->x86_cache_size = l2size;	printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",	       l2size, ecx & 0xFF);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/0bb3184df537002a742bafddf3f4fb482b7fe610/common.c/clean/arch/i386/kernel/cpu/common.c