asm volatile ("movl %0, %%cr4" :: "r" (ctxt->cr4)); asm volatile ("movl %0, %%cr3" :: "r" (ctxt->cr3)); asm volatile ("movl %0, %%cr2" :: "r" (ctxt->cr2)); asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0)); 
write_cr4(ctxt->cr4); write_cr3(ctxt->cr3); write_cr2(ctxt->cr2); write_cr2(ctxt->cr0); 
void __restore_processor_state(struct saved_context *ctxt){	/*	 * control registers	 */	asm volatile ("movl %0, %%cr4" :: "r" (ctxt->cr4));	asm volatile ("movl %0, %%cr3" :: "r" (ctxt->cr3));	asm volatile ("movl %0, %%cr2" :: "r" (ctxt->cr2));	asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0));	/*	 * now restore the descriptor tables to their proper values	 * ltr is done i fix_processor_context().	 */	asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));	asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));	/*	 * segment registers	 */	asm volatile ("movw %0, %%es" :: "r" (ctxt->es));	asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));	asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs));	asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));	/*	 * sysenter MSRs	 */	if (boot_cpu_has(X86_FEATURE_SEP))		enable_sep_cpu();	fix_processor_context();	do_fpu_end();	mtrr_ap_init();}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/4bb0d3ec3e5b1e9e2399cdc641b3b6521ac9cdaa/cpu.c/clean/arch/i386/power/cpu.c