scwirod(p_port,BIT(5));              /*Wait for DB5 to be released. */ 
FPT_scwirod(p_port,BIT(5));              /*Wait for DB5 to be released. */ 
UCHAR scxferc(ULONG p_port, UCHAR p_data)#endif{   UCHAR curr_data, ret_data;   curr_data = p_data | BIT(7) | BIT(5);   /*Start with DB7 & DB5 asserted. */   WR_HARPOON(p_port+hp_scsidata_0, curr_data);   curr_data &= ~BIT(7);   WR_HARPOON(p_port+hp_scsidata_0, curr_data);   scwirod(p_port,BIT(7));              /*Wait for DB7 to be released. */	while (!(RD_HARPOON(p_port+hp_scsidata_0) & BIT(5)));   ret_data = (RD_HARPOON(p_port+hp_scsidata_0) & (UCHAR) 0x1F);   curr_data |= BIT(6);   WR_HARPOON(p_port+hp_scsidata_0, curr_data);   curr_data &= ~BIT(5);   WR_HARPOON(p_port+hp_scsidata_0, curr_data);   scwirod(p_port,BIT(5));              /*Wait for DB5 to be released. */   curr_data &= ~(BIT(4)|BIT(3)|BIT(2)|BIT(1)|BIT(0)); /*Release data bits */   curr_data |= BIT(7);   WR_HARPOON(p_port+hp_scsidata_0, curr_data);   curr_data &= ~BIT(6);   WR_HARPOON(p_port+hp_scsidata_0, curr_data);   scwirod(p_port,BIT(6));              /*Wait for DB6 to be released. */   return(ret_data);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/47b5d69c4aa753fcfc9b2b8d28c0660a1e25c129/FlashPoint.c/buggy/drivers/scsi/FlashPoint.c