spin_lock_irq(&tp->lock); spin_lock(&tp->tx_lock); 
tg3_full_lock(tp, 1); 
static int tg3_test_msi(struct tg3 *tp){	struct net_device *dev = tp->dev;	int err;	u16 pci_cmd;	if (!(tp->tg3_flags2 & TG3_FLG2_USING_MSI))		return 0;	/* Turn off SERR reporting in case MSI terminates with Master	 * Abort.	 */	pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);	pci_write_config_word(tp->pdev, PCI_COMMAND,			      pci_cmd & ~PCI_COMMAND_SERR);	err = tg3_test_interrupt(tp);	pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);	if (!err)		return 0;	/* other failures */	if (err != -EIO)		return err;	/* MSI test failed, go back to INTx mode */	printk(KERN_WARNING PFX "%s: No interrupt was generated using MSI, "	       "switching to INTx mode. Please report this failure to "	       "the PCI maintainer and include system chipset information.\n",		       tp->dev->name);	free_irq(tp->pdev->irq, dev);	pci_disable_msi(tp->pdev);	tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;	{		irqreturn_t (*fn)(int, void *, struct pt_regs *)=tg3_interrupt;		if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)			fn = tg3_interrupt_tagged;		err = request_irq(tp->pdev->irq, fn,				  SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);	}	if (err)		return err;	/* Need to reset the chip because the MSI cycle may have terminated	 * with Master Abort.	 */	spin_lock_irq(&tp->lock);	spin_lock(&tp->tx_lock);	tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);	err = tg3_init_hw(tp);	spin_unlock(&tp->tx_lock);	spin_unlock_irq(&tp->lock);	if (err)		free_irq(tp->pdev->irq, dev);	return err;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/f47c11eeccc8820010992eb32dbe7370a08f8bd3/tg3.c/buggy/drivers/net/tg3.c