#else ppc_sys_device_remove(MPC10X_UART1); #endif 
sandpoint_setup_arch(void){	/* Probe for Sandpoint model */	sandpoint_probe_type();	if (sandpoint_is_x2)		epic_serial_mode = 0;	loops_per_jiffy = 100000000 / HZ;#ifdef CONFIG_BLK_DEV_INITRD	if (initrd_start)		ROOT_DEV = Root_RAM0;	else#endif#ifdef	CONFIG_ROOT_NFS		ROOT_DEV = Root_NFS;#else		ROOT_DEV = Root_HDA1;#endif	/* Lookup PCI host bridges */	sandpoint_find_bridges();	if (strncmp (cur_ppc_sys_spec->ppc_sys_name, "8245", 4) == 0)	{		bd_t *bp = (bd_t *)__res;		struct plat_serial8250_port *pdata;		pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_DUART);		if (pdata)		{			pdata[0].uartclk = bp->bi_busfreq;			pdata[0].membase = ioremap(pdata[0].mapbase, 0x100);			/* this disables the 2nd serial port on the DUART			 * since the sandpoint does not have it connected */			pdata[1].uartclk = 0;			pdata[1].irq = 0;			pdata[1].mapbase = 0;		}	}	printk(KERN_INFO "Motorola SPS Sandpoint Test Platform\n");	printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");	/* DINK32 12.3 and below do not correctly enable any caches.	 * We will do this now with good known values.  Future versions	 * of DINK32 are supposed to get this correct.	 */	if (cpu_has_feature(CPU_FTR_SPEC7450))		/* 745x is different.  We only want to pass along enable. */		_set_L2CR(L2CR_L2E);	else if (cpu_has_feature(CPU_FTR_L2CR))		/* All modules have 1MB of L2.  We also assume that an		 * L2 divisor of 3 will work.		 */		_set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3				| L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF);#if 0	/* Untested right now. */	if (cpu_has_feature(CPU_FTR_L3CR)) {		/* Magic value. */		_set_L3CR(0x8f032000);	}#endif}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/13e886c3b435d14668aefaed449d8d7ca6dce3a8/sandpoint.c/buggy/arch/ppc/platforms/sandpoint.c