pdc_i2c_read_data[i].reg, 
pdc_i2c_read_data[i].reg, 
static int pdc20621_prog_dimm0(struct ata_probe_ent *pe){	u32 spd0[50];	u32 data = 0;   	int size, i;   	u8 bdimmsize;    	void *mmio = pe->mmio_base;	static const struct {		unsigned int reg;		unsigned int ofs;	} pdc_i2c_read_data [] = {		{ PDC_DIMM_SPD_TYPE, 11 },				{ PDC_DIMM_SPD_FRESH_RATE, 12 },		{ PDC_DIMM_SPD_COLUMN_NUM, 4 }, 		{ PDC_DIMM_SPD_ATTRIBUTE, 21 },		{ PDC_DIMM_SPD_ROW_NUM, 3 },		{ PDC_DIMM_SPD_BANK_NUM, 17 },		{ PDC_DIMM_SPD_MODULE_ROW, 5 },		{ PDC_DIMM_SPD_ROW_PRE_CHARGE, 27 },		{ PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 },		{ PDC_DIMM_SPD_RAS_CAS_DELAY, 29 },		{ PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 },		{ PDC_DIMM_SPD_CAS_LATENCY, 18 },       	};	/* hard-code chip #0 */	mmio += PDC_CHIP0_OFS;	for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++)		pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,				  pdc_i2c_read_data[i].reg, 				  &spd0[pdc_i2c_read_data[i].ofs]);     	data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4);   	data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | 		((((spd0[27] + 9) / 10) - 1) << 8) ;   	data |= (((((spd0[29] > spd0[28]) 		    ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10;    	data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12;      	if (spd0[18] & 0x08) 		data |= ((0x03) << 14);   	else if (spd0[18] & 0x04)		data |= ((0x02) << 14);   	else if (spd0[18] & 0x01)		data |= ((0x01) << 14);   	else		data |= (0 << 14);  	/* 	   Calculate the size of bDIMMSize (power of 2) and	   merge the DIMM size by program start/end address.	*/   	bdimmsize = spd0[4] + (spd0[5] / 2) + spd0[3] + (spd0[17] / 2) + 3;   	size = (1 << bdimmsize) >> 20;	/* size = xxx(MB) */   	data |= (((size / 16) - 1) << 16);   	data |= (0 << 23);	data |= 8;   	writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); 	readl(mmio + PDC_DIMM0_CONTROL_OFFSET);   	return size;                          }
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/8a60a07129fad60bba779a2a4038c7518b167fc7/sata_sx4.c/buggy/drivers/scsi/sata_sx4.c