if ((bp->status_blk->status_idx == bp->last_status_idx) || 
if ((bp->status_blk->status_idx == bp->last_status_idx) && 
bnx2_interrupt(int irq, void *dev_instance, struct pt_regs *regs){	struct net_device *dev = dev_instance;	struct bnx2 *bp = dev->priv;	/* When using INTx, it is possible for the interrupt to arrive	 * at the CPU before the status block posted prior to the	 * interrupt. Reading a register will flush the status block.	 * When using MSI, the MSI message will always complete after	 * the status block write.	 */	if ((bp->status_blk->status_idx == bp->last_status_idx) ||	    (REG_RD(bp, BNX2_PCICFG_MISC_STATUS) &	     BNX2_PCICFG_MISC_STATUS_INTA_VALUE))		return IRQ_NONE;	REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,		BNX2_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM |		BNX2_PCICFG_INT_ACK_CMD_MASK_INT);	/* Return here if interrupt is shared and is disabled. */	if (unlikely(atomic_read(&bp->intr_sem) != 0))		return IRQ_HANDLED;	netif_rx_schedule(dev);	return IRQ_HANDLED;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/c921e4c4dbb043f9435414c4e661e7f0a783053d/bnx2.c/clean/drivers/net/bnx2.c