sw_idx = rx_rcb_ptr % TG3_RX_RCB_RING_SIZE(tp); 
static int tg3_rx(struct tg3 *tp, int budget){	u32 work_mask;	u32 rx_rcb_ptr = tp->rx_rcb_ptr;	u16 hw_idx, sw_idx;	int received;	hw_idx = tp->hw_status->idx[0].rx_producer;	/*	 * We need to order the read of hw_idx and the read of	 * the opaque cookie.	 */	rmb();	sw_idx = rx_rcb_ptr % TG3_RX_RCB_RING_SIZE(tp);	work_mask = 0;	received = 0;	while (sw_idx != hw_idx && budget > 0) {		struct tg3_rx_buffer_desc *desc = &tp->rx_rcb[sw_idx];		unsigned int len;		struct sk_buff *skb;		dma_addr_t dma_addr;		u32 opaque_key, desc_idx, *post_ptr;		desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;		opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;		if (opaque_key == RXD_OPAQUE_RING_STD) {			dma_addr = pci_unmap_addr(&tp->rx_std_buffers[desc_idx],						  mapping);			skb = tp->rx_std_buffers[desc_idx].skb;			post_ptr = &tp->rx_std_ptr;		} else if (opaque_key == RXD_OPAQUE_RING_JUMBO) {			dma_addr = pci_unmap_addr(&tp->rx_jumbo_buffers[desc_idx],						  mapping);			skb = tp->rx_jumbo_buffers[desc_idx].skb;			post_ptr = &tp->rx_jumbo_ptr;		}		else {			goto next_pkt_nopost;		}		work_mask |= opaque_key;		if ((desc->err_vlan & RXD_ERR_MASK) != 0 &&		    (desc->err_vlan != RXD_ERR_ODD_NIBBLE_RCVD_MII)) {		drop_it:			tg3_recycle_rx(tp, opaque_key,				       desc_idx, *post_ptr);		drop_it_no_recycle:			/* Other statistics kept track of by card. */			tp->net_stats.rx_dropped++;			goto next_pkt;		}		len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4; /* omit crc */		if (len > RX_COPY_THRESHOLD 			&& tp->rx_offset == 2			/* rx_offset != 2 iff this is a 5701 card running			 * in PCI-X mode [see tg3_get_invariants()] */		) {			int skb_size;			skb_size = tg3_alloc_rx_skb(tp, opaque_key,						    desc_idx, *post_ptr);			if (skb_size < 0)				goto drop_it;			pci_unmap_single(tp->pdev, dma_addr,					 skb_size - tp->rx_offset,					 PCI_DMA_FROMDEVICE);			skb_put(skb, len);		} else {			struct sk_buff *copy_skb;			tg3_recycle_rx(tp, opaque_key,				       desc_idx, *post_ptr);			copy_skb = dev_alloc_skb(len + 2);			if (copy_skb == NULL)				goto drop_it_no_recycle;			copy_skb->dev = tp->dev;			skb_reserve(copy_skb, 2);			skb_put(copy_skb, len);			pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);			memcpy(copy_skb->data, skb->data, len);			pci_dma_sync_single_for_device(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);			/* We'll reuse the original ring buffer. */			skb = copy_skb;		}		if ((tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) &&		    (desc->type_flags & RXD_FLAG_TCPUDP_CSUM) &&		    (((desc->ip_tcp_csum & RXD_TCPCSUM_MASK)		      >> RXD_TCPCSUM_SHIFT) == 0xffff))			skb->ip_summed = CHECKSUM_UNNECESSARY;		else			skb->ip_summed = CHECKSUM_NONE;		skb->protocol = eth_type_trans(skb, tp->dev);#if TG3_VLAN_TAG_USED		if (tp->vlgrp != NULL &&		    desc->type_flags & RXD_FLAG_VLAN) {			tg3_vlan_rx(tp, skb,				    desc->err_vlan & RXD_VLAN_MASK);		} else#endif			netif_receive_skb(skb);		tp->dev->last_rx = jiffies;		received++;		budget--;next_pkt:		(*post_ptr)++;next_pkt_nopost:		rx_rcb_ptr++;		sw_idx = rx_rcb_ptr % TG3_RX_RCB_RING_SIZE(tp);	}	/* ACK the status ring. */	tp->rx_rcb_ptr = rx_rcb_ptr;	tw32_rx_mbox(MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW,		     (rx_rcb_ptr % TG3_RX_RCB_RING_SIZE(tp)));	/* Refill RX ring(s). */	if (work_mask & RXD_OPAQUE_RING_STD) {		sw_idx = tp->rx_std_ptr % TG3_RX_RING_SIZE;		tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW,			     sw_idx);	}	if (work_mask & RXD_OPAQUE_RING_JUMBO) {		sw_idx = tp->rx_jumbo_ptr % TG3_RX_JUMBO_RING_SIZE;		tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW,			     sw_idx);	}	mmiowb();	return received;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/483ba50bd41d14d5325d6cd9935de86a982d08a2/tg3.c/buggy/drivers/net/tg3.c