static unsigned int __init ata66_ali15x3 (ide_hwif_t *hwif) 
static unsigned int __devinit ata66_ali15x3 (ide_hwif_t *hwif) 
static unsigned int __init ata66_ali15x3 (ide_hwif_t *hwif){	struct pci_dev *dev	= hwif->pci_dev;	unsigned int ata66	= 0;	u8 cable_80_pin[2]	= { 0, 0 };	unsigned long flags;	u8 tmpbyte;	local_irq_save(flags);	if (m5229_revision >= 0xC2) {		/*		 * Ultra66 cable detection (from Host View)		 * m5229, 0x4a, bit0: primary, bit1: secondary 80 pin		 */		pci_read_config_byte(dev, 0x4a, &tmpbyte);		/*		 * 0x4a, bit0 is 0 => primary channel		 * has 80-pin (from host view)		 */		if (!(tmpbyte & 0x01)) cable_80_pin[0] = 1;		/*		 * 0x4a, bit1 is 0 => secondary channel		 * has 80-pin (from host view)		 */		if (!(tmpbyte & 0x02)) cable_80_pin[1] = 1;		/*		 * Allow ata66 if cable of current channel has 80 pins		 */		ata66 = (hwif->channel)?cable_80_pin[1]:cable_80_pin[0];	} else {		/*		 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010		 */		pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);		chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;	}	/*	 * CD_ROM DMA on (m5229, 0x53, bit0)	 *      Enable this bit even if we want to use PIO	 * PIO FIFO off (m5229, 0x53, bit1)	 *      The hardware will use 0x54h and 0x55h to control PIO FIFO	 *	(Not on later devices it seems)	 *	 *	0x53 changes meaning on later revs - we must no touch	 *	bit 1 on them. Need to check if 0x20 is the right break	 */	 	pci_read_config_byte(dev, 0x53, &tmpbyte);		if(m5229_revision <= 0x20)		tmpbyte = (tmpbyte & (~0x02)) | 0x01;	else		tmpbyte |= 0x01;	pci_write_config_byte(dev, 0x53, tmpbyte);	local_irq_restore(flags);	return(ata66);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/c2f12589bfc4119f2c331ecea8cca4945ed48497/alim15x3.c/buggy/drivers/ide/pci/alim15x3.c