apic_write_around(APIC_ICR, cfg); 
apic_write(APIC_ICR, cfg); 
static inline void send_IPI_mask_sequence(cpumask_t mask, int vector){	unsigned long cfg, flags;	unsigned long query_cpu;	/*	 * Hack. The clustered APIC addressing mode doesn't allow us to send	 * to an arbitrary mask, so I do a unicast to each CPU instead.	 * - mbligh	 */	local_irq_save(flags);	for_each_cpu_mask(query_cpu, mask) {		/*		 * Wait for idle.		 */		apic_wait_icr_idle();		/*		 * prepare target chip field		 */		cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]);		apic_write_around(APIC_ICR2, cfg);		/*		 * program the ICR		 */		cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL);		/*		 * Send the IPI. The write to APIC_ICR fires this off.		 */		apic_write_around(APIC_ICR, cfg);	}	local_irq_restore(flags);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/eddfb4ed290383abf912630fa8dac5acf65c9e55/ipi.h/buggy/include/asm-x86_64/ipi.h