* case the XMAC will start transfering frames out of the 
* case the XMAC will start transferring frames out of the 
static void genesis_mac_init(struct skge_hw *hw, int port){	struct net_device *dev = hw->dev[port];	struct skge_port *skge = netdev_priv(dev);	int jumbo = hw->dev[port]->mtu > ETH_DATA_LEN;	int i;	u32 r;	const u8 zero[6]  = { 0 };	/* Clear MIB counters */	xm_write16(hw, port, XM_STAT_CMD,			XM_SC_CLR_RXC | XM_SC_CLR_TXC);	/* Clear two times according to Errata #3 */	xm_write16(hw, port, XM_STAT_CMD,			XM_SC_CLR_RXC | XM_SC_CLR_TXC);	/* Unreset the XMAC. */	skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);	/*	 * Perform additional initialization for external PHYs,	 * namely for the 1000baseTX cards that use the XMAC's	 * GMII mode.	 */	/* Take external Phy out of reset */	r = skge_read32(hw, B2_GP_IO);	if (port == 0)		r |= GP_DIR_0|GP_IO_0;	else		r |= GP_DIR_2|GP_IO_2;	skge_write32(hw, B2_GP_IO, r);	skge_read32(hw, B2_GP_IO);	/* Enable GMII interfac */	xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD);	bcom_phy_init(skge, jumbo);	/* Set Station Address */	xm_outaddr(hw, port, XM_SA, dev->dev_addr);	/* We don't use match addresses so clear */	for (i = 1; i < 16; i++)		xm_outaddr(hw, port, XM_EXM(i), zero);	/* configure Rx High Water Mark (XM_RX_HI_WM) */	xm_write16(hw, port, XM_RX_HI_WM, 1450);	/* We don't need the FCS appended to the packet. */	r = XM_RX_LENERR_OK | XM_RX_STRIP_FCS;	if (jumbo)		r |= XM_RX_BIG_PK_OK;	if (skge->duplex == DUPLEX_HALF) {		/*		 * If in manual half duplex mode the other side might be in		 * full duplex mode, so ignore if a carrier extension is not seen		 * on frames received		 */		r |= XM_RX_DIS_CEXT;	}	xm_write16(hw, port, XM_RX_CMD, r);	/* We want short frames padded to 60 bytes. */	xm_write16(hw, port, XM_TX_CMD, XM_TX_AUTO_PAD);	/*	 * Bump up the transmit threshold. This helps hold off transmit	 * underruns when we're blasting traffic from both ports at once.	 */	xm_write16(hw, port, XM_TX_THR, 512);	/*	 * Enable the reception of all error frames. This is is	 * a necessary evil due to the design of the XMAC. The	 * XMAC's receive FIFO is only 8K in size, however jumbo	 * frames can be up to 9000 bytes in length. When bad	 * frame filtering is enabled, the XMAC's RX FIFO operates	 * in 'store and forward' mode. For this to work, the	 * entire frame has to fit into the FIFO, but that means	 * that jumbo frames larger than 8192 bytes will be	 * truncated. Disabling all bad frame filtering causes	 * the RX FIFO to operate in streaming mode, in which	 * case the XMAC will start transfering frames out of the	 * RX FIFO as soon as the FIFO threshold is reached.	 */	xm_write32(hw, port, XM_MODE, XM_DEF_MODE);	/*	 * Initialize the Receive Counter Event Mask (XM_RX_EV_MSK)	 *	- Enable all bits excepting 'Octets Rx OK Low CntOv'	 *	  and 'Octets Rx OK Hi Cnt Ov'.	 */	xm_write32(hw, port, XM_RX_EV_MSK, XMR_DEF_MSK);	/*	 * Initialize the Transmit Counter Event Mask (XM_TX_EV_MSK)	 *	- Enable all bits excepting 'Octets Tx OK Low CntOv'	 *	  and 'Octets Tx OK Hi Cnt Ov'.	 */	xm_write32(hw, port, XM_TX_EV_MSK, XMT_DEF_MSK);	/* Configure MAC arbiter */	skge_write16(hw, B3_MA_TO_CTRL, MA_RST_CLR);	/* configure timeout values */	skge_write8(hw, B3_MA_TOINI_RX1, 72);	skge_write8(hw, B3_MA_TOINI_RX2, 72);	skge_write8(hw, B3_MA_TOINI_TX1, 72);	skge_write8(hw, B3_MA_TOINI_TX2, 72);	skge_write8(hw, B3_MA_RCINI_RX1, 0);	skge_write8(hw, B3_MA_RCINI_RX2, 0);	skge_write8(hw, B3_MA_RCINI_TX1, 0);	skge_write8(hw, B3_MA_RCINI_TX2, 0);	/* Configure Rx MAC FIFO */	skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_RST_CLR);	skge_write16(hw, SK_REG(port, RX_MFF_CTRL1), MFF_ENA_TIM_PAT);	skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_ENA_OP_MD);	/* Configure Tx MAC FIFO */	skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_CLR);	skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_TX_CTRL_DEF);	skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_ENA_OP_MD);	if (jumbo) {		/* Enable frame flushing if jumbo frames used */		skge_write16(hw, SK_REG(port,RX_MFF_CTRL1), MFF_ENA_FLUSH);	} else {		/* enable timeout timers if normal frames */		skge_write16(hw, B3_PA_CTRL,			     (port == 0) ? PA_ENA_TO_TX1 : PA_ENA_TO_TX2);	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/8f3f8193a49e1eb0d2e01309fdef2ad4fb33293c/skge.c/buggy/drivers/net/skge.c