ide_ops = &au1xxx_ide_ops; 
void __init board_setup(void){	char *argptr = NULL;	u32 pin_func;#if 0	/* Enable PSC1 SYNC for AC97.  Normaly done in audio driver,	 * but it is board specific code, so put it here.	 */	pin_func = au_readl(SYS_PINFUNC);	au_sync();	pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;	au_writel(pin_func, SYS_PINFUNC);	au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */	au_sync();#endif#if defined( CONFIG_I2C_ALGO_AU1550 )	{	u32 freq0, clksrc;	/* Select SMBUS in CPLD */	bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);	pin_func = au_readl(SYS_PINFUNC);	au_sync();	pin_func &= ~(3<<17 | 1<<4);	/* Set GPIOs correctly */	pin_func |= 2<<17;	au_writel(pin_func, SYS_PINFUNC);	au_sync();	/* The i2c driver depends on 50Mhz clock */	freq0 = au_readl(SYS_FREQCTRL0);	au_sync();	freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);	freq0 |= (3<<SYS_FC_FRDIV1_BIT);	/* 396Mhz / (3+1)*2 == 49.5Mhz */	au_writel(freq0, SYS_FREQCTRL0);	au_sync();	freq0 |= SYS_FC_FE1;	au_writel(freq0, SYS_FREQCTRL0);	au_sync();	clksrc = au_readl(SYS_CLKSRC);	au_sync();	clksrc &= ~0x01f00000;	/* bit 22 is EXTCLK0 for PSC0 */	clksrc |= (0x3 << 22);	au_writel(clksrc, SYS_CLKSRC);	au_sync();	}#endif#ifdef CONFIG_FB_AU1200	argptr = prom_getcmdline();#ifdef CONFIG_MIPS_PB1200	strcat(argptr, " video=au1200fb:panel:s11");#endif#ifdef CONFIG_MIPS_DB1200	strcat(argptr, " video=au1200fb:panel:s7");#endif#endif#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)	/*	 * Iniz IDE parameters	 */	ide_ops = &au1xxx_ide_ops;	au1xxx_ide_irq = PB1200_IDE_INT;	au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;	au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);	/*	 * change PIO or PIO+Ddma	 * check the GPIO-5 pin condition. pb1200:s18_dot */	switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0;#endif	/* The Pb1200 development board uses external MUX for PSC0 to	support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI	*/#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)	#error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\			Refer to Pb1200/Db1200 documentation.#elif defined( CONFIG_AU1550_PSC_SPI )	bcsr->resets |= BCSR_RESETS_PCS0MUX;#elif defined( CONFIG_I2C_ALGO_AU1550 )	bcsr->resets &= (~BCSR_RESETS_PCS0MUX);#endif	au_sync();#ifdef CONFIG_MIPS_PB1200	printk("AMD Alchemy Pb1200 Board\n");#endif#ifdef CONFIG_MIPS_DB1200	printk("AMD Alchemy Db1200 Board\n");#endif#if 0	/* Setup Pb1200 External Interrupt Controller */	{		extern void (*board_init_irq)(void);		extern void _board_init_irq(void);		board_init_irq = _board_init_irq;	}#endif}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/ebc7f12fbc6a2d2df1930b91b380c9defb48cbf3/board_setup.c/buggy/arch/mips/au1000/pb1200/board_setup.c