iounmap((void *) cp->regs); 
iounmap(cp->regs); 
static int __devinit cas_init_one(struct pci_dev *pdev,				  const struct pci_device_id *ent){	static int cas_version_printed = 0;	unsigned long casreg_base, casreg_len;	struct net_device *dev;	struct cas *cp;	int i, err, pci_using_dac;	u16 pci_cmd;	u8 orig_cacheline_size = 0, cas_cacheline_size = 0;	if (cas_version_printed++ == 0)		printk(KERN_INFO "%s", version);	err = pci_enable_device(pdev);	if (err) {		printk(KERN_ERR PFX "Cannot enable PCI device, "		       "aborting.\n");		return err;	}	if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {		printk(KERN_ERR PFX "Cannot find proper PCI device "		       "base address, aborting.\n");		err = -ENODEV;		goto err_out_disable_pdev;	}	dev = alloc_etherdev(sizeof(*cp));	if (!dev) {		printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n");		err = -ENOMEM;		goto err_out_disable_pdev;	}	SET_MODULE_OWNER(dev);	SET_NETDEV_DEV(dev, &pdev->dev);	err = pci_request_regions(pdev, dev->name);	if (err) {		printk(KERN_ERR PFX "Cannot obtain PCI resources, "		       "aborting.\n");		goto err_out_free_netdev;	}	pci_set_master(pdev);	/* we must always turn on parity response or else parity	 * doesn't get generated properly. disable SERR/PERR as well.	 * in addition, we want to turn MWI on.	 */	pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);	pci_cmd &= ~PCI_COMMAND_SERR;	pci_cmd |= PCI_COMMAND_PARITY;	pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);	pci_set_mwi(pdev);	/*	 * On some architectures, the default cache line size set	 * by pci_set_mwi reduces perforamnce.  We have to increase	 * it for this case.  To start, we'll print some configuration	 * data.	 */#if 1	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE,			     &orig_cacheline_size);	if (orig_cacheline_size < CAS_PREF_CACHELINE_SIZE) {		cas_cacheline_size = 			(CAS_PREF_CACHELINE_SIZE < SMP_CACHE_BYTES) ? 			CAS_PREF_CACHELINE_SIZE : SMP_CACHE_BYTES;		if (pci_write_config_byte(pdev, 					  PCI_CACHE_LINE_SIZE, 					  cas_cacheline_size)) {			printk(KERN_ERR PFX "Could not set PCI cache "			       "line size\n");			goto err_write_cacheline;		}	}#endif	/* Configure DMA attributes. */	if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {		pci_using_dac = 1;		err = pci_set_consistent_dma_mask(pdev,						  DMA_64BIT_MASK);		if (err < 0) {			printk(KERN_ERR PFX "Unable to obtain 64-bit DMA "			       "for consistent allocations\n");			goto err_out_free_res;		}	} else {		err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);		if (err) {			printk(KERN_ERR PFX "No usable DMA configuration, "			       "aborting.\n");			goto err_out_free_res;		}		pci_using_dac = 0;	}	casreg_base = pci_resource_start(pdev, 0);	casreg_len = pci_resource_len(pdev, 0);	cp = netdev_priv(dev);	cp->pdev = pdev;#if 1	/* A value of 0 indicates we never explicitly set it */	cp->orig_cacheline_size = cas_cacheline_size ? orig_cacheline_size: 0;#endif	cp->dev = dev;	cp->msg_enable = (cassini_debug < 0) ? CAS_DEF_MSG_ENABLE : 	  cassini_debug;	cp->link_transition = LINK_TRANSITION_UNKNOWN;	cp->link_transition_jiffies_valid = 0;	spin_lock_init(&cp->lock);	spin_lock_init(&cp->rx_inuse_lock);	spin_lock_init(&cp->rx_spare_lock);	for (i = 0; i < N_TX_RINGS; i++) {		spin_lock_init(&cp->stat_lock[i]);		spin_lock_init(&cp->tx_lock[i]);	}	spin_lock_init(&cp->stat_lock[N_TX_RINGS]);	init_MUTEX(&cp->pm_sem);	init_timer(&cp->link_timer);	cp->link_timer.function = cas_link_timer;	cp->link_timer.data = (unsigned long) cp;#if 1	/* Just in case the implementation of atomic operations	 * change so that an explicit initialization is necessary.	 */	atomic_set(&cp->reset_task_pending, 0);	atomic_set(&cp->reset_task_pending_all, 0);	atomic_set(&cp->reset_task_pending_spare, 0);	atomic_set(&cp->reset_task_pending_mtu, 0);#endif	INIT_WORK(&cp->reset_task, cas_reset_task, cp);	/* Default link parameters */	if (link_mode >= 0 && link_mode <= 6)		cp->link_cntl = link_modes[link_mode];	else		cp->link_cntl = BMCR_ANENABLE;	cp->lstate = link_down;	cp->link_transition = LINK_TRANSITION_LINK_DOWN;	netif_carrier_off(cp->dev);	cp->timer_ticks = 0;	/* give us access to cassini registers */	cp->regs = ioremap(casreg_base, casreg_len);	if (cp->regs == 0UL) {		printk(KERN_ERR PFX "Cannot map device registers, "		       "aborting.\n");		goto err_out_free_res;	}	cp->casreg_len = casreg_len;	pci_save_state(pdev);	cas_check_pci_invariants(cp);	cas_hard_reset(cp);	cas_reset(cp, 0);	if (cas_check_invariants(cp))		goto err_out_iounmap;	cp->init_block = (struct cas_init_block *)		pci_alloc_consistent(pdev, sizeof(struct cas_init_block),				     &cp->block_dvma);	if (!cp->init_block) {		printk(KERN_ERR PFX "Cannot allocate init block, "		       "aborting.\n");		goto err_out_iounmap;	}	for (i = 0; i < N_TX_RINGS; i++) 		cp->init_txds[i] = cp->init_block->txds[i];	for (i = 0; i < N_RX_DESC_RINGS; i++) 		cp->init_rxds[i] = cp->init_block->rxds[i];	for (i = 0; i < N_RX_COMP_RINGS; i++) 		cp->init_rxcs[i] = cp->init_block->rxcs[i];	for (i = 0; i < N_RX_FLOWS; i++)		skb_queue_head_init(&cp->rx_flows[i]);	dev->open = cas_open;	dev->stop = cas_close;	dev->hard_start_xmit = cas_start_xmit;	dev->get_stats = cas_get_stats;	dev->set_multicast_list = cas_set_multicast;	dev->do_ioctl = cas_ioctl;	dev->tx_timeout = cas_tx_timeout;	dev->watchdog_timeo = CAS_TX_TIMEOUT;	dev->change_mtu = cas_change_mtu;#ifdef USE_NAPI	dev->poll = cas_poll;	dev->weight = 64;#endif#ifdef CONFIG_NET_POLL_CONTROLLER	dev->poll_controller = cas_netpoll;#endif	dev->irq = pdev->irq;	dev->dma = 0;	/* Cassini features. */	if ((cp->cas_flags & CAS_FLAG_NO_HW_CSUM) == 0)		dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG;	if (pci_using_dac)		dev->features |= NETIF_F_HIGHDMA;	if (register_netdev(dev)) {		printk(KERN_ERR PFX "Cannot register net device, "		       "aborting.\n");		goto err_out_free_consistent;	}	i = readl(cp->regs + REG_BIM_CFG);	printk(KERN_INFO "%s: Sun Cassini%s (%sbit/%sMHz PCI/%s) "	       "Ethernet[%d] ",  dev->name, 	       (cp->cas_flags & CAS_FLAG_REG_PLUS) ? "+" : "", 	       (i & BIM_CFG_32BIT) ? "32" : "64",	       (i & BIM_CFG_66MHZ) ? "66" : "33",	       (cp->phy_type == CAS_PHY_SERDES) ? "Fi" : "Cu", pdev->irq); 	for (i = 0; i < 6; i++)		printk("%2.2x%c", dev->dev_addr[i],		       i == 5 ? ' ' : ':');	printk("\n");	pci_set_drvdata(pdev, dev);	cp->hw_running = 1;	cas_entropy_reset(cp);	cas_phy_init(cp);	cas_begin_auto_negotiation(cp, NULL);	return 0;err_out_free_consistent:	pci_free_consistent(pdev, sizeof(struct cas_init_block),			    cp->init_block, cp->block_dvma);err_out_iounmap:	down(&cp->pm_sem);	if (cp->hw_running)		cas_shutdown(cp);	up(&cp->pm_sem);	iounmap((void *) cp->regs);err_out_free_res:	pci_release_regions(pdev);err_write_cacheline:	/* Try to restore it in case the error occured after we	 * set it. 	 */	pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, orig_cacheline_size);err_out_free_netdev:	free_netdev(dev);err_out_disable_pdev:	pci_disable_device(pdev);	pci_set_drvdata(pdev, NULL);	return -ENODEV;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/46d7031ecb8a8360b0022abd8014f38cc1197166/cassini.c/buggy/drivers/net/cassini.c