static void __init core99_init_caches(int cpu) 
static void __devinit core99_init_caches(int cpu) 
static void __init core99_init_caches(int cpu){	if (!cpu_has_feature(CPU_FTR_L2CR))		return;	if (cpu == 0) {		core99_l2_cache = _get_L2CR();		printk("CPU0: L2CR is %lx\n", core99_l2_cache);	} else {		printk("CPU%d: L2CR was %lx\n", cpu, _get_L2CR());		_set_L2CR(0);		_set_L2CR(core99_l2_cache);		printk("CPU%d: L2CR set to %lx\n", cpu, core99_l2_cache);	}	if (!cpu_has_feature(CPU_FTR_L3CR))		return;	if (cpu == 0){		core99_l3_cache = _get_L3CR();		printk("CPU0: L3CR is %lx\n", core99_l3_cache);	} else {		printk("CPU%d: L3CR was %lx\n", cpu, _get_L3CR());		_set_L3CR(0);		_set_L3CR(core99_l3_cache);		printk("CPU%d: L3CR set to %lx\n", cpu, core99_l3_cache);	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/31139971b3dc9fbb2e8a8572fb81e6e8470f363a/pmac_smp.c/buggy/arch/ppc/platforms/pmac_smp.c