goto err_free_consistent; 
goto err_free_ring; 
pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev){    struct pcnet32_private *lp;    dma_addr_t lp_dma_addr;    int i, media;    int fdx, mii, fset, dxsuflo;    int chip_version;    char *chipname;    struct net_device *dev;    struct pcnet32_access *a = NULL;    u8 promaddr[6];    int ret = -ENODEV;    /* reset the chip */    pcnet32_wio_reset(ioaddr);    /* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */    if (pcnet32_wio_read_csr(ioaddr, 0) == 4 && pcnet32_wio_check(ioaddr)) {	a = &pcnet32_wio;    } else {	pcnet32_dwio_reset(ioaddr);	if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 && pcnet32_dwio_check(ioaddr)) {	    a = &pcnet32_dwio;	} else	    goto err_release_region;    }    chip_version = a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr,89) << 16);    if ((pcnet32_debug & NETIF_MSG_PROBE) && (pcnet32_debug & NETIF_MSG_HW))	printk(KERN_INFO "  PCnet chip version is %#x.\n", chip_version);    if ((chip_version & 0xfff) != 0x003) {	if (pcnet32_debug & NETIF_MSG_PROBE)	    printk(KERN_INFO PFX "Unsupported chip version.\n");	goto err_release_region;    }    /* initialize variables */    fdx = mii = fset = dxsuflo = 0;    chip_version = (chip_version >> 12) & 0xffff;    switch (chip_version) {    case 0x2420:	chipname = "PCnet/PCI 79C970"; /* PCI */	break;    case 0x2430:	if (shared)	    chipname = "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */	else	    chipname = "PCnet/32 79C965"; /* 486/VL bus */	break;    case 0x2621:	chipname = "PCnet/PCI II 79C970A"; /* PCI */	fdx = 1;	break;    case 0x2623:	chipname = "PCnet/FAST 79C971"; /* PCI */	fdx = 1; mii = 1; fset = 1;	break;    case 0x2624:	chipname = "PCnet/FAST+ 79C972"; /* PCI */	fdx = 1; mii = 1; fset = 1;	break;    case 0x2625:	chipname = "PCnet/FAST III 79C973"; /* PCI */	fdx = 1; mii = 1;	break;    case 0x2626:	chipname = "PCnet/Home 79C978"; /* PCI */	fdx = 1;	/*	 * This is based on specs published at www.amd.com.  This section	 * assumes that a card with a 79C978 wants to go into standard	 * ethernet mode.  The 79C978 can also go into 1Mb HomePNA mode,	 * and the module option homepna=1 can select this instead.	 */	media = a->read_bcr(ioaddr, 49);	media &= ~3;		/* default to 10Mb ethernet */	if (cards_found < MAX_UNITS && homepna[cards_found])	    media |= 1; 	/* switch to home wiring mode */	if (pcnet32_debug & NETIF_MSG_PROBE)	    printk(KERN_DEBUG PFX "media set to %sMbit mode.\n", 		    (media & 1) ? "1" : "10");	a->write_bcr(ioaddr, 49, media);	break;    case 0x2627:	chipname = "PCnet/FAST III 79C975"; /* PCI */	fdx = 1; mii = 1;	break;    case 0x2628:	chipname = "PCnet/PRO 79C976";	fdx = 1; mii = 1;	break;    default:	if (pcnet32_debug & NETIF_MSG_PROBE)	    printk(KERN_INFO PFX "PCnet version %#x, no PCnet32 chip.\n",		    chip_version);	goto err_release_region;    }    /*     *	On selected chips turn on the BCR18:NOUFLO bit. This stops transmit     *	starting until the packet is loaded. Strike one for reliability, lose     *	one for latency - although on PCI this isnt a big loss. Older chips     *	have FIFO's smaller than a packet, so you can't do this.     *	Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.     */    if (fset) {	a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0860));	a->write_csr(ioaddr, 80, (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);	dxsuflo = 1;    }    dev = alloc_etherdev(0);    if (!dev) {	if (pcnet32_debug & NETIF_MSG_PROBE)	    printk(KERN_ERR PFX "Memory allocation failed.\n");	ret = -ENOMEM;	goto err_release_region;    }    SET_NETDEV_DEV(dev, &pdev->dev);    if (pcnet32_debug & NETIF_MSG_PROBE)	printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr);    /* In most chips, after a chip reset, the ethernet address is read from the     * station address PROM at the base address and programmed into the     * "Physical Address Registers" CSR12-14.     * As a precautionary measure, we read the PROM values and complain if     * they disagree with the CSRs.  Either way, we use the CSR values, and     * double check that they are valid.     */    for (i = 0; i < 3; i++) {	unsigned int val;	val = a->read_csr(ioaddr, i+12) & 0x0ffff;	/* There may be endianness issues here. */	dev->dev_addr[2*i] = val & 0x0ff;	dev->dev_addr[2*i+1] = (val >> 8) & 0x0ff;    }    /* read PROM address and compare with CSR address */    for (i = 0; i < 6; i++)	promaddr[i] = inb(ioaddr + i);    if (memcmp(promaddr, dev->dev_addr, 6)	|| !is_valid_ether_addr(dev->dev_addr)) {#ifndef __powerpc__	if (is_valid_ether_addr(promaddr)) {#else	if (!is_valid_ether_addr(dev->dev_addr)	    && is_valid_ether_addr(promaddr)) {#endif	    if (pcnet32_debug & NETIF_MSG_PROBE) {		printk(" warning: CSR address invalid,\n");		printk(KERN_INFO "    using instead PROM address of");	    }	    memcpy(dev->dev_addr, promaddr, 6);	}    }    memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);    /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */    if (!is_valid_ether_addr(dev->perm_addr))	memset(dev->dev_addr, 0, sizeof(dev->dev_addr));    if (pcnet32_debug & NETIF_MSG_PROBE) {	for (i = 0; i < 6; i++)	    printk(" %2.2x", dev->dev_addr[i]);	/* Version 0x2623 and 0x2624 */	if (((chip_version + 1) & 0xfffe) == 0x2624) {	    i = a->read_csr(ioaddr, 80) & 0x0C00;  /* Check tx_start_pt */	    printk("\n" KERN_INFO "    tx_start_pt(0x%04x):",i);	    switch(i>>10) {		case 0: printk("  20 bytes,"); break;		case 1: printk("  64 bytes,"); break;		case 2: printk(" 128 bytes,"); break;		case 3: printk("~220 bytes,"); break;	    }	    i = a->read_bcr(ioaddr, 18);  /* Check Burst/Bus control */	    printk(" BCR18(%x):",i&0xffff);	    if (i & (1<<5)) printk("BurstWrEn ");	    if (i & (1<<6)) printk("BurstRdEn ");	    if (i & (1<<7)) printk("DWordIO ");	    if (i & (1<<11)) printk("NoUFlow ");	    i = a->read_bcr(ioaddr, 25);	    printk("\n" KERN_INFO "    SRAMSIZE=0x%04x,",i<<8);	    i = a->read_bcr(ioaddr, 26);	    printk(" SRAM_BND=0x%04x,",i<<8);	    i = a->read_bcr(ioaddr, 27);	    if (i & (1<<14)) printk("LowLatRx");	}    }    dev->base_addr = ioaddr;    /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */    if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {	if (pcnet32_debug & NETIF_MSG_PROBE)	    printk(KERN_ERR PFX "Consistent memory allocation failed.\n");	ret = -ENOMEM;	goto err_free_netdev;    }    memset(lp, 0, sizeof(*lp));    lp->dma_addr = lp_dma_addr;    lp->pci_dev = pdev;    spin_lock_init(&lp->lock);    SET_MODULE_OWNER(dev);    SET_NETDEV_DEV(dev, &pdev->dev);    dev->priv = lp;    lp->name = chipname;    lp->shared_irq = shared;    lp->mii_if.full_duplex = fdx;    lp->mii_if.phy_id_mask = 0x1f;    lp->mii_if.reg_num_mask = 0x1f;    lp->dxsuflo = dxsuflo;    lp->mii = mii;    lp->msg_enable = pcnet32_debug;    if ((cards_found >= MAX_UNITS) || (options[cards_found] > sizeof(options_mapping)))	lp->options = PCNET32_PORT_ASEL;    else	lp->options = options_mapping[options[cards_found]];    lp->mii_if.dev = dev;    lp->mii_if.mdio_read = mdio_read;    lp->mii_if.mdio_write = mdio_write;    if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&		((cards_found>=MAX_UNITS) || full_duplex[cards_found]))	lp->options |= PCNET32_PORT_FD;    if (!a) {	if (pcnet32_debug & NETIF_MSG_PROBE)	    printk(KERN_ERR PFX "No access methods\n");	ret = -ENODEV;	goto err_free_consistent;    }    lp->a = *a;    /* detect special T1/E1 WAN card by checking for MAC address */    if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0	    && dev->dev_addr[2] == 0x75)	lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;    lp->init_block.mode = le16_to_cpu(0x0003);	/* Disable Rx and Tx. */    lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);    for (i = 0; i < 6; i++)	lp->init_block.phys_addr[i] = dev->dev_addr[i];    lp->init_block.filter[0] = 0x00000000;    lp->init_block.filter[1] = 0x00000000;    lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr +	    offsetof(struct pcnet32_private, rx_ring));    lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr +	    offsetof(struct pcnet32_private, tx_ring));    /* switch pcnet32 to 32bit mode */    a->write_bcr(ioaddr, 20, 2);    a->write_csr(ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private,		    init_block)) & 0xffff);    a->write_csr(ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private,		    init_block)) >> 16);    if (pdev) {		/* use the IRQ provided by PCI */	dev->irq = pdev->irq;	if (pcnet32_debug & NETIF_MSG_PROBE)	    printk(" assigned IRQ %d.\n", dev->irq);    } else {	unsigned long irq_mask = probe_irq_on();	/*	 * To auto-IRQ we enable the initialization-done and DMA error	 * interrupts. For ISA boards we get a DMA error, but VLB and PCI	 * boards will work.	 */	/* Trigger an initialization just for the interrupt. */	a->write_csr (ioaddr, 0, 0x41);	mdelay (1);	dev->irq = probe_irq_off (irq_mask);	if (!dev->irq) {	    if (pcnet32_debug & NETIF_MSG_PROBE)		printk(", failed to detect IRQ line.\n");	    ret = -ENODEV;	    goto err_free_consistent;	}	if (pcnet32_debug & NETIF_MSG_PROBE)	    printk(", probed IRQ %d.\n", dev->irq);    }    /* Set the mii phy_id so that we can query the link state */    if (lp->mii)	lp->mii_if.phy_id = ((lp->a.read_bcr (ioaddr, 33)) >> 5) & 0x1f;    init_timer (&lp->watchdog_timer);    lp->watchdog_timer.data = (unsigned long) dev;    lp->watchdog_timer.function = (void *) &pcnet32_watchdog;    /* The PCNET32-specific entries in the device structure. */    dev->open = &pcnet32_open;    dev->hard_start_xmit = &pcnet32_start_xmit;    dev->stop = &pcnet32_close;    dev->get_stats = &pcnet32_get_stats;    dev->set_multicast_list = &pcnet32_set_multicast_list;    dev->do_ioctl = &pcnet32_ioctl;    dev->ethtool_ops = &pcnet32_ethtool_ops;    dev->tx_timeout = pcnet32_tx_timeout;    dev->watchdog_timeo = (5*HZ);#ifdef CONFIG_NET_POLL_CONTROLLER    dev->poll_controller = pcnet32_poll_controller;#endif    /* Fill in the generic fields of the device structure. */    if (register_netdev(dev))	goto err_free_consistent;    if (pdev) {	pci_set_drvdata(pdev, dev);    } else {	lp->next = pcnet32_dev;	pcnet32_dev = dev;    }    if (pcnet32_debug & NETIF_MSG_PROBE)	printk(KERN_INFO "%s: registered as %s\n", dev->name, lp->name);    cards_found++;    /* enable LED writes */    a->write_bcr(ioaddr, 2, a->read_bcr(ioaddr, 2) | 0x1000);    return 0;err_free_consistent:    pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);err_free_netdev:    free_netdev(dev);err_release_region:    release_region(ioaddr, PCNET32_TOTAL_SIZE);    return ret;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/eabf04151682bc7b57c84fea58cf9e4e5a3cf2a9/pcnet32.c/buggy/drivers/net/pcnet32.c