"	pref	" SB1_PREF_LOAD_STREAMED_HINT  ", -128(%0)\n"  /* Prefetch the first 4 lines */ 
"	pref	" SB1_PREF_LOAD_STREAMED_HINT  ", -128(%0)\n" /* Prefetch the first 4 lines */ 
static inline void copy_page_cpu(void *to, void *from){	unsigned char *src = (unsigned char *)from;	unsigned char *dst = (unsigned char *)to;	unsigned char *end = src + PAGE_SIZE;	/*	 * The pref's used here are using "streaming" hints, which cause the	 * copied data to be kicked out of the cache sooner.  A page copy often	 * ends up copying a lot more data than is commonly used, so this seems	 * to make sense in terms of reducing cache pollution, but I've no real	 * performance data to back this up	 */	__asm__ __volatile__(	"	.set	push		\n"	"	.set	mips4		\n"	"	.set	noreorder	\n"#ifdef CONFIG_CPU_HAS_PREFETCH	"	daddiu	%0, %0, 128	\n"	"	daddiu	%1, %1, 128	\n"	"	pref	" SB1_PREF_LOAD_STREAMED_HINT  ", -128(%0)\n"  /* Prefetch the first 4 lines */	"	pref	" SB1_PREF_STORE_STREAMED_HINT ", -128(%1)\n"	"	pref	" SB1_PREF_LOAD_STREAMED_HINT  ",  -96(%0)\n"	"	pref	" SB1_PREF_STORE_STREAMED_HINT ",  -96(%1)\n"	"	pref	" SB1_PREF_LOAD_STREAMED_HINT  ",  -64(%0)\n"	"	pref	" SB1_PREF_STORE_STREAMED_HINT ",  -64(%1)\n"	"	pref	" SB1_PREF_LOAD_STREAMED_HINT  ",  -32(%0)\n"	"1:	pref	" SB1_PREF_STORE_STREAMED_HINT ",  -32(%1)\n"# ifdef CONFIG_64BIT	"	ld	$8, -128(%0)	\n"  /* Block copy a cacheline */	"	ld	$9, -120(%0)	\n"	"	ld	$10, -112(%0)	\n"	"	ld	$11, -104(%0)	\n"	"	sd	$8, -128(%1)	\n"	"	sd	$9, -120(%1)	\n"	"	sd	$10, -112(%1)	\n"	"	sd	$11, -104(%1)	\n"# else	"	lw	$2, -128(%0)	\n"  /* Block copy a cacheline */	"	lw	$3, -124(%0)	\n"	"	lw	$6, -120(%0)	\n"	"	lw	$7, -116(%0)	\n"	"	lw	$8, -112(%0)	\n"	"	lw	$9, -108(%0)	\n"	"	lw	$10, -104(%0)	\n"	"	lw	$11, -100(%0)	\n"	"	sw	$2, -128(%1)	\n"	"	sw	$3, -124(%1)	\n"	"	sw	$6, -120(%1)	\n"	"	sw	$7, -116(%1)	\n"	"	sw	$8, -112(%1)	\n"	"	sw	$9, -108(%1)	\n"	"	sw	$10, -104(%1)	\n"	"	sw	$11, -100(%1)	\n"# endif	"	daddiu	%0, %0, 32	\n"	"	daddiu	%1, %1, 32	\n"	"	bnel	%0, %2, 1b	\n"	"	 pref	" SB1_PREF_LOAD_STREAMED_HINT  ",  -32(%0)\n"	"	daddiu	%0, %0, -128	\n"	"	daddiu	%1, %1, -128	\n"#endif#ifdef CONFIG_64BIT	"	ld	$8, 0(%0)	\n"  /* Block copy a cacheline */	"1:	ld	$9, 8(%0)	\n"	"	ld	$10, 16(%0)	\n"	"	ld	$11, 24(%0)	\n"	"	sd	$8, 0(%1)	\n"	"	sd	$9, 8(%1)	\n"	"	sd	$10, 16(%1)	\n"	"	sd	$11, 24(%1)	\n"#else	"	lw	$2, 0(%0)	\n"  /* Block copy a cacheline */	"1:	lw	$3, 4(%0)	\n"	"	lw	$6, 8(%0)	\n"	"	lw	$7, 12(%0)	\n"	"	lw	$8, 16(%0)	\n"	"	lw	$9, 20(%0)	\n"	"	lw	$10, 24(%0)	\n"	"	lw	$11, 28(%0)	\n"	"	sw	$2, 0(%1)	\n"	"	sw	$3, 4(%1)	\n"	"	sw	$6, 8(%1)	\n"	"	sw	$7, 12(%1)	\n"	"	sw	$8, 16(%1)	\n"	"	sw	$9, 20(%1)	\n"	"	sw	$10, 24(%1)	\n"	"	sw	$11, 28(%1)	\n"#endif	"	daddiu	%0, %0, 32	\n"	"	daddiu	%1, %1, 32	\n"	"	bnel	%0, %2, 1b	\n"#ifdef CONFIG_64BIT	"	 ld	$8, 0(%0)	\n"#else	"	 lw	$2, 0(%0)	\n"#endif	"	.set	pop		\n"	: "+r" (src), "+r" (dst)	: "r" (end)#ifdef CONFIG_64BIT	: "$8","$9","$10","$11","memory");#else	: "$2","$3","$6","$7","$8","$9","$10","$11","memory");#endif}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/202d0388e747d7e9b70fc0efc2a5637812b722c1/pg-sb1.c/buggy/arch/mips/mm/pg-sb1.c