pdata->interruptPHY = MPC85xx_IRQ_EXT5; pdata->phyid = 0; /* fixup phy address */ pdata->phy_reg_addr += binfo->bi_immr_base; 
pdata->bus_id = GFAR_PHY_0; 
mpc85xx_cds_setup_arch(void){	bd_t *binfo = (bd_t *) __res;	unsigned int freq;	struct gianfar_platform_data *pdata;	/* get the core frequency */	freq = binfo->bi_intfreq;	printk("mpc85xx_cds_setup_arch\n");#ifdef CONFIG_CPM2	cpm2_reset();#endif	cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);	cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;	printk("CDS Version = %x in PCI slot %d\n", cadmus[CM_VER], cds_pci_slot);	/* Setup TODC access */	TODC_INIT(TODC_TYPE_DS1743,			0,			0,			ioremap(CDS_RTC_ADDR, CDS_RTC_SIZE),			8);	/* Set loops_per_jiffy to a half-way reasonable value,	   for use until calibrate_delay gets called. */	loops_per_jiffy = freq / HZ;#ifdef CONFIG_PCI	/* VIA IDE configuration */        ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;	/* setup PCI host bridges */	mpc85xx_setup_hose();#endif#ifdef CONFIG_SERIAL_8250	mpc85xx_early_serial_map();#endif#ifdef CONFIG_SERIAL_TEXT_DEBUG	/* Invalidate the entry we stole earlier the serial ports	 * should be properly mapped */	invalidate_tlbcam_entry(num_tlbcam_entries - 1);#endif	/* setup the board related information for the enet controllers */	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);	if (pdata) {		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;		pdata->interruptPHY = MPC85xx_IRQ_EXT5;		pdata->phyid = 0;		/* fixup phy address */		pdata->phy_reg_addr += binfo->bi_immr_base;		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);	}	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);	if (pdata) {		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;		pdata->interruptPHY = MPC85xx_IRQ_EXT5;		pdata->phyid = 1;		/* fixup phy address */		pdata->phy_reg_addr += binfo->bi_immr_base;		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);	}	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1);	if (pdata) {		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;		pdata->interruptPHY = MPC85xx_IRQ_EXT5;		pdata->phyid = 0;		/* fixup phy address */		pdata->phy_reg_addr += binfo->bi_immr_base;		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);	}	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2);	if (pdata) {		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;		pdata->interruptPHY = MPC85xx_IRQ_EXT5;		pdata->phyid = 1;		/* fixup phy address */		pdata->phy_reg_addr += binfo->bi_immr_base;		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);	}	ppc_sys_device_remove(MPC85xx_eTSEC3);	ppc_sys_device_remove(MPC85xx_eTSEC4);#ifdef CONFIG_BLK_DEV_INITRD	if (initrd_start)		ROOT_DEV = Root_RAM0;	else#endif#ifdef  CONFIG_ROOT_NFS		ROOT_DEV = Root_NFS;#else	ROOT_DEV = Root_HDA1;#endif}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/b37665e0ba1d3f05697bfae249b09a2e9cc95132/mpc85xx_cds_common.c/clean/arch/ppc/platforms/85xx/mpc85xx_cds_common.c