else { /* Go back to Virtual Wire compatibility mode */ unsigned long value;  /* For the spurious interrupt use vector F, and enable it */ value = apic_read(APIC_SPIV); value &= ~APIC_VECTOR_MASK; value |= APIC_SPIV_APIC_ENABLED; value |= 0xf; apic_write_around(APIC_SPIV, value);  if (!virt_wire_setup) { /* For LVT0 make it edge triggered, active high, external and enabled */ value = apic_read(APIC_LVT0); value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING | APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR | APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED ); value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING; value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT); apic_write_around(APIC_LVT0, value); } else { /* Disable LVT0 */ apic_write_around(APIC_LVT0, APIC_LVT_MASKED); }  /* For LVT1 make it edge triggered, active high, nmi and enabled */ value = apic_read(APIC_LVT1); value &= ~( APIC_MODE_MASK | APIC_SEND_PENDING | APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR | APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED); value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING; value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI); apic_write_around(APIC_LVT1, value); } 
void disconnect_bsp_APIC(void){	if (pic_mode) {		/*		 * Put the board back into PIC mode (has an effect		 * only on certain older boards).  Note that APIC		 * interrupts, including IPIs, won't work beyond		 * this point!  The only exception are INIT IPIs.		 */		apic_printk(APIC_VERBOSE, "disabling APIC mode, "				"entering PIC mode.\n");		outb(0x70, 0x22);		outb(0x00, 0x23);	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/650927ef8ab1e9b05b77a3f32ca7adcedaae9306/apic.c/buggy/arch/i386/kernel/apic.c