(idx << (PAGE_SHIFT + 1))); 
(idx << (PAGE_SHIFT + 1))); 
void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,	unsigned long end){	struct mm_struct *mm = vma->vm_mm;	int cpu = smp_processor_id();	if (cpu_context(cpu, mm) != 0) {		unsigned long flags;		int size;		local_irq_save(flags);		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;		size = (size + 1) >> 1;		if (size <= current_cpu_data.tlbsize/2) {			int oldpid = read_c0_entryhi();			int newpid = cpu_asid(cpu, mm);			start &= (PAGE_MASK << 1);			end += ((PAGE_SIZE << 1) - 1);			end &= (PAGE_MASK << 1);			while (start < end) {				int idx;				write_c0_entryhi(start | newpid);				start += (PAGE_SIZE << 1);				mtc0_tlbw_hazard();				tlb_probe();				BARRIER;				idx = read_c0_index();				write_c0_entrylo0(0);				write_c0_entrylo1(0);				if (idx < 0)					continue;				/* Make sure all entries differ. */				write_c0_entryhi(CKSEG0 +				                 (idx << (PAGE_SHIFT + 1)));				mtc0_tlbw_hazard();				tlb_write_indexed();			}			tlbw_use_hazard();			write_c0_entryhi(oldpid);		} else {			drop_mmu_context(mm, cpu);		}		local_irq_restore(flags);	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/304429915dad26ccf212d63ea1f18be36e3188e2/tlb-r4k.c/clean/arch/mips/mm/tlb-r4k.c