set_current_state(TASK_UNINTERRUPTIBLE); schedule_timeout(1); 
schedule_timeout_uninterruptible(1); 
static s32 adpt_i2o_reset_hba(adpt_hba* pHba)			{	u32 msg[8];	u8* status;	u32 m = EMPTY_QUEUE ;	ulong timeout = jiffies + (TMOUT_IOPRESET*HZ);	if(pHba->initialized  == FALSE) {	// First time reset should be quick		timeout = jiffies + (25*HZ);	} else {		adpt_i2o_quiesce_hba(pHba);	}	do {		rmb();		m = readl(pHba->post_port);		if (m != EMPTY_QUEUE) {			break;		}		if(time_after(jiffies,timeout)){			printk(KERN_WARNING"Timeout waiting for message!\n");			return -ETIMEDOUT;		}		set_current_state(TASK_UNINTERRUPTIBLE);		schedule_timeout(1);	} while (m == EMPTY_QUEUE);	status = (u8*)kmalloc(4, GFP_KERNEL|ADDR32);	if(status == NULL) {		adpt_send_nop(pHba, m);		printk(KERN_ERR"IOP reset failed - no free memory.\n");		return -ENOMEM;	}	memset(status,0,4);	msg[0]=EIGHT_WORD_MSG_SIZE|SGL_OFFSET_0;	msg[1]=I2O_CMD_ADAPTER_RESET<<24|HOST_TID<<12|ADAPTER_TID;	msg[2]=0;	msg[3]=0;	msg[4]=0;	msg[5]=0;	msg[6]=virt_to_bus(status);	msg[7]=0;     	memcpy_toio(pHba->msg_addr_virt+m, msg, sizeof(msg));	wmb();	writel(m, pHba->post_port);	wmb();	while(*status == 0){		if(time_after(jiffies,timeout)){			printk(KERN_WARNING"%s: IOP Reset Timeout\n",pHba->name);			kfree(status);			return -ETIMEDOUT;		}		rmb();		set_current_state(TASK_UNINTERRUPTIBLE);		schedule_timeout(1);	}	if(*status == 0x01 /*I2O_EXEC_IOP_RESET_IN_PROGRESS*/) {		PDEBUG("%s: Reset in progress...\n", pHba->name);		// Here we wait for message frame to become available		// indicated that reset has finished		do {			rmb();			m = readl(pHba->post_port);			if (m != EMPTY_QUEUE) {				break;			}			if(time_after(jiffies,timeout)){				printk(KERN_ERR "%s:Timeout waiting for IOP Reset.\n",pHba->name);				return -ETIMEDOUT;			}			set_current_state(TASK_UNINTERRUPTIBLE);			schedule_timeout(1);		} while (m == EMPTY_QUEUE);		// Flush the offset		adpt_send_nop(pHba, m);	}	adpt_i2o_status_get(pHba);	if(*status == 0x02 ||			pHba->status_block->iop_state != ADAPTER_STATE_RESET) {		printk(KERN_WARNING"%s: Reset reject, trying to clear\n",				pHba->name);	} else {		PDEBUG("%s: Reset completed.\n", pHba->name);	}	kfree(status);#ifdef UARTDELAY	// This delay is to allow someone attached to the card through the debug UART to 	// set up the dump levels that they want before the rest of the initialization sequence	adpt_delay(20000);#endif	return 0;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/a9a3047dd8ae43ff24caae5ec733a93df129568e/dpt_i2o.c/buggy/drivers/scsi/dpt_i2o.c