write_icu1(intassign0, INTASSIGN0); write_icu1(intassign1, INTASSIGN1); 
icu1_write(INTASSIGN0, intassign0); icu1_write(INTASSIGN1, intassign1); 
static inline int set_sysint1_assign(unsigned int irq, unsigned char assign){	irq_desc_t *desc = irq_desc + irq;	uint16_t intassign0, intassign1;	unsigned int pin;	pin = SYSINT1_IRQ_TO_PIN(irq);	spin_lock_irq(&desc->lock);	intassign0 = read_icu1(INTASSIGN0);	intassign1 = read_icu1(INTASSIGN1);	switch (pin) {	case 0:		intassign0 &= ~INTASSIGN_MASK;		intassign0 |= (uint16_t)assign;		break;	case 1:		intassign0 &= ~(INTASSIGN_MASK << 3);		intassign0 |= (uint16_t)assign << 3;		break;	case 2:		intassign0 &= ~(INTASSIGN_MASK << 6);		intassign0 |= (uint16_t)assign << 6;		break;	case 3:		intassign0 &= ~(INTASSIGN_MASK << 9);		intassign0 |= (uint16_t)assign << 9;		break;	case 8:		intassign0 &= ~(INTASSIGN_MASK << 12);		intassign0 |= (uint16_t)assign << 12;		break;	case 9:		intassign1 &= ~INTASSIGN_MASK;		intassign1 |= (uint16_t)assign;		break;	case 11:		intassign1 &= ~(INTASSIGN_MASK << 6);		intassign1 |= (uint16_t)assign << 6;		break;	case 12:		intassign1 &= ~(INTASSIGN_MASK << 9);		intassign1 |= (uint16_t)assign << 9;		break;	default:		return -EINVAL;	}	sysint1_assign[pin] = assign;	write_icu1(intassign0, INTASSIGN0);	write_icu1(intassign1, INTASSIGN1);	spin_unlock_irq(&desc->lock);	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/979934da9e7a0005bd9c8b1d7d00febb59ff67f7/icu.c/clean/arch/mips/vr41xx/common/icu.c