mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx]; 
mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx]; 
mpt_put_msg_frame(int handle, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf){	u32 mf_dma_addr;	int req_offset;	u16	 req_idx;	/* Request index */	/* ensure values are reset properly! */	mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle;		/* byte */	req_offset = (u8 *)mf - (u8 *)ioc->req_frames;								/* u16! */	req_idx = req_offset / ioc->req_sz;	mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);	mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;#ifdef MPT_DEBUG_MSG_FRAME	{		u32	*m = mf->u.frame.hwhdr.__hdr;		int	 ii, n;		printk(KERN_INFO MYNAM ": %s: About to Put msg frame @ %p:\n" KERN_INFO " ",				ioc->name, m);		n = ioc->req_sz/4 - 1;		while (m[n] == 0)			n--;		for (ii=0; ii<=n; ii++) {			if (ii && ((ii%8)==0))				printk("\n" KERN_INFO " ");			printk(" %08x", le32_to_cpu(m[ii]));		}		printk("\n");	}#endif	mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];  	dsgprintk((MYIOC_s_INFO_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx]));	CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/c6678e0cfb41b029c3600c54b5bb65954de1230a/mptbase.c/clean/drivers/message/fusion/mptbase.c