outb(0x00, iobase+IRCC_MASTER); 
outb(0x00, iobase + IRCC_MASTER); 
static void smsc_ircc_init_chip(struct smsc_ircc_cb *self){	int iobase, ir_mode, ctrl, fast;	IRDA_ASSERT( self != NULL, return; );	iobase = self->io.fir_base;	ir_mode = IRCC_CFGA_IRDA_SIR_A;	ctrl = 0;	fast = 0;	register_bank(iobase, 0);	outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER);	outb(0x00, iobase+IRCC_MASTER);	register_bank(iobase, 1);	outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode),	     iobase+IRCC_SCE_CFGA);#ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */	outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),	     iobase+IRCC_SCE_CFGB);#else	outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),	     iobase+IRCC_SCE_CFGB);#endif	(void) inb(iobase+IRCC_FIFO_THRESHOLD);	outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase+IRCC_FIFO_THRESHOLD);	register_bank(iobase, 4);	outb((inb(iobase+IRCC_CONTROL) & 0x30) | ctrl, iobase+IRCC_CONTROL);	register_bank(iobase, 0);	outb(fast, iobase+IRCC_LCR_A);	smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);	/* Power on device */	outb(0x00, iobase+IRCC_MASTER);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/98b7777331d4344821e900040da5d1d3016d9e67/smsc-ircc2.c/clean/drivers/net/irda/smsc-ircc2.c