u64 mask = 1 << (__irq_ino(__irq(bucket)) & IMAP_INO); 
u64 mask = 1UL << (__irq_ino(__irq(bucket)) & IMAP_INO); 
static void tomatillo_wsync_handler(struct ino_bucket *bucket, void *_arg1, void *_arg2){	unsigned long sync_reg = (unsigned long) _arg2;	u64 mask = 1 << (__irq_ino(__irq(bucket)) & IMAP_INO);	u64 val;	int limit;	schizo_write(sync_reg, mask);	limit = 100000;	val = 0;	while (--limit) {		val = schizo_read(sync_reg);		if (!(val & mask))			break;	}	if (limit <= 0) {		printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",		       val, mask);	}	if (_arg1) {		static unsigned char cacheline[64]			__attribute__ ((aligned (64)));		__asm__ __volatile__("rd %%fprs, %0\n\t"				     "or %0, %4, %1\n\t"				     "wr %1, 0x0, %%fprs\n\t"				     "stda %%f0, [%5] %6\n\t"				     "wr %0, 0x0, %%fprs\n\t"				     "membar #Sync"				     : "=&r" (mask), "=&r" (val)				     : "0" (mask), "1" (val),				     "i" (FPRS_FEF), "r" (&cacheline[0]),				     "i" (ASI_BLK_COMMIT_P));	}}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/52f26deb7c67d5f34910660200b925c1a2b8df8c/pci_schizo.c/buggy/arch/sparc64/kernel/pci_schizo.c