DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x", ctrl); return -EIO; 
/* It maybe occur at initial bad block */ DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl); /* Clear other interrupt bits for preventing ECC error */ interrupt &= ONENAND_INT_MASTER; 
static int onenand_wait(struct mtd_info *mtd, int state){	struct onenand_chip * this = mtd->priv;	unsigned long timeout;	unsigned int flags = ONENAND_INT_MASTER;	unsigned int interrupt = 0;	unsigned int ctrl, ecc;	/* The 20 msec is enough */	timeout = jiffies + msecs_to_jiffies(20);	while (time_before(jiffies, timeout)) {		interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);		if (interrupt & flags)			break;		if (state != FL_READING)			cond_resched();	}	/* To get correct interrupt status in timeout case */	interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);	ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);	if (ctrl & ONENAND_CTRL_ERROR) {		DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x", ctrl);		return -EIO;	}	if (ctrl & ONENAND_CTRL_LOCK) {		DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x", ctrl);		return -EIO;	}	if (interrupt & ONENAND_INT_READ) {		ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);		if (ecc & ONENAND_ECC_2BIT_ALL) {			DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x", ecc);			return -EBADMSG;		}	}	return 0;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/cdc001305da4f057353911018e28f26f8f879061/onenand_base.c/buggy/drivers/mtd/onenand/onenand_base.c