MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER ); 
MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access); 
void mga_do_dma_flush( drm_mga_private_t *dev_priv ){	drm_mga_primary_buffer_t *primary = &dev_priv->prim;	u32 head, tail;	u32 status = 0;	int i; 	DMA_LOCALS;	DRM_DEBUG( "\n" );        /* We need to wait so that we can do an safe flush */	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {		status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;		if ( status == MGA_ENDPRDMASTS ) break;		DRM_UDELAY( 1 );	}	if ( primary->tail == primary->last_flush ) {		DRM_DEBUG( "   bailing out...\n" );		return;	}	tail = primary->tail + dev_priv->primary->offset;	/* We need to pad the stream between flushes, as the card	 * actually (partially?) reads the first of these commands.	 * See page 4-16 in the G400 manual, middle of the page or so.	 */	BEGIN_DMA( 1 );	DMA_BLOCK( MGA_DMAPAD,  0x00000000,		   MGA_DMAPAD,  0x00000000,		   MGA_DMAPAD,  0x00000000,		   MGA_DMAPAD,	0x00000000 );	ADVANCE_DMA();	primary->last_flush = primary->tail;	head = MGA_READ( MGA_PRIMADDRESS );	if ( head <= tail ) {		primary->space = primary->size - primary->tail;	} else {		primary->space = head - tail;	}	DRM_DEBUG( "   head = 0x%06lx\n", head - dev_priv->primary->offset );	DRM_DEBUG( "   tail = 0x%06lx\n", tail - dev_priv->primary->offset );	DRM_DEBUG( "  space = 0x%06x\n", primary->space );	mga_flush_write_combine();	MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );	DRM_DEBUG( "done.\n" );}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/6795c985a648d1e90b367cc1387c18205ecca4b8/mga_dma.c/clean/drivers/char/drm/mga_dma.c