if (ioc_needs_fdc) { asm volatile("fdc 0(%%sr1,%0)\n\tsync" : : "r" (pdir_ptr)); } 
if (ioc_needs_fdc) asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr)); 
sba_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba,		  unsigned long hint){	u64 pa; /* physical address */	register unsigned ci; /* coherent index */	pa = virt_to_phys(vba);	pa &= IOVP_MASK;	mtsp(sid,1);	asm("lci 0(%%sr1, %1), %0" : "=r" (ci) : "r" (vba));	pa |= (ci >> 12) & 0xff;  /* move CI (8 bits) into lowest byte */	pa |= 0x8000000000000000ULL;	/* set "valid" bit */	*pdir_ptr = cpu_to_le64(pa);	/* swap and store into I/O Pdir */	/*	 * If the PDC_MODEL capabilities has Non-coherent IO-PDIR bit set	 * (bit #61, big endian), we have to flush and sync every time	 * IO-PDIR is changed in Ike/Astro.	 */	if (ioc_needs_fdc) {		asm volatile("fdc 0(%%sr1,%0)\n\tsync" : : "r" (pdir_ptr));	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/64908ad95c34f25849412d6d4735ac10f8fb6575/sba_iommu.c/buggy/drivers/parisc/sba_iommu.c