int rc; 
static int ahci_port_start(struct ata_port *ap){	struct device *dev = ap->host_set->dev;	struct ahci_host_priv *hpriv = ap->host_set->private_data;	struct ahci_port_priv *pp;	int rc;	void *mem, *mmio = ap->host_set->mmio_base;	void *port_mmio = ahci_port_base(mmio, ap->port_no);	dma_addr_t mem_dma;	rc = ata_port_start(ap);	if (rc)		return rc;	pp = kmalloc(sizeof(*pp), GFP_KERNEL);	if (!pp) {		rc = -ENOMEM;		goto err_out;	}	memset(pp, 0, sizeof(*pp));	mem = dma_alloc_coherent(dev, AHCI_PORT_PRIV_DMA_SZ, &mem_dma, GFP_KERNEL);	if (!mem) {		rc = -ENOMEM;		goto err_out_kfree;	}	memset(mem, 0, AHCI_PORT_PRIV_DMA_SZ);	/*	 * First item in chunk of DMA memory: 32-slot command table,	 * 32 bytes each in size	 */	pp->cmd_slot = mem;	pp->cmd_slot_dma = mem_dma;	mem += AHCI_CMD_SLOT_SZ;	mem_dma += AHCI_CMD_SLOT_SZ;	/*	 * Second item: Received-FIS area	 */	pp->rx_fis = mem;	pp->rx_fis_dma = mem_dma;	mem += AHCI_RX_FIS_SZ;	mem_dma += AHCI_RX_FIS_SZ;	/*	 * Third item: data area for storing a single command	 * and its scatter-gather table	 */	pp->cmd_tbl = mem;	pp->cmd_tbl_dma = mem_dma;	pp->cmd_tbl_sg = mem + AHCI_CMD_TBL_HDR;	ap->private_data = pp;	if (hpriv->cap & HOST_CAP_64)		writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI);	writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);	readl(port_mmio + PORT_LST_ADDR); /* flush */	if (hpriv->cap & HOST_CAP_64)		writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI);	writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);	readl(port_mmio + PORT_FIS_ADDR); /* flush */	writel(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |	       PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |	       PORT_CMD_START, port_mmio + PORT_CMD);	readl(port_mmio + PORT_CMD); /* flush */	return 0;err_out_kfree:	kfree(pp);err_out:	ata_port_stop(ap);	return rc;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/0a139e79976b9eb60517edec63406236a789f812/ahci.c/buggy/drivers/scsi/ahci.c