--num_processors; 
static void __init MP_processor_info (struct mpc_config_processor *m){ 	int ver, apicid, cpu, found_bsp = 0;	physid_mask_t tmp; 		if (!(m->mpc_cpuflag & CPU_ENABLED))		return;	apicid = mpc_apic_id(m, translation_table[mpc_record]);	if (m->mpc_featureflag&(1<<0))		Dprintk("    Floating point unit present.\n");	if (m->mpc_featureflag&(1<<7))		Dprintk("    Machine Exception supported.\n");	if (m->mpc_featureflag&(1<<8))		Dprintk("    64 bit compare & exchange supported.\n");	if (m->mpc_featureflag&(1<<9))		Dprintk("    Internal APIC present.\n");	if (m->mpc_featureflag&(1<<11))		Dprintk("    SEP present.\n");	if (m->mpc_featureflag&(1<<12))		Dprintk("    MTRR  present.\n");	if (m->mpc_featureflag&(1<<13))		Dprintk("    PGE  present.\n");	if (m->mpc_featureflag&(1<<14))		Dprintk("    MCA  present.\n");	if (m->mpc_featureflag&(1<<15))		Dprintk("    CMOV  present.\n");	if (m->mpc_featureflag&(1<<16))		Dprintk("    PAT  present.\n");	if (m->mpc_featureflag&(1<<17))		Dprintk("    PSE  present.\n");	if (m->mpc_featureflag&(1<<18))		Dprintk("    PSN  present.\n");	if (m->mpc_featureflag&(1<<19))		Dprintk("    Cache Line Flush Instruction present.\n");	/* 20 Reserved */	if (m->mpc_featureflag&(1<<21))		Dprintk("    Debug Trace and EMON Store present.\n");	if (m->mpc_featureflag&(1<<22))		Dprintk("    ACPI Thermal Throttle Registers  present.\n");	if (m->mpc_featureflag&(1<<23))		Dprintk("    MMX  present.\n");	if (m->mpc_featureflag&(1<<24))		Dprintk("    FXSR  present.\n");	if (m->mpc_featureflag&(1<<25))		Dprintk("    XMM  present.\n");	if (m->mpc_featureflag&(1<<26))		Dprintk("    Willamette New Instructions  present.\n");	if (m->mpc_featureflag&(1<<27))		Dprintk("    Self Snoop  present.\n");	if (m->mpc_featureflag&(1<<28))		Dprintk("    HT  present.\n");	if (m->mpc_featureflag&(1<<29))		Dprintk("    Thermal Monitor present.\n");	/* 30, 31 Reserved */	if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {		Dprintk("    Bootup CPU\n");		boot_cpu_physical_apicid = m->mpc_apicid;		found_bsp = 1;	}	if (num_processors >= NR_CPUS) {		printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."			"  Processor ignored.\n", NR_CPUS); 		return;	}	if (num_processors >= maxcpus) {		printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."			" Processor ignored.\n", maxcpus); 		return;	}	num_processors++;	ver = m->mpc_apicver;	if (!MP_valid_apicid(apicid, ver)) {		printk(KERN_WARNING "Processor #%d INVALID. (Max ID: %d).\n",			m->mpc_apicid, MAX_APICS);		--num_processors;		return;	}	if (found_bsp)		cpu = 0;	else		cpu = num_processors - 1;	cpu_set(cpu, cpu_possible_map);	tmp = apicid_to_cpu_present(apicid);	physids_or(phys_cpu_present_map, phys_cpu_present_map, tmp);		/*	 * Validate version	 */	if (ver == 0x0) {		printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! fixing up to 0x10. (tell your hw vendor)\n", m->mpc_apicid);		ver = 0x10;	}	apic_version[m->mpc_apicid] = ver;	if ((num_processors > 8) &&	    APIC_XAPIC(ver) &&	    (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL))		def_to_bigsmp = 1;	else		def_to_bigsmp = 0;	bios_cpu_apicid[num_processors - 1] = m->mpc_apicid;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/1299232b5743da454c73853b90b3d2d83dce1737/mpparse.c/clean/arch/i386/kernel/mpparse.c