static int __devinit snd_via82xx_chip_init(via82xx_t *chip) 
static int snd_via82xx_chip_init(via82xx_t *chip) 
static int __devinit snd_via82xx_chip_init(via82xx_t *chip){	unsigned int val;	int max_count;	unsigned char pval;#if 0 /* broken on K7M? */	if (chip->chip_type == TYPE_VIA686)		/* disable all legacy ports */		pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);#endif	pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);	if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */		/* deassert ACLink reset, force SYNC */		pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,				      VIA_ACLINK_CTRL_ENABLE |				      VIA_ACLINK_CTRL_RESET |				      VIA_ACLINK_CTRL_SYNC);		udelay(100);#if 1 /* FIXME: should we do full reset here for all chip models? */		pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);		udelay(100);#else		/* deassert ACLink reset, force SYNC (warm AC'97 reset) */		pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,				      VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);		udelay(2);#endif		/* ACLink on, deassert ACLink reset, VSR, SGD data out */		/* note - FM data out has trouble with non VRA codecs !! */		pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);		udelay(100);	}		/* Make sure VRA is enabled, in case we didn't do a	 * complete codec reset, above */	pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);	if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {		/* ACLink on, deassert ACLink reset, VSR, SGD data out */		/* note - FM data out has trouble with non VRA codecs !! */		pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);		udelay(100);	}	/* wait until codec ready */	max_count = ((3 * HZ) / 4) + 1;	do {		pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);		if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */			break;		set_current_state(TASK_UNINTERRUPTIBLE);		schedule_timeout(1);	} while (--max_count > 0);	if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)		snd_printk("AC'97 codec is not ready [0x%x]\n", val);#if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */	snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |				 VIA_REG_AC97_SECONDARY_VALID |				 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));	max_count = ((3 * HZ) / 4) + 1;	snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |				 VIA_REG_AC97_SECONDARY_VALID |				 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));	do {		if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) {			chip->ac97_secondary = 1;			goto __ac97_ok2;		}		set_current_state(TASK_INTERRUPTIBLE);		schedule_timeout(1);	} while (--max_count > 0);	/* This is ok, the most of motherboards have only one codec */      __ac97_ok2:#endif	if (chip->chip_type == TYPE_VIA686) {		/* route FM trap to IRQ, disable FM trap */		pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);		/* disable all GPI interrupts */		outl(0, VIAREG(chip, GPI_INTR));	}	if (chip->chip_type != TYPE_VIA686) {		/* Workaround for Award BIOS bug:		 * DXS channels don't work properly with VRA if MC97 is disabled.		 */		struct pci_dev *pci;		pci = pci_find_device(0x1106, 0x3068, NULL); /* MC97 */		if (pci) {			unsigned char data;			pci_read_config_byte(pci, 0x44, &data);			pci_write_config_byte(pci, 0x44, data | 0x40);		}	}	if (chip->chip_type != TYPE_VIA8233A) {		int i, idx;		for (idx = 0; idx < 4; idx++) {			unsigned long port = chip->port + 0x10 * idx;			for (i = 0; i < 2; i++)				outb(chip->playback_volume[i], port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);		}	}	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/b3214970abbe983cd89842ae24ea00e21bba79f6/via82xx.c/buggy/sound/pci/via82xx.c