child->bridge_ctl = PCI_BRIDGE_CTL_NO_ISA; 
child->bridge_ctl = bctl | PCI_BRIDGE_CTL_NO_ISA; 
int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass){	struct pci_bus *child;	int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);	u32 buses, i;	u16 bctl;	pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);	pr_debug("PCI: Scanning behind PCI bridge %s, config %06x, pass %d\n",		 pci_name(dev), buses & 0xffffff, pass);	/* Disable MasterAbortMode during probing to avoid reporting	   of bus errors (in some architectures) */ 	pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);	pci_write_config_word(dev, PCI_BRIDGE_CONTROL,			      bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);	pci_enable_crs(dev);	if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus) {		unsigned int cmax, busnr;		/*		 * Bus already configured by firmware, process it in the first		 * pass and just note the configuration.		 */		if (pass)			return max;		busnr = (buses >> 8) & 0xFF;		/*		 * If we already got to this bus through a different bridge,		 * ignore it.  This can happen with the i450NX chipset.		 */		if (pci_find_bus(pci_domain_nr(bus), busnr)) {			printk(KERN_INFO "PCI: Bus %04x:%02x already known\n",					pci_domain_nr(bus), busnr);			return max;		}		child = pci_add_new_bus(bus, dev, busnr);		if (!child)			return max;		child->primary = buses & 0xFF;		child->subordinate = (buses >> 16) & 0xFF;		child->bridge_ctl = bctl;		cmax = pci_scan_child_bus(child);		if (cmax > max)			max = cmax;		if (child->subordinate > max)			max = child->subordinate;	} else {		/*		 * We need to assign a number to this bus which we always		 * do in the second pass.		 */		if (!pass)			return max;		/* Clear errors */		pci_write_config_word(dev, PCI_STATUS, 0xffff);		/* Prevent assigning a bus number that already exists.		 * This can happen when a bridge is hot-plugged */		if (pci_find_bus(pci_domain_nr(bus), max+1))			return max;		child = pci_add_new_bus(bus, dev, ++max);		buses = (buses & 0xff000000)		      | ((unsigned int)(child->primary)     <<  0)		      | ((unsigned int)(child->secondary)   <<  8)		      | ((unsigned int)(child->subordinate) << 16);		/*		 * yenta.c forces a secondary latency timer of 176.		 * Copy that behaviour here.		 */		if (is_cardbus) {			buses &= ~0xff000000;			buses |= CARDBUS_LATENCY_TIMER << 24;		}					/*		 * We need to blast all three values with a single write.		 */		pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);		if (!is_cardbus) {			child->bridge_ctl = PCI_BRIDGE_CTL_NO_ISA;			/*			 * Adjust subordinate busnr in parent buses.			 * We do this before scanning for children because			 * some devices may not be detected if the bios			 * was lazy.			 */			pci_fixup_parent_subordinate_busnr(child, max);			/* Now we can scan all subordinate buses... */			max = pci_scan_child_bus(child);		} else {			/*			 * For CardBus bridges, we leave 4 bus numbers			 * as cards with a PCI-to-PCI bridge can be			 * inserted later.			 */			for (i=0; i<CARDBUS_RESERVE_BUSNR; i++)				if (pci_find_bus(pci_domain_nr(bus),							max+i+1))					break;			max += i;			pci_fixup_parent_subordinate_busnr(child, max);		}		/*		 * Set the subordinate bus number to its real value.		 */		child->subordinate = max;		pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);	}	pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);	sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);	return max;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/10f4338ca8534823bc6c843edbbe42fd4e73d258/probe.c/buggy/drivers/pci/probe.c