value = (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833)); E1000_WRITE_REG(&adapter->hw, STATUS, (0xFFFFFFFF)); if(value != (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833))) { 
switch (adapter->hw.mac_type) { case e1000_82573: toggle = 0x7FFFF033; break; default: toggle = 0xFFFFF833; break; }  before = E1000_READ_REG(&adapter->hw, STATUS); value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle); E1000_WRITE_REG(&adapter->hw, STATUS, toggle); after = E1000_READ_REG(&adapter->hw, STATUS) & toggle; if(value != after) { DPRINTK(DRV, ERR, "failed STATUS register test got: " "0x%08X expected: 0x%08X\n", after, value); 
e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data){	uint32_t value;	uint32_t i;	/* The status register is Read Only, so a write should fail.	 * Some bits that get toggled are ignored.	 */	value = (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833));	E1000_WRITE_REG(&adapter->hw, STATUS, (0xFFFFFFFF));	if(value != (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833))) {		*data = 1;		return 1;	}	REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);	REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);	REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);	REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);	REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);	REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);	REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);	REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);	REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);	REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);	REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);	REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);	REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);	REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);	REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);	REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);	REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);	if(adapter->hw.mac_type >= e1000_82543) {		REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);		REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);		REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);		REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);		REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);		for(i = 0; i < E1000_RAR_ENTRIES; i++) {			REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,					 0xFFFFFFFF);			REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,					 0xFFFFFFFF);		}	} else {		REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);		REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);		REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);		REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);	}	for(i = 0; i < E1000_MC_TBL_SIZE; i++)		REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);	*data = 0;	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/b01f66910b8b36b2fe9e8051222ea418ad040cea/e1000_ethtool.c/buggy/drivers/net/e1000/e1000_ethtool.c