sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, int flags) 
sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags) 
sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, int flags){	struct ioc *ioc;	void *addr;	ioc = GET_IOC(dev);	ASSERT(ioc);#ifdef CONFIG_NUMA	{		struct page *page;		page = alloc_pages_node(ioc->node == MAX_NUMNODES ?		                        numa_node_id() : ioc->node, flags,		                        get_order(size));		if (unlikely(!page))			return NULL;		addr = page_address(page);	}#else	addr = (void *) __get_free_pages(flags, get_order(size));#endif	if (unlikely(!addr))		return NULL;	memset(addr, 0, size);	*dma_handle = virt_to_phys(addr);#ifdef ALLOW_IOV_BYPASS	ASSERT(dev->coherent_dma_mask);	/* 	** Check if the PCI device can DMA to ptr... if so, just return ptr 	*/	if (likely((*dma_handle & ~dev->coherent_dma_mask) == 0)) {		DBG_BYPASS("sba_alloc_coherent() bypass mask/addr: 0x%lx/0x%lx\n",		           dev->coherent_dma_mask, *dma_handle);		return addr;	}#endif	/*	 * If device can't bypass or bypass is disabled, pass the 32bit fake	 * device to map single to get an iova mapping.	 */	*dma_handle = sba_map_single(&ioc->sac_only_dev->dev, addr, size, 0);	return addr;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/06a544971fad0992fe8b92c5647538d573089dd4/sba_iommu.c/clean/arch/ia64/hp/common/sba_iommu.c