static void __init intel_init_thermal(struct cpuinfo_x86 *c) 
static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c) 
static void __init intel_init_thermal(struct cpuinfo_x86 *c){	u32 l, h;	int tm2 = 0;	unsigned int cpu = smp_processor_id();	if (!cpu_has(c, X86_FEATURE_ACPI))		return;	if (!cpu_has(c, X86_FEATURE_ACC))		return;	/* first check if TM1 is already enabled by the BIOS, in which	 * case there might be some SMM goo which handles it, so we can't even	 * put a handler since it might be delivered via SMI already.	 */	rdmsr(MSR_IA32_MISC_ENABLE, l, h);	h = apic_read(APIC_LVTTHMR);	if ((l & (1 << 3)) && (h & APIC_DM_SMI)) {		printk(KERN_DEBUG		       "CPU%d: Thermal monitoring handled by SMI\n", cpu);		return;	}	if (cpu_has(c, X86_FEATURE_TM2) && (l & (1 << 13)))		tm2 = 1;	if (h & APIC_VECTOR_MASK) {		printk(KERN_DEBUG		       "CPU%d: Thermal LVT vector (%#x) already "		       "installed\n", cpu, (h & APIC_VECTOR_MASK));		return;	}	h = THERMAL_APIC_VECTOR;	h |= (APIC_DM_FIXED | APIC_LVT_MASKED);	apic_write_around(APIC_LVTTHMR, h);	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);	wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);	rdmsr(MSR_IA32_MISC_ENABLE, l, h);	wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h);	l = apic_read(APIC_LVTTHMR);	apic_write_around(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);	printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",		cpu, tm2 ? "TM2" : "TM1");	return;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/e6982c671c560da4a0bc5c908cbcbec12bd5991d/mce_intel.c/clean/arch/x86_64/kernel/mce_intel.c