XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0; 
XENA_dev_config_t __iomem *bar0 = nic->bar0; 
int s2io_enable_msi_x(nic_t *nic){	XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;	u64 tx_mat, rx_mat;	u16 msi_control; /* Temp variable */	int ret, i, j, msix_indx = 1;	nic->entries = kmalloc(MAX_REQUESTED_MSI_X * sizeof(struct msix_entry),			       GFP_KERNEL);	if (nic->entries == NULL) {		DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n", __FUNCTION__);		return -ENOMEM;	}	memset(nic->entries, 0, MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));	nic->s2io_entries =		kmalloc(MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry),				   GFP_KERNEL);	if (nic->s2io_entries == NULL) {		DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n", __FUNCTION__);		kfree(nic->entries);		return -ENOMEM;	}	memset(nic->s2io_entries, 0,	       MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));	for (i=0; i< MAX_REQUESTED_MSI_X; i++) {		nic->entries[i].entry = i;		nic->s2io_entries[i].entry = i;		nic->s2io_entries[i].arg = NULL;		nic->s2io_entries[i].in_use = 0;	}	tx_mat = readq(&bar0->tx_mat0_n[0]);	for (i=0; i<nic->config.tx_fifo_num; i++, msix_indx++) {		tx_mat |= TX_MAT_SET(i, msix_indx);		nic->s2io_entries[msix_indx].arg = &nic->mac_control.fifos[i];		nic->s2io_entries[msix_indx].type = MSIX_FIFO_TYPE;		nic->s2io_entries[msix_indx].in_use = MSIX_FLG;	}	writeq(tx_mat, &bar0->tx_mat0_n[0]);	if (!nic->config.bimodal) {		rx_mat = readq(&bar0->rx_mat);		for (j=0; j<nic->config.rx_ring_num; j++, msix_indx++) {			rx_mat |= RX_MAT_SET(j, msix_indx);			nic->s2io_entries[msix_indx].arg = &nic->mac_control.rings[j];			nic->s2io_entries[msix_indx].type = MSIX_RING_TYPE;			nic->s2io_entries[msix_indx].in_use = MSIX_FLG;		}		writeq(rx_mat, &bar0->rx_mat);	} else {		tx_mat = readq(&bar0->tx_mat0_n[7]);		for (j=0; j<nic->config.rx_ring_num; j++, msix_indx++) {			tx_mat |= TX_MAT_SET(i, msix_indx);			nic->s2io_entries[msix_indx].arg = &nic->mac_control.rings[j];			nic->s2io_entries[msix_indx].type = MSIX_RING_TYPE;			nic->s2io_entries[msix_indx].in_use = MSIX_FLG;		}		writeq(tx_mat, &bar0->tx_mat0_n[7]);	}	ret = pci_enable_msix(nic->pdev, nic->entries, MAX_REQUESTED_MSI_X);	if (ret) {		DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name);		kfree(nic->entries);		kfree(nic->s2io_entries);		nic->entries = NULL;		nic->s2io_entries = NULL;		return -ENOMEM;	}	/*	 * To enable MSI-X, MSI also needs to be enabled, due to a bug	 * in the herc NIC. (Temp change, needs to be removed later)	 */	pci_read_config_word(nic->pdev, 0x42, &msi_control);	msi_control |= 0x1; /* Enable MSI */	pci_write_config_word(nic->pdev, 0x42, msi_control);	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/eef55ac7bf16669cb022db30143d0a6d8cb1f5e6/s2io.c/buggy/drivers/net/s2io.c