asm volatile("fdc 0(%0)" : : "r" (pdir_ptr[7])); 
asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr[7])); 
ccio_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt){	u32 iovp = (u32)CCIO_IOVP(iova);	size_t saved_byte_cnt;	/* round up to nearest page size */	saved_byte_cnt = byte_cnt = ROUNDUP(byte_cnt, IOVP_SIZE);	while(byte_cnt > 0) {		/* invalidate one page at a time */		unsigned int idx = PDIR_INDEX(iovp);		char *pdir_ptr = (char *) &(ioc->pdir_base[idx]);		BUG_ON(idx >= (ioc->pdir_size / sizeof(u64)));		pdir_ptr[7] = 0;	/* clear only VALID bit */ 		/*		** FIXME: PCX_W platforms don't need FDC/SYNC. (eg C360)		**   PCX-U/U+ do. (eg C200/C240)		** See PDC_MODEL/option 0/SW_CAP for "Non-coherent IO-PDIR bit".		**		** Hopefully someone figures out how to patch (NOP) the		** FDC/SYNC out at boot time.		*/		asm volatile("fdc 0(%0)" : : "r" (pdir_ptr[7]));		iovp     += IOVP_SIZE;		byte_cnt -= IOVP_SIZE;	}	asm volatile("sync");	ccio_clear_io_tlb(ioc, CCIO_IOVP(iova), saved_byte_cnt);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/86a61ee9c9f3d8b632d29e86ac6610c43ebbb4f0/ccio-dma.c/buggy/drivers/parisc/ccio-dma.c