state->config->pll_set(fe, p); 
if (state->config->pll_set) { state->config->pll_set(fe, p); } else if (state->config->pll_desc) { u8 pllbuf[4]; struct i2c_msg msg = { .addr = state->config->pll_address, .buf = pllbuf, .len = 4 }; dvb_pll_configure(state->config->pll_desc, pllbuf, p->frequency, p->u.ofdm.bandwidth); i2c_transfer(state->i2c, &msg, 1); } else { BUG(); } 
static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p){	u8 val;	struct cx22702_state* state = (struct cx22702_state*) fe->demodulator_priv;	/* set PLL */        cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe);	state->config->pll_set(fe, p);        cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1);	/* set inversion */	cx22702_set_inversion (state, p->inversion);	/* set bandwidth */	switch(p->u.ofdm.bandwidth) {	case BANDWIDTH_6_MHZ:		cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20 );		break;	case BANDWIDTH_7_MHZ:		cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10 );		break;	case BANDWIDTH_8_MHZ:		cx22702_writereg(state, 0x0C, cx22702_readreg(state, 0x0C) &0xcf );		break;	default:		dprintk ("%s: invalid bandwidth\n",__FUNCTION__);		return -EINVAL;	}	p->u.ofdm.code_rate_LP = FEC_AUTO; //temp hack as manual not working	/* use auto configuration? */	if((p->u.ofdm.hierarchy_information==HIERARCHY_AUTO) ||	   (p->u.ofdm.constellation==QAM_AUTO) ||	   (p->u.ofdm.code_rate_HP==FEC_AUTO) ||	   (p->u.ofdm.code_rate_LP==FEC_AUTO) ||	   (p->u.ofdm.guard_interval==GUARD_INTERVAL_AUTO) ||	   (p->u.ofdm.transmission_mode==TRANSMISSION_MODE_AUTO) ) {		/* TPS Source - use hardware driven values */		cx22702_writereg(state, 0x06, 0x10);		cx22702_writereg(state, 0x07, 0x9);		cx22702_writereg(state, 0x08, 0xC1);		cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc );		cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );		cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */		printk("%s: Autodetecting\n",__FUNCTION__);		return 0;	}	/* manually programmed values */	val=0;	switch(p->u.ofdm.constellation) {		case   QPSK: val = (val&0xe7); break;		case QAM_16: val = (val&0xe7)|0x08; break;		case QAM_64: val = (val&0xe7)|0x10; break;		default:			dprintk ("%s: invalid constellation\n",__FUNCTION__);			return -EINVAL;	}	switch(p->u.ofdm.hierarchy_information) {		case HIERARCHY_NONE: val = (val&0xf8); break;		case    HIERARCHY_1: val = (val&0xf8)|1; break;		case    HIERARCHY_2: val = (val&0xf8)|2; break;		case    HIERARCHY_4: val = (val&0xf8)|3; break;		default:			dprintk ("%s: invalid hierarchy\n",__FUNCTION__);			return -EINVAL;	}	cx22702_writereg (state, 0x06, val);	val=0;	switch(p->u.ofdm.code_rate_HP) {		case FEC_NONE:		case FEC_1_2: val = (val&0xc7); break;		case FEC_2_3: val = (val&0xc7)|0x08; break;		case FEC_3_4: val = (val&0xc7)|0x10; break;		case FEC_5_6: val = (val&0xc7)|0x18; break;		case FEC_7_8: val = (val&0xc7)|0x20; break;		default:			dprintk ("%s: invalid code_rate_HP\n",__FUNCTION__);			return -EINVAL;	}	switch(p->u.ofdm.code_rate_LP) {		case FEC_NONE:		case FEC_1_2: val = (val&0xf8); break;		case FEC_2_3: val = (val&0xf8)|1; break;		case FEC_3_4: val = (val&0xf8)|2; break;		case FEC_5_6: val = (val&0xf8)|3; break;		case FEC_7_8: val = (val&0xf8)|4; break;		default:			dprintk ("%s: invalid code_rate_LP\n",__FUNCTION__);			return -EINVAL;	}	cx22702_writereg (state, 0x07, val);	val=0;	switch(p->u.ofdm.guard_interval) {		case GUARD_INTERVAL_1_32: val = (val&0xf3); break;		case GUARD_INTERVAL_1_16: val = (val&0xf3)|0x04; break;		case  GUARD_INTERVAL_1_8: val = (val&0xf3)|0x08; break;		case  GUARD_INTERVAL_1_4: val = (val&0xf3)|0x0c; break;		default:			dprintk ("%s: invalid guard_interval\n",__FUNCTION__);			return -EINVAL;	}	switch(p->u.ofdm.transmission_mode) {		case TRANSMISSION_MODE_2K: val = (val&0xfc); break;		case TRANSMISSION_MODE_8K: val = (val&0xfc)|1; break;		default:			dprintk ("%s: invalid transmission_mode\n",__FUNCTION__);			return -EINVAL;	}	cx22702_writereg(state, 0x08, val);	cx22702_writereg(state, 0x0B, (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02 );	cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );	/* Begin channel aquisition */	cx22702_writereg(state, 0x00, 0x01);	return 0;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/9990d744bea7d28e83c420e2c9d524c7a8a2d136/cx22702.c/buggy/drivers/media/dvb/frontends/cx22702.c