u32 seglen = (u32)sg_dma_len(sl + i); sgp[i].address = (u32)sg_dma_address(sl + i); 
u32 busaddr = (u32)sg_dma_address(&sl[i]); u32 seglen = (u32)sl[i].length; sgp[i].address = busaddr; 
static void build_srb(struct scsi_cmnd *cmd, struct DeviceCtlBlk *dcb,		struct ScsiReqBlk *srb){	enum dma_data_direction dir = cmd->sc_data_direction;	dprintkdbg(DBG_0, "build_srb: (pid#%li) <%02i-%i>\n",		cmd->pid, dcb->target_id, dcb->target_lun);	srb->dcb = dcb;	srb->cmd = cmd;	srb->sg_count = 0;	srb->total_xfer_length = 0;	srb->sg_bus_addr = 0;	srb->virt_addr = NULL;	srb->sg_index = 0;	srb->adapter_status = 0;	srb->target_status = 0;	srb->msg_count = 0;	srb->status = 0;	srb->flag = 0;	srb->state = 0;	srb->retry_count = 0;	srb->tag_number = TAG_NONE;	srb->scsi_phase = PH_BUS_FREE;	/* initial phase */	srb->end_message = 0;	if (dir == PCI_DMA_NONE || !cmd->request_buffer) {		dprintkdbg(DBG_0,			"build_srb: [0] len=%d buf=%p use_sg=%d !MAP=%08x\n",			cmd->bufflen, cmd->request_buffer,			cmd->use_sg, srb->segment_x[0].address);	} else if (cmd->use_sg) {		int i;		u32 reqlen = cmd->request_bufflen;		struct scatterlist *sl = (struct scatterlist *)					 cmd->request_buffer;		struct SGentry *sgp = srb->segment_x;		srb->sg_count = pci_map_sg(dcb->acb->dev, sl, cmd->use_sg,					   dir);		dprintkdbg(DBG_0,			"build_srb: [n] len=%d buf=%p use_sg=%d segs=%d\n",			reqlen, cmd->request_buffer, cmd->use_sg,			srb->sg_count);		for (i = 0; i < srb->sg_count; i++) {			u32 seglen = (u32)sg_dma_len(sl + i);			sgp[i].address = (u32)sg_dma_address(sl + i);			sgp[i].length = seglen;			srb->total_xfer_length += seglen;			srb->virt_map[i] = kmap(sl[i].page);		}		srb->virt_addr = srb->virt_map[0];		sgp += srb->sg_count - 1;		/*		 * adjust last page if too big as it is allocated		 * on even page boundaries		 */		if (srb->total_xfer_length > reqlen) {			sgp->length -= (srb->total_xfer_length - reqlen);			srb->total_xfer_length = reqlen;		}		/* Fixup for WIDE padding - make sure length is even */		if (dcb->sync_period & WIDE_SYNC &&		    srb->total_xfer_length % 2) {			srb->total_xfer_length++;			sgp->length++;		}		srb->sg_bus_addr = pci_map_single(dcb->acb->dev,						srb->segment_x,				            	SEGMENTX_LEN,				            	PCI_DMA_TODEVICE);		dprintkdbg(DBG_SG, "build_srb: [n] map sg %p->%08x(%05x)\n",			srb->segment_x, srb->sg_bus_addr, SEGMENTX_LEN);	} else {		srb->total_xfer_length = cmd->request_bufflen;		srb->sg_count = 1;		srb->segment_x[0].address =			pci_map_single(dcb->acb->dev, cmd->request_buffer,				       srb->total_xfer_length, dir);		/* Fixup for WIDE padding - make sure length is even */		if (dcb->sync_period & WIDE_SYNC && srb->total_xfer_length % 2)			srb->total_xfer_length++;		srb->segment_x[0].length = srb->total_xfer_length;		srb->virt_addr = cmd->request_buffer;		dprintkdbg(DBG_0,			"build_srb: [1] len=%d buf=%p use_sg=%d map=%08x\n",			srb->total_xfer_length, cmd->request_buffer,			cmd->use_sg, srb->segment_x[0].address);	}}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/b4b08e581fac8e0ba9ae348bdc13246c9798c99e/dc395x.c/clean/drivers/scsi/dc395x.c