UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN); 
UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); 
imx_set_termios(struct uart_port *port, struct termios *termios,		   struct termios *old){	struct imx_port *sport = (struct imx_port *)port;	unsigned long flags;	unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;	unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;	/*	 * If we don't support modem control lines, don't allow	 * these to be set.	 */	if (0) {		termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);		termios->c_cflag |= CLOCAL;	}	/*	 * We only support CS7 and CS8.	 */	while ((termios->c_cflag & CSIZE) != CS7 &&	       (termios->c_cflag & CSIZE) != CS8) {		termios->c_cflag &= ~CSIZE;		termios->c_cflag |= old_csize;		old_csize = CS8;	}	if ((termios->c_cflag & CSIZE) == CS8)		ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;	else		ucr2 = UCR2_SRST | UCR2_IRTS;	if (termios->c_cflag & CRTSCTS) {		ucr2 &= ~UCR2_IRTS;		ucr2 |= UCR2_CTSC;	}	if (termios->c_cflag & CSTOPB)		ucr2 |= UCR2_STPB;	if (termios->c_cflag & PARENB) {		ucr2 |= UCR2_PREN;		if (!(termios->c_cflag & PARODD))			ucr2 |= UCR2_PROE;	}	/*	 * Ask the core to calculate the divisor for us.	 */	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);	quot = uart_get_divisor(port, baud);	spin_lock_irqsave(&sport->port.lock, flags);	sport->port.read_status_mask = 0;	if (termios->c_iflag & INPCK)		sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);	if (termios->c_iflag & (BRKINT | PARMRK))		sport->port.read_status_mask |= URXD_BRK;	/*	 * Characters to ignore	 */	sport->port.ignore_status_mask = 0;	if (termios->c_iflag & IGNPAR)		sport->port.ignore_status_mask |= URXD_PRERR;	if (termios->c_iflag & IGNBRK) {		sport->port.ignore_status_mask |= URXD_BRK;		/*		 * If we're ignoring parity and break indicators,		 * ignore overruns too (for real raw support).		 */		if (termios->c_iflag & IGNPAR)			sport->port.ignore_status_mask |= URXD_OVRRUN;	}	del_timer_sync(&sport->timer);	/*	 * Update the per-port timeout.	 */	uart_update_timeout(port, termios->c_cflag, baud);	/*	 * disable interrupts and drain transmitter	 */	old_ucr1 = UCR1((u32)sport->port.membase);	UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN);	while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))		barrier();	/* then, disable everything */	old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );	UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);	/* set the parity, stop bits and data size */	UCR2((u32)sport->port.membase) = ucr2;	/* set the baud rate. We assume uartclk = 16 MHz	 *	 * baud * 16   UBIR - 1	 * --------- = --------	 *  uartclk    UBMR - 1	 */	UBIR((u32)sport->port.membase) = (baud / 100) - 1;	UBMR((u32)sport->port.membase) = 10000 - 1;	UCR1((u32)sport->port.membase) = old_ucr1;	UCR2((u32)sport->port.membase) |= old_txrxen;	if (UART_ENABLE_MS(&sport->port, termios->c_cflag))		imx_enable_ms(&sport->port);	spin_unlock_irqrestore(&sport->port.lock, flags);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/ceca629e0b4858d6b8bff260dab2e947d31aca56/imx.c/clean/drivers/serial/imx.c