edma = readl(port_mmio + EDMA_CMD_OFS); if (EDMA_EN & edma) { /* disable EDMA if active */ edma &= ~EDMA_EN; writelfl(edma | EDMA_DS, port_mmio + EDMA_CMD_OFS); udelay(1); } else if (mv_port_bdma_capable(ap) && (bdma = readl(port_mmio + BDMA_CMD_OFS)) & BDMA_START) { /* disable BDMA if active */ writelfl(bdma & ~BDMA_START, port_mmio + BDMA_CMD_OFS); } 
mv_stop_dma(ap); 
static void mv_phy_reset(struct ata_port *ap){	void __iomem *port_mmio = mv_ap_base(ap);	struct ata_taskfile tf;	struct ata_device *dev = &ap->device[0];	u32 edma = 0, bdma;	VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio);	edma = readl(port_mmio + EDMA_CMD_OFS);	if (EDMA_EN & edma) {		/* disable EDMA if active */		edma &= ~EDMA_EN;		writelfl(edma | EDMA_DS, port_mmio + EDMA_CMD_OFS);		udelay(1);	} else if (mv_port_bdma_capable(ap) &&		   (bdma = readl(port_mmio + BDMA_CMD_OFS)) & BDMA_START) {		/* disable BDMA if active */		writelfl(bdma & ~BDMA_START, port_mmio + BDMA_CMD_OFS);	}	writelfl(edma | ATA_RST, port_mmio + EDMA_CMD_OFS);	udelay(25);		/* allow reset propagation */	/* Spec never mentions clearing the bit.  Marvell's driver does	 * clear the bit, however.	 */	writelfl(edma & ~ATA_RST, port_mmio + EDMA_CMD_OFS);	VPRINTK("Done.  Now calling __sata_phy_reset()\n");	/* proceed to init communications via the scr_control reg */	__sata_phy_reset(ap);	if (ap->flags & ATA_FLAG_PORT_DISABLED) {		VPRINTK("Port disabled pre-sig.  Exiting.\n");		return;	}	tf.lbah = readb((void __iomem *) ap->ioaddr.lbah_addr);	tf.lbam = readb((void __iomem *) ap->ioaddr.lbam_addr);	tf.lbal = readb((void __iomem *) ap->ioaddr.lbal_addr);	tf.nsect = readb((void __iomem *) ap->ioaddr.nsect_addr);	dev->class = ata_dev_classify(&tf);	if (!ata_dev_present(dev)) {		VPRINTK("Port disabled post-sig: No device present.\n");		ata_port_disable(ap);	}	VPRINTK("EXIT\n");}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/31961943e3110c5a1c36b1e0069c29f7c4380e51/sata_mv.c/buggy/drivers/scsi/sata_mv.c