pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd); 
void s2io_reset(nic_t * sp){	XENA_dev_config_t __iomem *bar0 = sp->bar0;	u64 val64;	u16 subid, pci_cmd;	val64 = SW_RESET_ALL;	writeq(val64, &bar0->sw_reset);	/*	 * At this stage, if the PCI write is indeed completed, the	 * card is reset and so is the PCI Config space of the device.	 * So a read cannot be issued at this stage on any of the	 * registers to ensure the write into "sw_reset" register	 * has gone through.	 * Question: Is there any system call that will explicitly force	 * all the write commands still pending on the bus to be pushed	 * through?	 * As of now I'am just giving a 250ms delay and hoping that the	 * PCI write to sw_reset register is done by this time.	 */	msleep(250);	if (!(sp->device_type & XFRAME_II_DEVICE)) {	/* Restore the PCI state saved during initializarion. */		pci_restore_state(sp->pdev);	} else {		pci_set_master(sp->pdev);	}	s2io_init_pci(sp);	msleep(250);	/* Set swapper to enable I/O register access */	s2io_set_swapper(sp);	/* Clear certain PCI/PCI-X fields after reset */	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);	pci_cmd &= 0x7FFF; /* Clear parity err detect bit */	pci_write_config_word(sp->pdev, PCI_COMMAND, pci_cmd);	val64 = readq(&bar0->txpic_int_reg);	val64 &= ~BIT(62); /* Clearing PCI_STATUS error reflected here */	writeq(val64, &bar0->txpic_int_reg);	/* Clearing PCIX Ecc status register */	pci_write_config_dword(sp->pdev, 0x68, 0);	/* Reset device statistics maintained by OS */	memset(&sp->stats, 0, sizeof (struct net_device_stats));	/* SXE-002: Configure link and activity LED to turn it off */	subid = sp->pdev->subsystem_device;	if (((subid & 0xFF) >= 0x07) &&	    (sp->device_type == XFRAME_I_DEVICE)) {		val64 = readq(&bar0->gpio_control);		val64 |= 0x0000800000000000ULL;		writeq(val64, &bar0->gpio_control);		val64 = 0x0411040400000000ULL;		writeq(val64, (void __iomem *) ((u8 *) bar0 + 0x2700));	}	/*	 * Clear spurious ECC interrupts that would have occured on	 * XFRAME II cards after reset.	 */	if (sp->device_type == XFRAME_II_DEVICE) {		val64 = readq(&bar0->pcc_err_reg);		writeq(val64, &bar0->pcc_err_reg);	}	sp->device_enabled_once = FALSE;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/0b1f7ebe455ba4f1f46e7024150eeddbbf08addc/s2io.c/buggy/drivers/net/s2io.c