(void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); readl((void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); 
(void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); 
static void pdc20621_packet_start(struct ata_queued_cmd *qc){	struct ata_port *ap = qc->ap;	struct ata_host_set *host_set = ap->host_set;	unsigned int port_no = ap->port_no;	void __iomem *mmio = host_set->mmio_base;	unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);	u8 seq = (u8) (port_no + 1);	unsigned int port_ofs;	/* hard-code chip #0 */	mmio += PDC_CHIP0_OFS;	VPRINTK("ata%u: ENTER\n", ap->id);	wmb();			/* flush PRD, pkt writes */	port_ofs = PDC_20621_DIMM_BASE + (PDC_DIMM_WINDOW_STEP * port_no);	/* if writing, we (1) DMA to DIMM, then (2) do ATA command */	if (rw && qc->tf.protocol == ATA_PROT_DMA) {		seq += 4;		pdc20621_dump_hdma(qc);		pdc20621_push_hdma(qc, seq, port_ofs + PDC_DIMM_HOST_PKT);		VPRINTK("queued ofs 0x%x (%u), seq %u\n",			port_ofs + PDC_DIMM_HOST_PKT,			port_ofs + PDC_DIMM_HOST_PKT,			seq);	} else {		writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4));		readl(mmio + PDC_20621_SEQCTL + (seq * 4));	/* flush */		writel(port_ofs + PDC_DIMM_ATA_PKT,		       (void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);		readl((void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);		VPRINTK("submitted ofs 0x%x (%u), seq %u\n",			port_ofs + PDC_DIMM_ATA_PKT,			port_ofs + PDC_DIMM_ATA_PKT,			seq);	}}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/a9afd7cd2f65ff85f5ffe931beb879ccf12540e0/sata_sx4.c/clean/drivers/scsi/sata_sx4.c