dma_addr_t *handle, int flag) 
dma_addr_t *handle, gfp_t flag) 
void *voyagergx_consistent_alloc(struct device *dev, size_t size,				 dma_addr_t *handle, int flag){	struct list_head *list = &voya_alloc_list;	struct voya_alloc_entry *entry;	struct sh_dev *shdev = to_sh_dev(dev);	unsigned long start, end;	unsigned long flags;	/*	 * The SM501 contains an integrated 8051 with its own SRAM.	 * Devices within the cchip can all hook into the 8051 SRAM.	 * We presently use this for the OHCI.	 *	 * Everything else goes through consistent_alloc().	 */	if (!dev || dev->bus != &sh_bus_types[SH_BUS_VIRT] ||		   (dev->bus == &sh_bus_types[SH_BUS_VIRT] &&		    shdev->dev_id != SH_DEV_ID_USB_OHCI))		return NULL;	start = OHCI_SRAM_START + OHCI_HCCA_SIZE;	entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC);	if (!entry)		return ERR_PTR(-ENOMEM);	entry->len = (size + 15) & ~15;	/*	 * The basis for this allocator is dwmw2's malloc.. the	 * Matrox allocator :-)	 */	spin_lock_irqsave(&voya_list_lock, flags);	list_for_each(list, &voya_alloc_list) {		struct voya_alloc_entry *p;		p = list_entry(list, struct voya_alloc_entry, list);		if (p->ofs - start >= size)			goto out;		start = p->ofs + p->len;	}	end  = start + (OHCI_SRAM_SIZE  - OHCI_HCCA_SIZE);	list = &voya_alloc_list;	if (end - start >= size) {out:		entry->ofs = start;		list_add_tail(&entry->list, list);		spin_unlock_irqrestore(&voya_list_lock, flags);		*handle = start;		return (void *)start;	}	kfree(entry);	spin_unlock_irqrestore(&voya_list_lock, flags);	return ERR_PTR(-EINVAL);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/6dae2c2306684d9e76a04c22dc090380a9009f12/consistent.c/buggy/arch/sh/cchips/voyagergx/consistent.c