 return 0; 
static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type){	int line = irq2gpio[irq];	u32 int_style;	enum ixp4xx_irq_type irq_type;	volatile u32 *int_reg;	/*	 * Only for GPIO IRQs	 */	if (line < 0)		return -EINVAL;	if (type & IRQT_BOTHEDGE) {		int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;		irq_type = IXP4XX_IRQ_EDGE;	} else  if (type & IRQT_RISING) {		int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;		irq_type = IXP4XX_IRQ_EDGE;	} else if (type & IRQT_FALLING) {		int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;		irq_type = IXP4XX_IRQ_EDGE;	} else if (type & IRQT_HIGH) {		int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;		irq_type = IXP4XX_IRQ_LEVEL;	} else if (type & IRQT_LOW) {		int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;		irq_type = IXP4XX_IRQ_LEVEL;	}	ixp4xx_config_irq(irq, irq_type);	if (line >= 8) {	/* pins 8-15 */		line -= 8;		int_reg = IXP4XX_GPIO_GPIT2R;	} else {		/* pins 0-7 */		int_reg = IXP4XX_GPIO_GPIT1R;	}	/* Clear the style for the appropriate pin */	*int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR <<	    		(line * IXP4XX_GPIO_STYLE_SIZE));	/* Set the new style */	*int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/6132f9e146150473f803323dc8064a5506e33952/common.c/clean/arch/arm/mach-ixp4xx/common.c