#endif 
static int i801_block_transaction(union i2c_smbus_data *data, char read_write,				  int command){	int i, len;	int smbcmd;	int temp;	int result = 0;	int timeout;	unsigned char hostc, errmask;	if (command == I2C_SMBUS_I2C_BLOCK_DATA) {		if (read_write == I2C_SMBUS_WRITE) {			/* set I2C_EN bit in configuration register */			pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc);			pci_write_config_byte(I801_dev, SMBHSTCFG,					      hostc | SMBHSTCFG_I2C_EN);		} else {			dev_err(&I801_dev->dev,				"I2C_SMBUS_I2C_BLOCK_READ not DB!\n");			return -1;		}	}	if (read_write == I2C_SMBUS_WRITE) {		len = data->block[0];		if (len < 1)			len = 1;		if (len > 32)			len = 32;		outb_p(len, SMBHSTDAT0);		outb_p(data->block[1], SMBBLKDAT);	} else {		len = 32;	/* max for reads */	}	if(isich4 && command != I2C_SMBUS_I2C_BLOCK_DATA) {		/* set 32 byte buffer */	}	for (i = 1; i <= len; i++) {		if (i == len && read_write == I2C_SMBUS_READ)			smbcmd = I801_BLOCK_LAST;		else			smbcmd = I801_BLOCK_DATA;		outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT);		dev_dbg(&I801_dev->dev, "Block (pre %d): CNT=%02x, CMD=%02x, "			"ADD=%02x, DAT0=%02x, BLKDAT=%02x\n", i,			inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),			inb_p(SMBHSTDAT0), inb_p(SMBBLKDAT));		/* Make sure the SMBus host is ready to start transmitting */		temp = inb_p(SMBHSTSTS);		if (i == 1) {			/* Erronenous conditions before transaction: 			 * Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */			errmask=0x9f; 		} else {			/* Erronenous conditions during transaction: 			 * Failed, Bus_Err, Dev_Err, Intr */			errmask=0x1e; 		}		if (temp & errmask) {			dev_dbg(&I801_dev->dev, "SMBus busy (%02x). "				"Resetting...\n", temp);			outb_p(temp, SMBHSTSTS);			if (((temp = inb_p(SMBHSTSTS)) & errmask) != 0x00) {				dev_err(&I801_dev->dev,					"Reset failed! (%02x)\n", temp);				result = -1;                                goto END;			}			if (i != 1) {				/* if die in middle of block transaction, fail */				result = -1;				goto END;			}		}		if (i == 1)			outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT);		/* We will always wait for a fraction of a second! */		timeout = 0;		do {			temp = inb_p(SMBHSTSTS);			msleep(1);		}		    while ((!(temp & 0x80))			   && (timeout++ < MAX_TIMEOUT));		/* If the SMBus is still busy, we give up */		if (timeout >= MAX_TIMEOUT) {			result = -1;			dev_dbg(&I801_dev->dev, "SMBus Timeout!\n");		}		if (temp & 0x10) {			result = -1;			dev_dbg(&I801_dev->dev,				"Error: Failed bus transaction\n");		} else if (temp & 0x08) {			result = -1;			dev_err(&I801_dev->dev, "Bus collision!\n");		} else if (temp & 0x04) {			result = -1;			dev_dbg(&I801_dev->dev, "Error: no response!\n");		}		if (i == 1 && read_write == I2C_SMBUS_READ) {			len = inb_p(SMBHSTDAT0);			if (len < 1)				len = 1;			if (len > 32)				len = 32;			data->block[0] = len;		}		/* Retrieve/store value in SMBBLKDAT */		if (read_write == I2C_SMBUS_READ)			data->block[i] = inb_p(SMBBLKDAT);		if (read_write == I2C_SMBUS_WRITE && i+1 <= len)			outb_p(data->block[i+1], SMBBLKDAT);		if ((temp & 0x9e) != 0x00)			outb_p(temp, SMBHSTSTS);  /* signals SMBBLKDAT ready */		if ((temp = (0x1e & inb_p(SMBHSTSTS))) != 0x00) {			dev_dbg(&I801_dev->dev,				"Bad status (%02x) at end of transaction\n",				temp);		}		dev_dbg(&I801_dev->dev, "Block (post %d): CNT=%02x, CMD=%02x, "			"ADD=%02x, DAT0=%02x, BLKDAT=%02x\n", i,			inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),			inb_p(SMBHSTDAT0), inb_p(SMBBLKDAT));		if (result < 0)			goto END;	}#ifdef HAVE_PEC	if(isich4 && command == I2C_SMBUS_BLOCK_DATA_PEC) {		/* wait for INTR bit as advised by Intel */		timeout = 0;		do {			temp = inb_p(SMBHSTSTS);			msleep(1);		} while ((!(temp & 0x02))			   && (timeout++ < MAX_TIMEOUT));		if (timeout >= MAX_TIMEOUT) {			dev_dbg(&I801_dev->dev, "PEC Timeout!\n");		}		outb_p(temp, SMBHSTSTS); 	}#endif	result = 0;END:	if (command == I2C_SMBUS_I2C_BLOCK_DATA) {		/* restore saved configuration register value */		pci_write_config_byte(I801_dev, SMBHSTCFG, hostc);	}	return result;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/47b8b103f7f50d56568eb8d6cff0e3a2373f0eb3/i2c-i801.c/buggy/drivers/i2c/busses/i2c-i801.c