vga_out8 (0x3c4, 0x08); par->SR08 = vga_in8 (0x3c5); vga_out8 (0x3c5, 0x06); 
vga_out8 (0x3c4, 0x08, par); par->SR08 = vga_in8 (0x3c5, par); vga_out8 (0x3c5, 0x06, par); 
static void savage_get_default_par(struct savagefb_par *par){	unsigned char cr3a, cr53, cr66;	vga_out16 (0x3d4, 0x4838);	vga_out16 (0x3d4, 0xa039);	vga_out16 (0x3c4, 0x0608);	vga_out8 (0x3d4, 0x66);	cr66 = vga_in8 (0x3d5);	vga_out8 (0x3d5, cr66 | 0x80);	vga_out8 (0x3d4, 0x3a);	cr3a = vga_in8 (0x3d5);	vga_out8 (0x3d5, cr3a | 0x80);	vga_out8 (0x3d4, 0x53);	cr53 = vga_in8 (0x3d5);	vga_out8 (0x3d5, cr53 & 0x7f);	vga_out8 (0x3d4, 0x66);	vga_out8 (0x3d5, cr66);	vga_out8 (0x3d4, 0x3a);	vga_out8 (0x3d5, cr3a);	vga_out8 (0x3d4, 0x66);	vga_out8 (0x3d5, cr66);	vga_out8 (0x3d4, 0x3a);	vga_out8 (0x3d5, cr3a);	/* unlock extended seq regs */	vga_out8 (0x3c4, 0x08);	par->SR08 = vga_in8 (0x3c5);	vga_out8 (0x3c5, 0x06);	/* now save all the extended regs we need */	vga_out8 (0x3d4, 0x31);	par->CR31 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x32);	par->CR32 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x34);	par->CR34 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x36);	par->CR36 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x3a);	par->CR3A = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x40);	par->CR40 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x42);	par->CR42 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x45);	par->CR45 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x50);	par->CR50 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x51);	par->CR51 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x53);	par->CR53 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x58);	par->CR58 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x60);	par->CR60 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x66);	par->CR66 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x67);	par->CR67 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x68);	par->CR68 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x69);	par->CR69 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x6f);	par->CR6F = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x33);	par->CR33 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x86);	par->CR86 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x88);	par->CR88 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x90);	par->CR90 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x91);	par->CR91 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0xb0);	par->CRB0 = vga_in8 (0x3d5) | 0x80;	/* extended mode timing regs */	vga_out8 (0x3d4, 0x3b);	par->CR3B = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x3c);	par->CR3C = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x43);	par->CR43 = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x5d);	par->CR5D = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x5e);	par->CR5E = vga_in8 (0x3d5);	vga_out8 (0x3d4, 0x65);	par->CR65 = vga_in8 (0x3d5);	/* save seq extended regs for DCLK PLL programming */	vga_out8 (0x3c4, 0x0e);	par->SR0E = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x0f);	par->SR0F = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x10);	par->SR10 = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x11);	par->SR11 = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x12);	par->SR12 = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x13);	par->SR13 = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x29);	par->SR29 = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x15);	par->SR15 = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x30);	par->SR30 = vga_in8 (0x3c5);	vga_out8 (0x3c4, 0x18);	par->SR18 = vga_in8 (0x3c5);	/* Save flat panel expansion regsters. */	if (par->chip == S3_SAVAGE_MX) {		int i;		for (i = 0; i < 8; i++) {			vga_out8 (0x3c4, 0x54+i);			par->SR54[i] = vga_in8 (0x3c5);		}	}	vga_out8 (0x3d4, 0x66);	cr66 = vga_in8 (0x3d5);	vga_out8 (0x3d5, cr66 | 0x80);	vga_out8 (0x3d4, 0x3a);	cr3a = vga_in8 (0x3d5);	vga_out8 (0x3d5, cr3a | 0x80);	/* now save MIU regs */	if (par->chip != S3_SAVAGE_MX) {		par->MMPR0 = savage_in32(FIFO_CONTROL_REG);		par->MMPR1 = savage_in32(MIU_CONTROL_REG);		par->MMPR2 = savage_in32(STREAMS_TIMEOUT_REG);		par->MMPR3 = savage_in32(MISC_TIMEOUT_REG);	}	vga_out8 (0x3d4, 0x3a);	vga_out8 (0x3d5, cr3a);	vga_out8 (0x3d4, 0x66);	vga_out8 (0x3d5, cr66);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/1cc650c69f3079ce3c616c998a741bcf6ddf4f4d/savagefb_driver.c/buggy/drivers/video/savage/savagefb_driver.c