 /* return early if the buffer sizes will not change */ if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN) return 0; if (old_mtu == new_mtu) return 0;  /* synchronized against open : rtnl_lock() held by caller */ if (netif_running(dev)) { u8 *base = get_hwbase(dev); /* * It seems that the nic preloads valid ring entries into an * internal buffer. The procedure for flushing everything is * guessed, there is probably a simpler approach. * Changing the MTU is a rare event, it shouldn't matter. */ disable_irq(dev->irq); spin_lock_bh(&dev->xmit_lock); spin_lock(&np->lock); /* stop engines */ nv_stop_rx(dev); nv_stop_tx(dev); nv_txrx_reset(dev); /* drain rx queue */ nv_drain_rx(dev); nv_drain_tx(dev); /* reinit driver view of the rx queue */ nv_init_rx(dev); nv_init_tx(dev); /* alloc new rx buffers */ set_bufsize(dev); if (nv_alloc_rx(dev)) { if (!np->in_shutdown) mod_timer(&np->oom_kick, jiffies + OOM_REFILL); } /* reinit nic view of the rx queue */ writel(np->rx_buf_sz, base + NvRegOffloadConfig); writel((u32) np->ring_addr, base + NvRegRxRingPhysAddr); writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr); writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT), base + NvRegRingSizes); pci_push(base); writel(NVREG_TXRXCTL_KICK|np->desc_ver, get_hwbase(dev) + NvRegTxRxControl); pci_push(base);  /* restart rx engine */ nv_start_rx(dev); nv_start_tx(dev); spin_unlock(&np->lock); spin_unlock_bh(&dev->xmit_lock); enable_irq(dev->irq); } 
static int nv_change_mtu(struct net_device *dev, int new_mtu){	if (new_mtu > ETH_DATA_LEN)		return -EINVAL;	dev->mtu = new_mtu;	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/d81c0983de80c956cf37835b0d35adb3ab4bb03a/forcedeth.c/buggy/drivers/net/forcedeth.c