/* revert to mips rounding mode */ ieee754_csr.rm = mips_rm[ieee754_csr.rm]; 
int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp,	struct mips_fpu_soft_struct *ctx){	unsigned long oldepc, prevepc;	mips_instruction insn;	int sig = 0;	oldepc = xcp->cp0_epc;	do {		prevepc = xcp->cp0_epc;		if (get_user(insn, (mips_instruction *) xcp->cp0_epc)) {			fpuemuprivate.stats.errors++;			return SIGBUS;		}		if (insn == 0)			xcp->cp0_epc += 4;	/* skip nops */		else {			/* Update ieee754_csr. Only relevant if we have a			   h/w FPU */			ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0;			ieee754_csr.rm = ieee_rm[ctx->fcr31 & 0x3];			ieee754_csr.cx = (ctx->fcr31 >> 12) & 0x1f;			sig = cop1Emulate(xcp, ctx);		}		if (cpu_has_fpu)			break;		if (sig)			break;		cond_resched();	} while (xcp->cp0_epc > prevepc);	/* SIGILL indicates a non-fpu instruction */	if (sig == SIGILL && xcp->cp0_epc != oldepc)		/* but if epc has advanced, then ignore it */		sig = 0;	return sig;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/cd21dfcfbb5c43de54f6be795dde07397da2bc2f/cp1emu.c/buggy/arch/mips/math-emu/cp1emu.c