txd_upper |= (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8; 
txd_upper |= E1000_TXD_POPTS_TXSM << 8;  if(likely(tx_flags & E1000_TX_FLAGS_IPV4)) txd_upper |= E1000_TXD_POPTS_IXSM << 8; 
e1000_tx_queue(struct e1000_adapter *adapter, int count, int tx_flags){	struct e1000_desc_ring *tx_ring = &adapter->tx_ring;	struct e1000_tx_desc *tx_desc = NULL;	struct e1000_buffer *buffer_info;	uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;	unsigned int i;	if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |		             E1000_TXD_CMD_TSE;		txd_upper |= (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;	}	if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;		txd_upper |= E1000_TXD_POPTS_TXSM << 8;	}	if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {		txd_lower |= E1000_TXD_CMD_VLE;		txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);	}	i = tx_ring->next_to_use;	while(count--) {		buffer_info = &tx_ring->buffer_info[i];		tx_desc = E1000_TX_DESC(*tx_ring, i);		tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);		tx_desc->lower.data =			cpu_to_le32(txd_lower | buffer_info->length);		tx_desc->upper.data = cpu_to_le32(txd_upper);		if(unlikely(++i == tx_ring->count)) i = 0;	}	tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);	/* Force memory writes to complete before letting h/w	 * know there are new descriptors to fetch.  (Only	 * applicable for weak-ordered memory model archs,	 * such as IA-64). */	wmb();	tx_ring->next_to_use = i;	E1000_WRITE_REG(&adapter->hw, TDT, i);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/2d7edb923a823660b081bd4c660300ee19adca8d/e1000_main.c/clean/drivers/net/e1000/e1000_main.c