{ int has_bad_length = 0;  if (skb_first_frag_len(skb) == 1) has_bad_length = 1; else { for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) if (skb_shinfo(skb)->frags[i].size == 1) { has_bad_length = 1; break; } }  if (has_bad_length) skb_checksum_help(skb, 0); 
if (skb->ip_summed == CHECKSUM_HW) { skb = skb_padto(skb, (skb->len + PADDING_MASK) & ~PADDING_MASK); if (skb == NULL) return NETDEV_TX_OK; 
static int start_tx(struct sk_buff *skb, struct net_device *dev){	struct netdev_private *np = netdev_priv(dev);	unsigned int entry;	u32 status;	int i;	/*	 * be cautious here, wrapping the queue has weird semantics	 * and we may not have enough slots even when it seems we do.	 */	if ((np->cur_tx - np->dirty_tx) + skb_num_frags(skb) * 2 > TX_RING_SIZE) {		netif_stop_queue(dev);		return 1;	}#if defined(ZEROCOPY) && defined(HAS_BROKEN_FIRMWARE)	{		int has_bad_length = 0;		if (skb_first_frag_len(skb) == 1)			has_bad_length = 1;		else {			for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)				if (skb_shinfo(skb)->frags[i].size == 1) {					has_bad_length = 1;					break;				}		}		if (has_bad_length)			skb_checksum_help(skb, 0);	}#endif /* ZEROCOPY && HAS_BROKEN_FIRMWARE */	entry = np->cur_tx % TX_RING_SIZE;	for (i = 0; i < skb_num_frags(skb); i++) {		int wrap_ring = 0;		status = TxDescID;		if (i == 0) {			np->tx_info[entry].skb = skb;			status |= TxCRCEn;			if (entry >= TX_RING_SIZE - skb_num_frags(skb)) {				status |= TxRingWrap;				wrap_ring = 1;			}			if (np->reap_tx) {				status |= TxDescIntr;				np->reap_tx = 0;			}			if (skb->ip_summed == CHECKSUM_HW) {				status |= TxCalTCP;				np->stats.tx_compressed++;			}			status |= skb_first_frag_len(skb) | (skb_num_frags(skb) << 16);			np->tx_info[entry].mapping =				pci_map_single(np->pci_dev, skb->data, skb_first_frag_len(skb), PCI_DMA_TODEVICE);		} else {			skb_frag_t *this_frag = &skb_shinfo(skb)->frags[i - 1];			status |= this_frag->size;			np->tx_info[entry].mapping =				pci_map_single(np->pci_dev, page_address(this_frag->page) + this_frag->page_offset, this_frag->size, PCI_DMA_TODEVICE);		}		np->tx_ring[entry].addr = cpu_to_dma(np->tx_info[entry].mapping);		np->tx_ring[entry].status = cpu_to_le32(status);		if (debug > 3)			printk(KERN_DEBUG "%s: Tx #%d/#%d slot %d status %#8.8x.\n",			       dev->name, np->cur_tx, np->dirty_tx,			       entry, status);		if (wrap_ring) {			np->tx_info[entry].used_slots = TX_RING_SIZE - entry;			np->cur_tx += np->tx_info[entry].used_slots;			entry = 0;		} else {			np->tx_info[entry].used_slots = 1;			np->cur_tx += np->tx_info[entry].used_slots;			entry++;		}		/* scavenge the tx descriptors twice per TX_RING_SIZE */		if (np->cur_tx % (TX_RING_SIZE / 2) == 0)			np->reap_tx = 1;	}	/* Non-x86: explicitly flush descriptor cache lines here. */	/* Ensure all descriptors are written back before the transmit is	   initiated. - Jes */	wmb();	/* Update the producer index. */	writel(entry * (sizeof(starfire_tx_desc) / 8), np->base + TxProducerIdx);	/* 4 is arbitrary, but should be ok */	if ((np->cur_tx - np->dirty_tx) + 4 > TX_RING_SIZE)		netif_stop_queue(dev);	dev->trans_start = jiffies;	return 0;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/67974231d4354fe26aaa39a3153b5c0945b94858/starfire.c/clean/drivers/net/starfire.c