: "r" (va), 
: "r" (start), 
void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,			 unsigned long uaddr, void *kaddr,			 unsigned long len, int write){	BUG_ON(len > PAGE_SIZE);#ifdef DCACHE_ALIASING_POSSIBLE	/* If bit 13 of the kernel address we used to access the	 * user page is the same as the virtual address that page	 * is mapped to in the user's address space, we can skip the	 * D-cache flush.	 */	if ((uaddr ^ kaddr) & (1UL << 13)) {		unsigned long start = __pa(kaddr);		unsigned long end = start + len;		if (tlb_type == spitfire) {			for (; start < end; start += 32)				spitfire_put_dcache_tag(va & 0x3fe0, 0x0);		} else {			for (; start < end; start += 32)				__asm__ __volatile__(					"stxa %%g0, [%0] %1\n\t"					"membar #Sync"					: /* no outputs */					: "r" (va),					"i" (ASI_DCACHE_INVALIDATE));		}	}#endif	if (write && tlb_type == spitfire) {		unsigned long start = (unsigned long) kaddr;		unsigned long end = start + len;		for (; start < end; start += 32)			flushi(start);	}}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/6a9b490d5fd7f23c5bcd75f970e01633ad3136e3/ptrace.c/buggy/arch/sparc64/kernel/ptrace.c