if (flush_nasid_list->widget_p == NULL) return; 
void sn_dma_flush(uint64_t addr){	nasid_t nasid;	int is_tio;	int wid_num;	int i, j;	int bwin;	uint64_t flags;	struct hubdev_info *hubinfo;	volatile struct sn_flush_device_list *p;	struct sn_flush_nasid_entry *flush_nasid_list;	if (!sn_ioif_inited)		return;	nasid = NASID_GET(addr);	if (-1 == nasid_to_cnodeid(nasid))		return;	hubinfo = (NODEPDA(nasid_to_cnodeid(nasid)))->pdinfo;	if (!hubinfo) {		BUG();	}	is_tio = (nasid & 1);	if (is_tio) {		wid_num = TIO_SWIN_WIDGETNUM(addr);		bwin = TIO_BWIN_WINDOWNUM(addr);	} else {		wid_num = SWIN_WIDGETNUM(addr);		bwin = BWIN_WINDOWNUM(addr);	}	flush_nasid_list = &hubinfo->hdi_flush_nasid_list;	if (flush_nasid_list->widget_p == NULL)		return;	if (bwin > 0) {		uint64_t itte = flush_nasid_list->iio_itte[bwin];		if (is_tio) {			wid_num = (itte >> TIO_ITTE_WIDGET_SHIFT) &			    TIO_ITTE_WIDGET_MASK;		} else {			wid_num = (itte >> IIO_ITTE_WIDGET_SHIFT) &			    IIO_ITTE_WIDGET_MASK;		}	}	if (flush_nasid_list->widget_p == NULL)		return;	if (flush_nasid_list->widget_p[wid_num] == NULL)		return;	p = &flush_nasid_list->widget_p[wid_num][0];	/* find a matching BAR */	for (i = 0; i < DEV_PER_WIDGET; i++) {		for (j = 0; j < PCI_ROM_RESOURCE; j++) {			if (p->sfdl_bar_list[j].start == 0)				break;			if (addr >= p->sfdl_bar_list[j].start			    && addr <= p->sfdl_bar_list[j].end)				break;		}		if (j < PCI_ROM_RESOURCE && p->sfdl_bar_list[j].start != 0)			break;		p++;	}	/* if no matching BAR, return without doing anything. */	if (i == DEV_PER_WIDGET)		return;	/*	 * For TIOCP use the Device(x) Write Request Buffer Flush Bridge	 * register since it ensures the data has entered the coherence	 * domain, unlike PIC	 */	if (is_tio) {		uint32_t tio_id = REMOTE_HUB_L(nasid, TIO_NODE_ID);		uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id);		/* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */		if ((1 << XWIDGET_PART_REV_NUM_REV(revnum)) & PV907516) {			return;		} else {			pcireg_wrb_flush_get(p->sfdl_pcibus_info,					     (p->sfdl_slot - 1));		}	} else {		spin_lock_irqsave(&((struct sn_flush_device_list *)p)->				  sfdl_flush_lock, flags);		*p->sfdl_flush_addr = 0;		/* force an interrupt. */		*(volatile uint32_t *)(p->sfdl_force_int_addr) = 1;		/* wait for the interrupt to come back. */		while (*(p->sfdl_flush_addr) != 0x10f) ;		/* okay, everything is synched up. */		spin_unlock_irqrestore((spinlock_t *)&p->sfdl_flush_lock, flags);	}	return;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/5b53ed1f2ed6c85e2b1c39d97cc112ea32004609/pcibr_dma.c/clean/arch/ia64/sn/pci/pcibr/pcibr_dma.c