void __init intel_p6_mcheck_init(struct cpuinfo_x86 *c) 
void __devinit intel_p6_mcheck_init(struct cpuinfo_x86 *c) 
void __init intel_p6_mcheck_init(struct cpuinfo_x86 *c){	u32 l, h;	int i;		/* Check for MCE support */	if (!cpu_has(c, X86_FEATURE_MCE))		return;	/* Check for PPro style MCA */ 	if (!cpu_has(c, X86_FEATURE_MCA))		return;	/* Ok machine check is available */	machine_check_vector = intel_machine_check;	wmb();	printk (KERN_INFO "Intel machine check architecture supported.\n");	rdmsr (MSR_IA32_MCG_CAP, l, h);	if (l & (1<<8))	/* Control register present ? */		wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);	nr_mce_banks = l & 0xff;	/* Don't enable bank 0 on intel P6 cores, it goes bang quickly. */	for (i=1; i<nr_mce_banks; i++) {		wrmsr (MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);		wrmsr (MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);	}	set_in_cr4 (X86_CR4_MCE);	printk (KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n",		smp_processor_id());}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/5a72e04df5470df0ec646029d31e5528167ab1a7/p6.c/clean/arch/i386/kernel/cpu/mcheck/p6.c