np->busno = 0xf0; 
PCI_DN(np)->busno = 0xf0; 
void __init maple_pci_init(void){	struct device_node *np, *root;	struct device_node *ht = NULL;	/* Probe root PCI hosts, that is on U3 the AGP host and the	 * HyperTransport host. That one is actually "kept" around	 * and actually added last as it's resource management relies	 * on the AGP resources to have been setup first	 */	root = of_find_node_by_path("/");	if (root == NULL) {		printk(KERN_CRIT "maple_find_bridges: can't find root of device tree\n");		return;	}	for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) {		if (np->name == NULL)			continue;		if (strcmp(np->name, "pci") == 0) {			if (add_bridge(np) == 0)				of_node_get(np);		}		if (strcmp(np->name, "ht") == 0) {			of_node_get(np);			ht = np;		}	}	of_node_put(root);	/* Now setup the HyperTransport host if we found any	 */	if (ht && add_bridge(ht) != 0)		of_node_put(ht);	/* Fixup the IO resources on our host bridges as the common code	 * does it only for childs of the host bridges	 */	maple_fixup_phb_resources();	/* Setup the linkage between OF nodes and PHBs */ 	pci_devs_phb_init();	/* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We	 * assume there is no P2P bridge on the AGP bus, which should be a	 * safe assumptions hopefully.	 */	if (u3_agp) {		struct device_node *np = u3_agp->arch_data;		np->busno = 0xf0;		for (np = np->child; np; np = np->sibling)			np->busno = 0xf0;	}	/* Tell pci.c to use the common resource allocation mecanism */	pci_probe_only = 0;		/* Allow all IO */	io_page_mask = -1;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/1635317facea3094ddf34082cd86797efb1d9f7e/maple_pci.c/clean/arch/ppc64/kernel/maple_pci.c