case DAC960_GEM_Controller: DAC960_GEM_DisableInterrupts(BaseAddress); DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress); udelay(1000); while (DAC960_GEM_InitializationInProgressP(BaseAddress)) { if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus, &Parameter0, &Parameter1) && DAC960_ReportErrorStatus(Controller, ErrorStatus, Parameter0, Parameter1)) goto Failure; udelay(10); } if (!DAC960_V2_EnableMemoryMailboxInterface(Controller)) { DAC960_Error("Unable to Enable Memory Mailbox Interface " "for Controller at\n", Controller); goto Failure; } DAC960_GEM_EnableInterrupts(BaseAddress); Controller->QueueCommand = DAC960_GEM_QueueCommand; Controller->ReadControllerConfiguration = DAC960_V2_ReadControllerConfiguration; Controller->ReadDeviceConfiguration = DAC960_V2_ReadDeviceConfiguration; Controller->ReportDeviceConfiguration = DAC960_V2_ReportDeviceConfiguration; Controller->QueueReadWriteCommand = DAC960_V2_QueueReadWriteCommand; break; 
DAC960_DetectController(struct pci_dev *PCI_Device,			const struct pci_device_id *entry){  struct DAC960_privdata *privdata =	  	(struct DAC960_privdata *)entry->driver_data;  irqreturn_t (*InterruptHandler)(int, void *, struct pt_regs *) =	  	privdata->InterruptHandler;  unsigned int MemoryWindowSize = privdata->MemoryWindowSize;  DAC960_Controller_T *Controller = NULL;  unsigned char DeviceFunction = PCI_Device->devfn;  unsigned char ErrorStatus, Parameter0, Parameter1;  unsigned int IRQ_Channel;  void __iomem *BaseAddress;  int i;  Controller = (DAC960_Controller_T *)	kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);  if (Controller == NULL) {	DAC960_Error("Unable to allocate Controller structure for "                       "Controller at\n", NULL);	return NULL;  }  memset(Controller, 0, sizeof(DAC960_Controller_T));  Controller->ControllerNumber = DAC960_ControllerCount;  DAC960_Controllers[DAC960_ControllerCount++] = Controller;  Controller->Bus = PCI_Device->bus->number;  Controller->FirmwareType = privdata->FirmwareType;  Controller->HardwareType = privdata->HardwareType;  Controller->Device = DeviceFunction >> 3;  Controller->Function = DeviceFunction & 0x7;  Controller->PCIDevice = PCI_Device;  strcpy(Controller->FullModelName, "DAC960");  if (pci_enable_device(PCI_Device))	goto Failure;  switch (Controller->HardwareType)  {	case DAC960_BA_Controller:	  Controller->PCI_Address = pci_resource_start(PCI_Device, 0);	  break;	case DAC960_LP_Controller:	  Controller->PCI_Address = pci_resource_start(PCI_Device, 0);	  break;	case DAC960_LA_Controller:	  Controller->PCI_Address = pci_resource_start(PCI_Device, 0);	  break;	case DAC960_PG_Controller:	  Controller->PCI_Address = pci_resource_start(PCI_Device, 0);	  break;	case DAC960_PD_Controller:	  Controller->IO_Address = pci_resource_start(PCI_Device, 0);	  Controller->PCI_Address = pci_resource_start(PCI_Device, 1);	  break;	case DAC960_P_Controller:	  Controller->IO_Address = pci_resource_start(PCI_Device, 0);	  Controller->PCI_Address = pci_resource_start(PCI_Device, 1);	  break;  }  pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));  for (i = 0; i < DAC960_MaxLogicalDrives; i++) {	Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);	if (!Controller->disks[i])		goto Failure;	Controller->disks[i]->private_data = (void *)((long)i);  }  init_waitqueue_head(&Controller->CommandWaitQueue);  init_waitqueue_head(&Controller->HealthStatusWaitQueue);  spin_lock_init(&Controller->queue_lock);  DAC960_AnnounceDriver(Controller);  /*    Map the Controller Register Window.  */ if (MemoryWindowSize < PAGE_SIZE)	MemoryWindowSize = PAGE_SIZE;  Controller->MemoryMappedAddress =	ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);  Controller->BaseAddress =	Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);  if (Controller->MemoryMappedAddress == NULL)  {	  DAC960_Error("Unable to map Controller Register Window for "		       "Controller at\n", Controller);	  goto Failure;  }  BaseAddress = Controller->BaseAddress;  switch (Controller->HardwareType)  {	case DAC960_BA_Controller:	  DAC960_BA_DisableInterrupts(BaseAddress);	  DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);	  udelay(1000);	  while (DAC960_BA_InitializationInProgressP(BaseAddress))	    {	      if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,					    &Parameter0, &Parameter1) &&		  DAC960_ReportErrorStatus(Controller, ErrorStatus,					   Parameter0, Parameter1))		goto Failure;	      udelay(10);	    }	  if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))	    {	      DAC960_Error("Unable to Enable Memory Mailbox Interface "			   "for Controller at\n", Controller);	      goto Failure;	    }	  DAC960_BA_EnableInterrupts(BaseAddress);	  Controller->QueueCommand = DAC960_BA_QueueCommand;	  Controller->ReadControllerConfiguration =	    DAC960_V2_ReadControllerConfiguration;	  Controller->ReadDeviceConfiguration =	    DAC960_V2_ReadDeviceConfiguration;	  Controller->ReportDeviceConfiguration =	    DAC960_V2_ReportDeviceConfiguration;	  Controller->QueueReadWriteCommand =	    DAC960_V2_QueueReadWriteCommand;	  break;	case DAC960_LP_Controller:	  DAC960_LP_DisableInterrupts(BaseAddress);	  DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);	  udelay(1000);	  while (DAC960_LP_InitializationInProgressP(BaseAddress))	    {	      if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,					    &Parameter0, &Parameter1) &&		  DAC960_ReportErrorStatus(Controller, ErrorStatus,					   Parameter0, Parameter1))		goto Failure;	      udelay(10);	    }	  if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))	    {	      DAC960_Error("Unable to Enable Memory Mailbox Interface "			   "for Controller at\n", Controller);	      goto Failure;	    }	  DAC960_LP_EnableInterrupts(BaseAddress);	  Controller->QueueCommand = DAC960_LP_QueueCommand;	  Controller->ReadControllerConfiguration =	    DAC960_V2_ReadControllerConfiguration;	  Controller->ReadDeviceConfiguration =	    DAC960_V2_ReadDeviceConfiguration;	  Controller->ReportDeviceConfiguration =	    DAC960_V2_ReportDeviceConfiguration;	  Controller->QueueReadWriteCommand =	    DAC960_V2_QueueReadWriteCommand;	  break;	case DAC960_LA_Controller:	  DAC960_LA_DisableInterrupts(BaseAddress);	  DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);	  udelay(1000);	  while (DAC960_LA_InitializationInProgressP(BaseAddress))	    {	      if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,					    &Parameter0, &Parameter1) &&		  DAC960_ReportErrorStatus(Controller, ErrorStatus,					   Parameter0, Parameter1))		goto Failure;	      udelay(10);	    }	  if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))	    {	      DAC960_Error("Unable to Enable Memory Mailbox Interface "			   "for Controller at\n", Controller);	      goto Failure;	    }	  DAC960_LA_EnableInterrupts(BaseAddress);	  if (Controller->V1.DualModeMemoryMailboxInterface)	    Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;	  else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;	  Controller->ReadControllerConfiguration =	    DAC960_V1_ReadControllerConfiguration;	  Controller->ReadDeviceConfiguration =	    DAC960_V1_ReadDeviceConfiguration;	  Controller->ReportDeviceConfiguration =	    DAC960_V1_ReportDeviceConfiguration;	  Controller->QueueReadWriteCommand =	    DAC960_V1_QueueReadWriteCommand;	  break;	case DAC960_PG_Controller:	  DAC960_PG_DisableInterrupts(BaseAddress);	  DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);	  udelay(1000);	  while (DAC960_PG_InitializationInProgressP(BaseAddress))	    {	      if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,					    &Parameter0, &Parameter1) &&		  DAC960_ReportErrorStatus(Controller, ErrorStatus,					   Parameter0, Parameter1))		goto Failure;	      udelay(10);	    }	  if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))	    {	      DAC960_Error("Unable to Enable Memory Mailbox Interface "			   "for Controller at\n", Controller);	      goto Failure;	    }	  DAC960_PG_EnableInterrupts(BaseAddress);	  if (Controller->V1.DualModeMemoryMailboxInterface)	    Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;	  else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;	  Controller->ReadControllerConfiguration =	    DAC960_V1_ReadControllerConfiguration;	  Controller->ReadDeviceConfiguration =	    DAC960_V1_ReadDeviceConfiguration;	  Controller->ReportDeviceConfiguration =	    DAC960_V1_ReportDeviceConfiguration;	  Controller->QueueReadWriteCommand =	    DAC960_V1_QueueReadWriteCommand;	  break;	case DAC960_PD_Controller:	  if (!request_region(Controller->IO_Address, 0x80,			      Controller->FullModelName)) {		DAC960_Error("IO port 0x%d busy for Controller at\n",			     Controller, Controller->IO_Address);		goto Failure;	  }	  DAC960_PD_DisableInterrupts(BaseAddress);	  DAC960_PD_AcknowledgeStatus(BaseAddress);	  udelay(1000);	  while (DAC960_PD_InitializationInProgressP(BaseAddress))	    {	      if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,					    &Parameter0, &Parameter1) &&		  DAC960_ReportErrorStatus(Controller, ErrorStatus,					   Parameter0, Parameter1))		goto Failure;	      udelay(10);	    }	  if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))	    {	      DAC960_Error("Unable to allocate DMA mapped memory "			   "for Controller at\n", Controller);	      goto Failure;	    }	  DAC960_PD_EnableInterrupts(BaseAddress);	  Controller->QueueCommand = DAC960_PD_QueueCommand;	  Controller->ReadControllerConfiguration =	    DAC960_V1_ReadControllerConfiguration;	  Controller->ReadDeviceConfiguration =	    DAC960_V1_ReadDeviceConfiguration;	  Controller->ReportDeviceConfiguration =	    DAC960_V1_ReportDeviceConfiguration;	  Controller->QueueReadWriteCommand =	    DAC960_V1_QueueReadWriteCommand;	  break;	case DAC960_P_Controller:	  if (!request_region(Controller->IO_Address, 0x80,			      Controller->FullModelName)){		DAC960_Error("IO port 0x%d busy for Controller at\n",		   	     Controller, Controller->IO_Address);		goto Failure;	  }	  DAC960_PD_DisableInterrupts(BaseAddress);	  DAC960_PD_AcknowledgeStatus(BaseAddress);	  udelay(1000);	  while (DAC960_PD_InitializationInProgressP(BaseAddress))	    {	      if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,					    &Parameter0, &Parameter1) &&		  DAC960_ReportErrorStatus(Controller, ErrorStatus,					   Parameter0, Parameter1))		goto Failure;	      udelay(10);	    }	  if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))	    {	      DAC960_Error("Unable to allocate DMA mapped memory"			   "for Controller at\n", Controller);	      goto Failure;	    }	  DAC960_PD_EnableInterrupts(BaseAddress);	  Controller->QueueCommand = DAC960_P_QueueCommand;	  Controller->ReadControllerConfiguration =	    DAC960_V1_ReadControllerConfiguration;	  Controller->ReadDeviceConfiguration =	    DAC960_V1_ReadDeviceConfiguration;	  Controller->ReportDeviceConfiguration =	    DAC960_V1_ReportDeviceConfiguration;	  Controller->QueueReadWriteCommand =	    DAC960_V1_QueueReadWriteCommand;	  break;  }  /*     Acquire shared access to the IRQ Channel.  */  IRQ_Channel = PCI_Device->irq;  if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ,		      Controller->FullModelName, Controller) < 0)  {	DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",		       Controller, Controller->IRQ_Channel);	goto Failure;  }  Controller->IRQ_Channel = IRQ_Channel;  Controller->InitialCommand.CommandIdentifier = 1;  Controller->InitialCommand.Controller = Controller;  Controller->Commands[0] = &Controller->InitialCommand;  Controller->FreeCommands = &Controller->InitialCommand;  return Controller;      Failure:  if (Controller->IO_Address == 0)	DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "		     "PCI Address 0x%X\n", Controller,		     Controller->Bus, Controller->Device,		     Controller->Function, Controller->PCI_Address);  else	DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "			"0x%X PCI Address 0x%X\n", Controller,			Controller->Bus, Controller->Device,			Controller->Function, Controller->IO_Address,			Controller->PCI_Address);  DAC960_DetectCleanup(Controller);  DAC960_ControllerCount--;  return NULL;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/5b76ffd5d9f12ba850fc988188f55056204ad4e2/DAC960.c/buggy/drivers/block/DAC960.c