c->x86_num_cores = num_cpu_cores(c); 
c->x86_max_cores = num_cpu_cores(c); 
static void __devinit init_intel(struct cpuinfo_x86 *c){	unsigned int l2 = 0;	char *p = NULL;#ifdef CONFIG_X86_F00F_BUG	/*	 * All current models of Pentium and Pentium with MMX technology CPUs	 * have the F0 0F bug, which lets nonprivileged users lock up the system.	 * Note that the workaround only should be initialized once...	 */	c->f00f_bug = 0;	if ( c->x86 == 5 ) {		static int f00f_workaround_enabled = 0;		c->f00f_bug = 1;		if ( !f00f_workaround_enabled ) {			trap_init_f00f_bug();			printk(KERN_NOTICE "Intel Pentium with F0 0F bug - workaround enabled.\n");			f00f_workaround_enabled = 1;		}	}#endif	select_idle_routine(c);	l2 = init_intel_cacheinfo(c);	/* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3 mask 3 */	if ((c->x86<<8 | c->x86_model<<4 | c->x86_mask) < 0x633)		clear_bit(X86_FEATURE_SEP, c->x86_capability);	/* Names for the Pentium II/Celeron processors 	   detectable only by also checking the cache size.	   Dixon is NOT a Celeron. */	if (c->x86 == 6) {		switch (c->x86_model) {		case 5:			if (c->x86_mask == 0) {				if (l2 == 0)					p = "Celeron (Covington)";				else if (l2 == 256)					p = "Mobile Pentium II (Dixon)";			}			break;					case 6:			if (l2 == 128)				p = "Celeron (Mendocino)";			else if (c->x86_mask == 0 || c->x86_mask == 5)				p = "Celeron-A";			break;					case 8:			if (l2 == 128)				p = "Celeron (Coppermine)";			break;		}	}	if ( p )		strcpy(c->x86_model_id, p);		c->x86_num_cores = num_cpu_cores(c);	detect_ht(c);	/* Work around errata */	Intel_errata_workarounds(c);#ifdef CONFIG_X86_INTEL_USERCOPY	/*	 * Set up the preferred alignment for movsl bulk memory moves	 */	switch (c->x86) {	case 4:		/* 486: untested */		break;	case 5:		/* Old Pentia: untested */		break;	case 6:		/* PII/PIII only like movsl with 8-byte alignment */		movsl_mask.mask = 7;		break;	case 15:	/* P4 is OK down to 8-byte alignment */		movsl_mask.mask = 7;		break;	}#endif	if (c->x86 == 15) 		set_bit(X86_FEATURE_P4, c->x86_capability);	if (c->x86 == 6) 		set_bit(X86_FEATURE_P3, c->x86_capability);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/94605eff572b727aaad9b4b29bc358b919096503/intel.c/clean/arch/i386/kernel/cpu/intel.c