void __init intel_p5_mcheck_init(struct cpuinfo_x86 *c) 
void __devinit intel_p5_mcheck_init(struct cpuinfo_x86 *c) 
void __init intel_p5_mcheck_init(struct cpuinfo_x86 *c){	u32 l, h;		/*Check for MCE support */	if( !cpu_has(c, X86_FEATURE_MCE) )		return;		/* Default P5 to off as its often misconnected */	if(mce_disabled != -1)		return;	machine_check_vector = pentium_machine_check;	wmb();	/* Read registers before enabling */	rdmsr(MSR_IA32_P5_MC_ADDR, l, h);	rdmsr(MSR_IA32_P5_MC_TYPE, l, h);	printk(KERN_INFO "Intel old style machine check architecture supported.\n"); 	/* Enable MCE */	set_in_cr4(X86_CR4_MCE);	printk(KERN_INFO "Intel old style machine check reporting enabled on CPU#%d.\n", smp_processor_id());}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/0bb3184df537002a742bafddf3f4fb482b7fe610/p5.c/clean/arch/i386/kernel/cpu/mcheck/p5.c