large = pte_huge(batch->pte[i]); 
static void native_flush_hash_range(unsigned long context,				    unsigned long number, int local){	unsigned long vsid, vpn, va, hash, secondary, slot, flags, avpn;	int i, j;	hpte_t *hptep;	unsigned long hpte_v;	struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);	/* XXX fix for large ptes */	unsigned long large = 0;	local_irq_save(flags);	j = 0;	for (i = 0; i < number; i++) {		if (batch->addr[i] < KERNELBASE)			vsid = get_vsid(context, batch->addr[i]);		else			vsid = get_kernel_vsid(batch->addr[i]);		va = (vsid << 28) | (batch->addr[i] & 0x0fffffff);		batch->vaddr[j] = va;		if (large)			vpn = va >> HPAGE_SHIFT;		else			vpn = va >> PAGE_SHIFT;		hash = hpt_hash(vpn, large);		secondary = (pte_val(batch->pte[i]) & _PAGE_SECONDARY) >> 15;		if (secondary)			hash = ~hash;		slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;		slot += (pte_val(batch->pte[i]) & _PAGE_GROUP_IX) >> 12;		hptep = htab_address + slot;		avpn = va >> 23;		if (large)			avpn &= ~0x1UL;		native_lock_hpte(hptep);		hpte_v = hptep->v;		/* Even if we miss, we need to invalidate the TLB */		if ((HPTE_V_AVPN_VAL(hpte_v) != avpn)		    || !(hpte_v & HPTE_V_VALID)) {			native_unlock_hpte(hptep);		} else {			/* Invalidate the hpte. NOTE: this also unlocks it */			hptep->v = 0;		}		j++;	}	if (cpu_has_feature(CPU_FTR_TLBIEL) && !large && local) {		asm volatile("ptesync":::"memory");		for (i = 0; i < j; i++)			__tlbiel(batch->vaddr[i]);		asm volatile("ptesync":::"memory");	} else {		int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);		if (lock_tlbie)			spin_lock(&native_tlbie_lock);		asm volatile("ptesync":::"memory");		for (i = 0; i < j; i++)			__tlbie(batch->vaddr[i], 0);		asm volatile("eieio; tlbsync; ptesync":::"memory");		if (lock_tlbie)			spin_unlock(&native_tlbie_lock);	}	local_irq_restore(flags);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/67b108131df1230bad20a7279a8897de123d690b/hash_native.c/clean/arch/ppc64/mm/hash_native.c