if(is_372n) 
if(info->flags & IS_372N) 
static void __devinit init_hwif_hpt366(ide_hwif_t *hwif){	struct pci_dev *dev		= hwif->pci_dev;	u8 ata66 = 0, regmask		= (hwif->channel) ? 0x01 : 0x02;	u8 did, rid;	unsigned long dmabase		= hwif->dma_base;	int is_372n = 0;		if(dmabase)	{		did = inb(dmabase + 0x22);		rid = inb(dmabase + 0x28);			if((did == 4 && rid == 6) || (did == 5 && rid > 1))			is_372n = 1;	}			hwif->tuneproc			= &hpt3xx_tune_drive;	hwif->speedproc			= &hpt3xx_tune_chipset;	hwif->quirkproc			= &hpt3xx_quirkproc;	hwif->intrproc			= &hpt3xx_intrproc;	hwif->maskproc			= &hpt3xx_maskproc;		if(is_372n)		hwif->rw_disk = &hpt372n_rw_disk;	/*	 * The HPT37x uses the CBLID pins as outputs for MA15/MA16	 * address lines to access an external eeprom.  To read valid	 * cable detect state the pins must be enabled as inputs.	 */	if (hpt_minimum_revision(dev, 8) && PCI_FUNC(dev->devfn) & 1) {		/*		 * HPT374 PCI function 1		 * - set bit 15 of reg 0x52 to enable TCBLID as input		 * - set bit 15 of reg 0x56 to enable FCBLID as input		 */		u16 mcr3, mcr6;		pci_read_config_word(dev, 0x52, &mcr3);		pci_read_config_word(dev, 0x56, &mcr6);		pci_write_config_word(dev, 0x52, mcr3 | 0x8000);		pci_write_config_word(dev, 0x56, mcr6 | 0x8000);		/* now read cable id register */		pci_read_config_byte(dev, 0x5a, &ata66);		pci_write_config_word(dev, 0x52, mcr3);		pci_write_config_word(dev, 0x56, mcr6);	} else if (hpt_minimum_revision(dev, 3)) {		/*		 * HPT370/372 and 374 pcifn 0		 * - clear bit 0 of 0x5b to enable P/SCBLID as inputs		 */		u8 scr2;		pci_read_config_byte(dev, 0x5b, &scr2);		pci_write_config_byte(dev, 0x5b, scr2 & ~1);		/* now read cable id register */		pci_read_config_byte(dev, 0x5a, &ata66);		pci_write_config_byte(dev, 0x5b, scr2);	} else {		pci_read_config_byte(dev, 0x5a, &ata66);	}#ifdef DEBUG	printk("HPT366: reg5ah=0x%02x ATA-%s Cable Port%d\n",		ata66, (ata66 & regmask) ? "33" : "66",		PCI_FUNC(hwif->pci_dev->devfn));#endif /* DEBUG */#ifdef HPT_SERIALIZE_IO	/* serialize access to this device */	if (hwif->mate)		hwif->serialized = hwif->mate->serialized = 1;#endif	if (hpt_minimum_revision(dev,3)) {		u8 reg5ah = 0;			pci_write_config_byte(dev, 0x5a, reg5ah & ~0x10);		/*		 * set up ioctl for power status.		 * note: power affects both		 * drives on each channel		 */		hwif->resetproc	= &hpt3xx_reset;		hwif->busproc	= &hpt370_busproc;//		hwif->drives[0].autotune = hwif->drives[1].autotune = 1;	} else if (hpt_minimum_revision(dev,2)) {		hwif->resetproc	= &hpt3xx_reset;		hwif->busproc	= &hpt3xx_tristate;	} else {		hwif->resetproc = &hpt3xx_reset;		hwif->busproc   = &hpt3xx_tristate;	}	if (!hwif->dma_base) {		hwif->drives[0].autotune = 1;		hwif->drives[1].autotune = 1;		return;	}	hwif->ultra_mask = 0x7f;	hwif->mwdma_mask = 0x07;	if (!(hwif->udma_four))		hwif->udma_four = ((ata66 & regmask) ? 0 : 1);	hwif->ide_dma_check = &hpt366_config_drive_xfer_rate;	if (hpt_minimum_revision(dev,8)) {		hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;		hwif->ide_dma_end = &hpt374_ide_dma_end;	} else if (hpt_minimum_revision(dev,5)) {		hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;		hwif->ide_dma_end = &hpt374_ide_dma_end;	} else if (hpt_minimum_revision(dev,3)) {		hwif->dma_start = &hpt370_ide_dma_start;		hwif->ide_dma_end = &hpt370_ide_dma_end;		hwif->ide_dma_timeout = &hpt370_ide_dma_timeout;		hwif->ide_dma_lostirq = &hpt370_ide_dma_lostirq;	} else if (hpt_minimum_revision(dev,2))		hwif->ide_dma_lostirq = &hpt366_ide_dma_lostirq;	else		hwif->ide_dma_lostirq = &hpt366_ide_dma_lostirq;	if (!noautodma)		hwif->autodma = 1;	hwif->drives[0].autodma = hwif->autodma;	hwif->drives[1].autodma = hwif->autodma;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/b39b01ffb75e14ed76510e4229ffb575007df0fb/hpt366.c/buggy/drivers/ide/pci/hpt366.c