per_cpu(cpu_state, cpuid) = CPU_ONLINE; 
smp_callin (void){	int cpuid, phys_id;	extern void ia64_init_itm(void);#ifdef CONFIG_PERFMON	extern void pfm_init_percpu(void);#endif	cpuid = smp_processor_id();	phys_id = hard_smp_processor_id();	if (cpu_online(cpuid)) {		printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",		       phys_id, cpuid);		BUG();	}	lock_ipi_calllock();	cpu_set(cpuid, cpu_online_map);	unlock_ipi_calllock();	smp_setup_percpu_timer();	ia64_mca_cmc_vector_setup();	/* Setup vector on AP */#ifdef CONFIG_PERFMON	pfm_init_percpu();#endif	local_irq_enable();	if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {		/*		 * Synchronize the ITC with the BP.  Need to do this after irqs are		 * enabled because ia64_sync_itc() calls smp_call_function_single(), which		 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls		 * local_bh_enable(), which bugs out if irqs are not enabled...		 */		Dprintk("Going to syncup ITC with BP.\n");		ia64_sync_itc(0);	}	/*	 * Get our bogomips.	 */	ia64_init_itm();	calibrate_delay();	local_cpu_data->loops_per_jiffy = loops_per_jiffy;#ifdef CONFIG_IA32_SUPPORT	ia32_gdt_init();#endif	/*	 * Allow the master to continue.	 */	cpu_set(cpuid, cpu_callin_map);	Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/a9fa06c26f7b7914c8cdf4d309b74df3151cc227/smpboot.c/clean/arch/ia64/kernel/smpboot.c