__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx"); 
/* see notes above for revision 1.07.  Apparent chip bug */ serialize_cpu();  
static void do_update_one (void * unused){	unsigned long flags;	unsigned int val[2];	int cpu_num = smp_processor_id();	struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;	if (uci->mc == NULL) {		printk(KERN_INFO "microcode: No new microcode data for CPU%d\n", cpu_num);		return;	}	/* serialize access to the physical write to MSR 0x79 */	spin_lock_irqsave(&microcode_update_lock, flags);          	/* write microcode via MSR 0x79 */	wrmsr(MSR_IA32_UCODE_WRITE,		(unsigned long) uci->mc->bits, 		(unsigned long) uci->mc->bits >> 16 >> 16);	wrmsr(MSR_IA32_UCODE_REV, 0, 0);	__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");	/* get the current revision from MSR 0x8B */	rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);	/* notify the caller of success on this cpu */	uci->err = MC_SUCCESS;	spin_unlock_irqrestore(&microcode_update_lock, flags);	printk(KERN_INFO "microcode: CPU%d updated from revision "	       "0x%x to 0x%x, date = %08x \n", 	       cpu_num, uci->rev, val[1], uci->mc->hdr.date);	return;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/245067d1674d451855692fcd4647daf9fd47f82d/microcode.c/clean/arch/i386/kernel/microcode.c