asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs)); asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs)); asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss)); 
loadsegment(es, ctxt->es); loadsegment(fs, ctxt->fs); loadsegment(gs, ctxt->gs); loadsegment(ss, ctxt->ss); 
void __restore_processor_state(struct saved_context *ctxt){	/*	 * control registers	 */	write_cr4(ctxt->cr4);	write_cr3(ctxt->cr3);	write_cr2(ctxt->cr2);	write_cr2(ctxt->cr0);	/*	 * now restore the descriptor tables to their proper values	 * ltr is done i fix_processor_context().	 */	asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));	asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));	/*	 * segment registers	 */	asm volatile ("movw %0, %%es" :: "r" (ctxt->es));	asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));	asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs));	asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));	/*	 * sysenter MSRs	 */	if (boot_cpu_has(X86_FEATURE_SEP))		enable_sep_cpu();	fix_processor_context();	do_fpu_end();	mtrr_ap_init();}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/4d37e7e3fd851428dede4d05d3e69d03795a744a/cpu.c/clean/arch/i386/power/cpu.c