s5h1420_setinversion(state, p); s5h1420_setfec(state, p); 
s5h1420_setfec_inversion(state, p); 
static int s5h1420_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p){	struct s5h1420_state* state = fe->demodulator_priv;	u32 frequency_delta;	struct dvb_frontend_tune_settings fesettings;	/* check if we should do a fast-tune */	memcpy(&fesettings.parameters, p, sizeof(struct dvb_frontend_parameters));	s5h1420_get_tune_settings(fe, &fesettings);	frequency_delta = p->frequency - state->tunedfreq;	if ((frequency_delta > -fesettings.max_drift) && (frequency_delta < fesettings.max_drift) &&	    (frequency_delta != 0) &&	    (state->fec_inner == p->u.qpsk.fec_inner) &&	    (state->symbol_rate == p->u.qpsk.symbol_rate)) {		s5h1420_setfreqoffset(state, frequency_delta);		return 0;	}	/* first of all, software reset */	s5h1420_reset(state);	/* set tuner PLL */	if (state->config->pll_set) {		s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) | 1);		state->config->pll_set(fe, p, &state->tunedfreq);		s5h1420_writereg (state, 0x02, s5h1420_readreg(state,0x02) & 0xfe);	}	/* set s5h1420 fclk PLL according to desired symbol rate */	if (p->u.qpsk.symbol_rate > 28000000) {		state->fclk = 88000000;		s5h1420_writereg(state, 0x03, 0x50);		s5h1420_writereg(state, 0x04, 0x40);		s5h1420_writereg(state, 0x05, 0xae);	} else if (p->u.qpsk.symbol_rate > 21000000) {		state->fclk = 59000000;		s5h1420_writereg(state, 0x03, 0x33);		s5h1420_writereg(state, 0x04, 0x40);		s5h1420_writereg(state, 0x05, 0xae);	} else {		state->fclk = 88000000;		s5h1420_writereg(state, 0x03, 0x50);		s5h1420_writereg(state, 0x04, 0x40);		s5h1420_writereg(state, 0x05, 0xac);	}	/* set misc registers */	s5h1420_writereg(state, 0x02, 0x00);	s5h1420_writereg(state, 0x07, 0xb0);	s5h1420_writereg(state, 0x0a, 0x67);	s5h1420_writereg(state, 0x0b, 0x78);	s5h1420_writereg(state, 0x0c, 0x48);	s5h1420_writereg(state, 0x0d, 0x6b);	s5h1420_writereg(state, 0x2e, 0x8e);	s5h1420_writereg(state, 0x35, 0x33);	s5h1420_writereg(state, 0x38, 0x01);	s5h1420_writereg(state, 0x39, 0x7d);	s5h1420_writereg(state, 0x3a, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32));	s5h1420_writereg(state, 0x3c, 0x00);	s5h1420_writereg(state, 0x45, 0x61);	s5h1420_writereg(state, 0x46, 0x1d);	/* start QPSK */	s5h1420_writereg(state, 0x05, s5h1420_readreg(state, 0x05) | 1);	/* set the frequency offset to adjust for PLL inaccuracy */	s5h1420_setfreqoffset(state, p->frequency - state->tunedfreq);	/* set the reset of the parameters */	s5h1420_setsymbolrate(state, p);	s5h1420_setinversion(state, p);	s5h1420_setfec(state, p);	state->fec_inner = p->u.qpsk.fec_inner;	state->symbol_rate = p->u.qpsk.symbol_rate;	state->postlocked = 0;	return 0;}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/a9d6a80b41c04e8ff4c7442cc35f5df610863841/s5h1420.c/buggy/drivers/media/dvb/frontends/s5h1420.c