kfree(mailbox); 
static int __devinit mthca_create_eq(struct mthca_dev *dev,				     int nent,				     u8 intr,				     struct mthca_eq *eq){	int npages = (nent * MTHCA_EQ_ENTRY_SIZE + PAGE_SIZE - 1) /		PAGE_SIZE;	u64 *dma_list = NULL;	dma_addr_t t;	void *mailbox = NULL;	struct mthca_eq_context *eq_context;	int err = -ENOMEM;	int i;	u8 status;	/* Make sure EQ size is aligned to a power of 2 size. */	for (i = 1; i < nent; i <<= 1)		; /* nothing */	nent = i;	eq->dev = dev;	eq->page_list = kmalloc(npages * sizeof *eq->page_list,				GFP_KERNEL);	if (!eq->page_list)		goto err_out;	for (i = 0; i < npages; ++i)		eq->page_list[i].buf = NULL;	dma_list = kmalloc(npages * sizeof *dma_list, GFP_KERNEL);	if (!dma_list)		goto err_out_free;	mailbox = kmalloc(sizeof *eq_context + MTHCA_CMD_MAILBOX_EXTRA,			  GFP_KERNEL);	if (!mailbox)		goto err_out_free;	eq_context = MAILBOX_ALIGN(mailbox);	for (i = 0; i < npages; ++i) {		eq->page_list[i].buf = dma_alloc_coherent(&dev->pdev->dev,							  PAGE_SIZE, &t, GFP_KERNEL);		if (!eq->page_list[i].buf)			goto err_out_free;		dma_list[i] = t;		pci_unmap_addr_set(&eq->page_list[i], mapping, t);		memset(eq->page_list[i].buf, 0, PAGE_SIZE);	}	for (i = 0; i < nent; ++i)		set_eqe_hw(get_eqe(eq, i));	eq->eqn = mthca_alloc(&dev->eq_table.alloc);	if (eq->eqn == -1)		goto err_out_free;	err = mthca_mr_alloc_phys(dev, dev->driver_pd.pd_num,				  dma_list, PAGE_SHIFT, npages,				  0, npages * PAGE_SIZE,				  MTHCA_MPT_FLAG_LOCAL_WRITE |				  MTHCA_MPT_FLAG_LOCAL_READ,				  &eq->mr);	if (err)		goto err_out_free_eq;	eq->nent = nent;	memset(eq_context, 0, sizeof *eq_context);	eq_context->flags           = cpu_to_be32(MTHCA_EQ_STATUS_OK   |						  MTHCA_EQ_OWNER_HW    |						  MTHCA_EQ_STATE_ARMED |						  MTHCA_EQ_FLAG_TR);	if (mthca_is_memfree(dev))		eq_context->flags  |= cpu_to_be32(MTHCA_EQ_STATE_ARBEL);	eq_context->logsize_usrpage = cpu_to_be32((ffs(nent) - 1) << 24);	if (mthca_is_memfree(dev)) {		eq_context->arbel_pd = cpu_to_be32(dev->driver_pd.pd_num);	} else {		eq_context->logsize_usrpage |= cpu_to_be32(dev->driver_uar.index);		eq_context->tavor_pd         = cpu_to_be32(dev->driver_pd.pd_num);	}	eq_context->intr            = intr;	eq_context->lkey            = cpu_to_be32(eq->mr.ibmr.lkey);	err = mthca_SW2HW_EQ(dev, eq_context, eq->eqn, &status);	if (err) {		mthca_warn(dev, "SW2HW_EQ failed (%d)\n", err);		goto err_out_free_mr;	}	if (status) {		mthca_warn(dev, "SW2HW_EQ returned status 0x%02x\n",			   status);		err = -EINVAL;		goto err_out_free_mr;	}	kfree(dma_list);	kfree(mailbox);	eq->eqn_mask   = swab32(1 << eq->eqn);	eq->cons_index = 0;	dev->eq_table.arm_mask |= eq->eqn_mask;	mthca_dbg(dev, "Allocated EQ %d with %d entries\n",		  eq->eqn, nent);	return err; err_out_free_mr:	mthca_free_mr(dev, &eq->mr); err_out_free_eq:	mthca_free(&dev->eq_table.alloc, eq->eqn); err_out_free:	for (i = 0; i < npages; ++i)		if (eq->page_list[i].buf)			dma_free_coherent(&dev->pdev->dev, PAGE_SIZE,					  eq->page_list[i].buf,					  pci_unmap_addr(&eq->page_list[i],							 mapping));	kfree(eq->page_list);	kfree(dma_list);	kfree(mailbox); err_out:	return err;}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/ed878458eeff9754d66f1b0325df6ebbfcdce668/mthca_eq.c/buggy/drivers/infiniband/hw/mthca/mthca_eq.c