switch(id1) { 
switch (id1) { 
static void bcom_phy_init(struct skge_port *skge, int jumbo){	struct skge_hw *hw = skge->hw;	int port = skge->port;	int i;	u16 id1, r, ext, ctl;	/* magic workaround patterns for Broadcom */	static const struct {		u16 reg;		u16 val;	} A1hack[] = {		{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 },		{ 0x17, 0x0013 }, { 0x15, 0x0404 }, { 0x17, 0x8006 },		{ 0x15, 0x0132 }, { 0x17, 0x8006 }, { 0x15, 0x0232 },		{ 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 },	}, C0hack[] = {		{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 },		{ 0x17, 0x0013 }, { 0x15, 0x0A04 }, { 0x18, 0x0420 },	};	pr_debug("bcom_phy_init\n");	/* read Id from external PHY (all have the same address) */	id1 = xm_phy_read(hw, port, PHY_XMAC_ID1);	/* Optimize MDIO transfer by suppressing preamble. */	r = xm_read16(hw, port, XM_MMU_CMD);	r |=  XM_MMU_NO_PRE;	xm_write16(hw, port, XM_MMU_CMD,r);	switch(id1) {	case PHY_BCOM_ID1_C0:		/*		 * Workaround BCOM Errata for the C0 type.		 * Write magic patterns to reserved registers.		 */		for (i = 0; i < ARRAY_SIZE(C0hack); i++)			xm_phy_write(hw, port,				     C0hack[i].reg, C0hack[i].val);		break;	case PHY_BCOM_ID1_A1:		/*		 * Workaround BCOM Errata for the A1 type.		 * Write magic patterns to reserved registers.		 */		for (i = 0; i < ARRAY_SIZE(A1hack); i++)			xm_phy_write(hw, port,				     A1hack[i].reg, A1hack[i].val);		break;	}	/*	 * Workaround BCOM Errata (#10523) for all BCom PHYs.	 * Disable Power Management after reset.	 */	r = xm_phy_read(hw, port, PHY_BCOM_AUX_CTRL);	r |= PHY_B_AC_DIS_PM;	xm_phy_write(hw, port, PHY_BCOM_AUX_CTRL, r);	/* Dummy read */	xm_read16(hw, port, XM_ISRC);	ext = PHY_B_PEC_EN_LTR; /* enable tx led */	ctl = PHY_CT_SP1000;	/* always 1000mbit */	if (skge->autoneg == AUTONEG_ENABLE) {		/*		 * Workaround BCOM Errata #1 for the C5 type.		 * 1000Base-T Link Acquisition Failure in Slave Mode		 * Set Repeater/DTE bit 10 of the 1000Base-T Control Register		 */		u16 adv = PHY_B_1000C_RD;		if (skge->advertising & ADVERTISED_1000baseT_Half)			adv |= PHY_B_1000C_AHD;		if (skge->advertising & ADVERTISED_1000baseT_Full)			adv |= PHY_B_1000C_AFD;		xm_phy_write(hw, port, PHY_BCOM_1000T_CTRL, adv);		ctl |= PHY_CT_ANE | PHY_CT_RE_CFG;	} else {		if (skge->duplex == DUPLEX_FULL)			ctl |= PHY_CT_DUP_MD;		/* Force to slave */		xm_phy_write(hw, port, PHY_BCOM_1000T_CTRL, PHY_B_1000C_MSE);	}	/* Set autonegotiation pause parameters */	xm_phy_write(hw, port, PHY_BCOM_AUNE_ADV,		     phy_pause_map[skge->flow_control] | PHY_AN_CSMA);	/* Handle Jumbo frames */	if (jumbo) {		xm_phy_write(hw, port, PHY_BCOM_AUX_CTRL,			     PHY_B_AC_TX_TST | PHY_B_AC_LONG_PACK);		ext |= PHY_B_PEC_HIGH_LA;	}	xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, ext);	xm_phy_write(hw, port, PHY_BCOM_CTRL, ctl);	/* Use link status change interrrupt */	xm_phy_write(hw, port, PHY_BCOM_INT_MASK, PHY_B_DEF_MSK);	bcom_check_link(hw, port);}
4520	/local/tlutelli/issta_data/temp/c/2005_temp/2005/4520/2c66851460c9438823e39b76887376d1511fb67c/skge.c/buggy/drivers/net/skge.c