 spin_unlock_irqrestore(&tp->lock, flags);  
out: 
static irqreturn_t tg3_msi(int irq, void *dev_id, struct pt_regs *regs){	struct net_device *dev = dev_id;	struct tg3 *tp = netdev_priv(dev);	struct tg3_hw_status *sblk = tp->hw_status;	unsigned long flags;	spin_lock_irqsave(&tp->lock, flags);	/*	 * Writing any value to intr-mbox-0 clears PCI INTA# and	 * chip-internal interrupt pending events.	 * Writing non-zero to intr-mbox-0 additional tells the	 * NIC to stop sending us irqs, engaging "in-intr-handler"	 * event coalescing.	 */	tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001);	tp->last_tag = sblk->status_tag;	rmb();	sblk->status &= ~SD_STATUS_UPDATED;	if (likely(tg3_has_work(tp)))		netif_rx_schedule(dev);		/* schedule NAPI poll */	else {		/* No work, re-enable interrupts.  */		tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,			     tp->last_tag << 24);	}	spin_unlock_irqrestore(&tp->lock, flags);	return IRQ_RETVAL(1);}
10457	/local/tlutelli/issta_data/temp/c/2005_temp/2005/10457/f47c11eeccc8820010992eb32dbe7370a08f8bd3/tg3.c/buggy/drivers/net/tg3.c