What is Bit-level parallelism?
'''Bit-level parallelism''' is a form of [[parallel computing]] based on increasing [[processor]] [[Word (computing)|word size]], depending on [[very-large-scale integration]] (VLSI) [[technology]]. Enhancements in computers [[design]]s were done by increasing bit-level parallelism<ref>David E. Culler, Jaswinder Pal Singh, Anoop Gupta. Parallel Computer Architecture - A Hardware/Software Approach. Morgan Kaufmann Publishers, 1999. {{ISBN|1558603433}}, pg 15</ref> Increasing the word size reduces the number of instructions the processor must execute in order to perform an [[operation]] on variables whose sizes are greater than the length of the word. (For example, consider a case where an [[Bit|8-bit]] processor must add two [[Bit|16-bit]] [[integer]]s. The processor must first add the 8 lower-order bits from each integer, then add the 8 higher-order bits, requiring two instructions to complete a single operation. A 16-bit processor would be able to complete the operation with single instruction) Historically, [[Bit|4-bit]] microprocessors were replaced with [[8-bit]], then [[Bit|16-bit]], then [[Bit|32-bit]] microprocessors, then [[Bit|64-bit]] microprocessors. 32-bit processors has been a standard in general purpose computing for about 20 [[year]]s, but now 64-bit [[processor]]s are taking the lead. ==References== <references/> {{tech-stub}} [[Category:Computer science]]