What is Field-programmable gate array?
[[File:Altera-StratixIIGX-FPGA.jpg|thumb]] A '''field-programmable gate array''' (often shortened to '''FPGA''') is an [[electronic component]] used to build reconfigurable digital circuits. That means that an FPGA is different from a [[logic gate]], because a logic gate has a fixed function. In contrast an FPGA has an undefined function at the time of manufacture. Before the FPGA can be used in a circuit it must be programmed, that is, reconfigured. FPGAs are integrated circuits in the category of [[programmable logic devices]] or PLDs. FPGAs are the highest performance, most flexible and also the most expensive of the PLD types. A drawback of FPGAs compared to other PLDs is that they do not remember their design when the power is removed. An FPGA therefore needs a separate configuration memory chip that holds the FPGA design. When the power is given back to the FPGA a fixed part of the FPGA reads the configuration from the configuration memory chip. After the FPGA is configured it will be able to do the function it was given by the design. An FPGA is different from a microprocessor or microcontroller. An FPGA in its basic form is not able to run software. Only when the FPGA is given a configuration that contains a processor-architecture it has the ability to run software. FPGA manufacturers provide engineering software for Windows and sometimes also Linux, to develop designs for FPGAs. The design is commonly written in human readable computer files called a ''hardware description language'' (HDL). The most popular hardware description languages are VHDL and Verilog. Hardware description languages are strongly comparable to programming languages. But the intention of HDLs is to design digital logic circuits while programming languages design software. The FPGA engineering software has to translate the abstract HDL code into the logic elements available in the selected FPGA. That is called logic synthesis. Then a process of place and route is done to position the logic elements in the FPGA. The result is a bi