Why does the iMac not allow memory parity error checking? Based on this Apple support page, the iMacs (in particular the 2014 5K I just ordered) do not support parity checking on the memory.  From other articles, it appears ECC is not supported either.

I find this surprising.  If there is a memory error, then the computer just goes along its merry way, propagating the error until it happens to cause some other detectable exception (like accessing an invalid memory address or running an invalid instruction).  Though it might not, and simply result in incorrect or corrupted data.

I often do large numerical simulations, for which such an error would probably not cause a crash, but could likely propagate to a large error in the result.

You don't even need a cosmic ray to get an error.  The drive to pack to higher and higher densities inevitably results in vulnerabilities, such as row hammering.  One study measured an average rate of four errors per year per DIMM.

What is the rationale for no parity checking?  I can see that ECC might slow things down a little and cost more, but at least a detected parity error could bring the system down instead of propagating an error silently.  65 bits instead of 64 bits would be a very small price to pay.  Even if it would make sense for a consumer to not have parity checking, I would at least like the ability to replace the memory to get parity checking.  It seems that even the DDR3 standard doesn't support just parity checking -- only ECC.
This is not Apple specific at all. First, why is ECC (72-bit) used over parity? The reason is simply that DRAM chips have been made in data widths of 4, 8 or 16 bits for decades. ECC lets you simply add another commodity chip, instead of making a specific low-volume 5 bit chip. Besides, when you have parity, you can't correct any error, so all you can do is crash the computer when an error is detected. So the net effect is to cause more computer crashes, even if the error is in part of the RAM that is not in use.

There's two reasons why Apple can't put ECC in. One is simply the integrated memory controller Intel puts in does not support ECC to force workstation/server makers to buy the more expensive Xeon line. You can check the ECC supported processors on the Intel ARK.  You see it's only Xeons and low-end CPUs (server appliance market), but none in the Core i5 or i7 range.

Second, the SO-DIMM pinout simply lacks data pins for the 72 bit bus in order to shrink the size for laptops. Memory bus routing is very difficult and the extra 8 lines would also make it difficult for laptop motherboard manufacturers.

Many numerical simulations do not require ECC. Real-world tests have suggested that the extra cost and speed penalty of ECC isn't worth it. As another example, some companies even tell you to turn off ECC.