I am trying to figure out how do I approach for a synchronous FSM as per the following information:

* Two inputs A, B & single output Z
* Two inputs A, B & single output Z
* Z=1 if A had the same value at each of two previous clock ticks.

or

* Z=1 if B=1 since last time the "condition above" was true (i.e A had the same value at each of two previous clock ticks)
* Otherwise Z=0.

I have understood the design to some extent but I am unable to understand how I have to decide what will be the next state in the state diagram?

How do I approach for such designs.