AP20_BASE_PA_SDRAM when I created ap30.h. I'll delete it.
0x4800:0000 on T30. I'll just delete it, as no one uses it.
unlikely. But I'll change it.
> Hmm, and the naming format isn't consistent.
> Prashant Gaikwad can email you the patch off-list if you need.
> between Tegra20 and Tegra30?
> ... above don't make any sense (they're Tegra20 pin group names).
> usefully enumerate, but that is perhaps another question.
of the combo/common Tegra effort.
> is probably even quite different.
back in with the proper T30 layout/names when it's needed.
> between Tegra20 and Tegra30, I'd expect this to be in a common header.
when I replace this header.
> Wouldn't this be common too?
common-izing, it'll go in arch/arm/include/arch-tegra/, etc.
> the pin controller which I suppose is fine.
> would probably number the pins based on GPIO order too.
Tegra20 as well as Tegra30).
>> + * purely a convenience. The translation is done through a table search.
> would be more likely to match any integer-based device-tree pinmux binding.
> must be a conversion table anyway.
> Isn't pmc_ctrl at 0x3000; the second comment above appears misleading.
Yeah, that's odd. Must have missed it during the port. I'll take a look.
Copied from tegra20/pinmux.h. I'll correct it.
> That also seems common. I'll stop pointing this issue out.
Common/combined Tegra code will follow the acceptance of a working T30 build.
Yep, I meant to scrub these during the port. Thanks, I'll clean 'em up.
we port LP0, which as you say is quite a bit different than T20.
> been copied from Tegra20 without necessary modifications.
original porting/bringup branch, I don't think it helped much.