This item was taken from the IEEE Conference ' Spice simulation of 0.18 /spl mu/m CMOS ring oscillators using physical models for capacitance and series resistance ' We present a case study in which ring oscillators, with 0.18 /spl mu/m channel length, are measured and compared with Spice simulations. It is found that good quantitative results can be obtained for several process splits. Special care is taken to include a physical model for the parasitic series resistance R/sub s/(V/sub gs/) and to model correctly the parasitic capacitances obtained from the mask layout.