module x_s3e_sprom (
	input wire				  clka,	 // NbN
	input wire [`RomAddrBus]  addra, // AhX
	output reg [`WordDataBus] douta	 // ÇÝoµf[^
);

	/**********  **********/
	reg [`WordDataBus] mem [0:`ROM_DEPTH-1];

	/********** ÇÝoµANZX **********/
	always @(posedge clka) begin
		douta <= #1 mem[addra];
	end

endmodule