module dvi_serialiser
(
      input       clk_i
    , input       rst_i
    , input       strobe_i
    , input [9:0] data_i
    , output      serial_o
);

`ifndef verilator
ODDR
#(
     .DDR_CLK_EDGE("SAME_EDGE")
    ,.INIT(1'b0)
    ,.SRTYPE("ASYNC")
)
u_ddr_r
(
     .C(clk_i)
    ,.CE(1'b1)
    ,.D1(data_i[0])
    ,.D2(data_i[1])
    ,.Q(serial_o)
    ,.R(1'b0)
    ,.S(1'b0)
);
`else
// Hack - non-functional sim
assign serial_o = clk_i ? data_i[0] : data_i[1];
`endif

endmodule