module srlut_341353777861755476 #(parameter K=4) (
    input wire frame_strobe,
    input wire cfg_mode_n,
    input wire [2**K-1:0] frame_data, // {lut_init[W-1:0]}
    input wire write_clk,
    input wire write_data,

    input wire [K-1:0] lut_i,
    output wire lut_o
);
    localparam W=2**K;
    wire [W-1:0] lut_data;

    wire write_freeze, big_pulse, smol_pulse;

    write_pulse_gen_341353777861755476 pulse_gen_i (
        .clk(write_clk && cfg_mode_n),
        .big_pulse(big_pulse),
        .smol_pulse(smol_pulse)
    );

    // Storage array
    generate
        genvar ii;
        for (ii = 0; ii < W; ii = ii + 1'b1) begin: lut_loop
            wire bit_d;
            wire bit_strobe = ~(smol_pulse | frame_strobe);
            wire shift_buf_d;

            if (ii == 0)
                assign shift_buf_d = write_data;
            else
                assign shift_buf_d = lut_data[ii - 1];

            sky130_fd_sc_hd__ebufn_1 shift_buf_i (
                .A(shift_buf_d),
                .TE_B(big_pulse),
                .Z(bit_d)
            );

            sky130_fd_sc_hd__ebufn_1 cfg_buf_i (
                .A(frame_data[ii]),
                .TE_B(cfg_mode_n),
                .Z(bit_d)
            );

            sky130_fd_sc_hd__dlxtn_1 bit_cell_i (
                .D(bit_d),
                .GATE_N(~bit_strobe),
                .Q(lut_data[ii])
            );
        end
    endgenerate

    // LUT output mux
    assign lut_o = lut_data[lut_i];
endmodule