module sro
  // This is a shift register that receives data on the dout lines
  // from spi slaves.
  #(parameter DATA_WIDTH=16)
  (input clk,
   input resetb,
   input shift,
   input dout,
   output reg [DATA_WIDTH-1:0] datao
   );
   reg                     dout_s;

`ifdef SYNC_RESET
   always @(posedge clk) begin
`else
   always @(posedge clk or negedge resetb) begin
`endif
      if(!resetb) begin
         dout_s <= 0;
         datao <= 0;
      end else begin
         dout_s <= dout;
         if(shift) begin
            datao <= { datao[DATA_WIDTH-2:0], dout_s };
         end
      end
   end
endmodule