module aibnd_clkmux2 ( mux_sel, oclk_in1, oclk_in0, oclk_out );

output  oclk_out;

input  oclk_in1, oclk_in0, mux_sel;

// List of primary aliased buses

/*
specify 
    specparam CDS_LIBNAME  = "aibnd_lib";
    specparam CDS_CELLNAME = "aibnd_red_clkmux2";
    specparam CDS_VIEWNAME = "schematic";
endspecify
*/

assign oclk_out = mux_sel ?  oclk_in1 : oclk_in0 ;


endmodule