module pcGenerate (

	// from expection 	
	input [63:0] privileged_pc,
	input privileged_valid,

	//from instr_queue,
	input branch_pc_valid,
	input [63:0] branch_pc,

	//to ifetch
	output [63:0] fetch_addr_qout,
	input pcGen_fetch_ready,

	input flush,
	input CLK,
	input RSTn

);


	wire [63:0] fetch_addr_dnxt;






	assign fetch_addr_dnxt = 
				privileged_valid ? privileged_pc : 
					(branch_pc_valid ?  branch_pc :  ( (fetch_addr_qout&(~64'b111)) + 64'd8));






	gen_dffren # (.DW(64), .rstValue(64'h8000_0000)) fetch_addr_en ( .dnxt(fetch_addr_dnxt), .qout(fetch_addr_qout), .en(pcGen_fetch_ready|flush), .CLK(CLK), .RSTn(RSTn));













endmodule