module ghrd_10as066n2_issp_0 (
		input  wire       source_clk, // source_clk.clk
		output wire [2:0] source      //    sources.source
	);

	altsource_probe_top #(
		.sld_auto_instance_index ("YES"),
		.sld_instance_index      (0),
		.instance_id             ("RST"),
		.probe_width             (0),
		.source_width            (3),
		.source_initial_value    ("0"),
		.enable_metastability    ("YES")
	) issp_0 (
		.source     (source),     //  output,  width = 3,    sources.source
		.source_clk (source_clk), //   input,  width = 1, source_clk.clk
		.source_ena (1'b1)        // (terminated),                        
	);

endmodule