module RevCounterTest(CLK, DownCount);
	input CLK;
	input DownCount;

	wire [7:0] carry_chain;
	wire [7:0] q;

	RevCounterBit cnt [7:0] (
		.ACLK1(~CLK),
		.clear(1'b0),
		.step(CLK),
		.load(1'b0),
		.q(q),
		.dec(DownCount),
		.cin({carry_chain[6:0], 1'b1}),
		.cout(carry_chain) );

endmodule // UpCounterTest