module cla_16bit(
    input [16:1] A,
    input [16:1] B,
    input cin,
    output [16:1] S,
    output cout
);

    wire [4:0] c; // intermediate carries between CLA blocks, c[0] is cin

    assign c[0] = cin;

    // Instantiate four 4-bit CLA blocks
    genvar i;
    generate
        for (i = 0; i < 4; i = i + 1) begin : cla_block
            cla_4bit cla_unit(
                .A(A[i*4+4:i*4+1]),
                .B(B[i*4+4:i*4+1]),
                .cin(c[i]),
                .S(S[i*4+4:i*4+1]),
                .cout(c[i+1])
            );
        end
    endgenerate

    assign cout = c[4]; // The carry-out of the last CLA block is the carry-out of the entire 16-bit block

endmodule