module singlePulser(
    output reg debouncedBtn,
    input rawBtn,
    input clk
    );

reg state;

initial state = 0;

always@(posedge clk)
begin
    debouncedBtn = 0;
    case({rawBtn, state})
//        2'b00,
        2'b01: state = 0;
        2'b10: 
            begin
                state = 1;
                debouncedBtn = 1;
            end
//        2'b11,
    endcase
end

    
endmodule