module tb_top;
   
   parameter debug = 0;
   
   logic               clk = 1'b0;
   logic               rst, rst_in;
   logic		led_blue;
   logic		led_green;
   logic		led_red;
   logic [2:0] gpio;   
   
   top #(/*AUTOINSTPARAM*/)
   dut 
   (/*AUTOINST*/
    // Outputs
    .gpio				(gpio[2:0]),
    .led_red				(led_red),
    .led_green				(led_green),
    .led_blue				(led_blue)
   );   

   // Stimulus
   always #10 clk = ~clk;

   initial begin
      $display("Starting simulation");
      $dumpfile("tb_top.vcd");
      $dumpvars;
      
      // Log the memories
      //for (int i=0; i<32; i++) $dumpvars(0, dut.image_mem[i]);
      
      #50000000;
      $display("Finishing simulation");
      $finish;
      
   end
   
   
endmodule // tb_spi_slave