module ddr_out (
  datain_h,
  datain_l,
  outclock,
  dataout);

  input    datain_h;
  input    datain_l;
  input    outclock;
  output   dataout;

  wire  sub_wire0;
  wire  dataout = sub_wire0;

  altddio_out  u_altddio_out_component (
        .datain_h (datain_h),
        .datain_l (datain_l),
        .outclock (outclock),
        .dataout (sub_wire0),
        .aclr (1'b0),
        .aset (1'b0),
        .oe (1'b1),
        .oe_out (),
        .outclocken (1'b1),
        .sclr (1'b0),
        .sset (1'b0));
  defparam
    u_altddio_out_component.extend_oe_disable = "OFF",
    u_altddio_out_component.intended_device_family = "Cyclone V",
    u_altddio_out_component.invert_output = "OFF",
    u_altddio_out_component.lpm_hint = "UNUSED",
    u_altddio_out_component.lpm_type = "altddio_out",
    u_altddio_out_component.oe_reg = "UNREGISTERED",
    u_altddio_out_component.power_up_high = "OFF",
    u_altddio_out_component.width = 1;


endmodule