module uart_baudrate_gen_Orig(
        input clock, enable,
        output tick  // generate a tick at the specified baud rate * oversampling
    );

    parameter ClockFrequency = 25000000;
    parameter BaudRate = 115200;
    parameter Oversampling = 1;

    // A quicky for an int log2
    function integer log2(input integer v); begin
        log2=0;
        while(v>>log2)
            log2=log2+1;
        end
    endfunction

    localparam AccWidth = log2(ClockFrequency/BaudRate)+8;  // +/- 2% max timing error over a byte
    reg [AccWidth:0] Acc = 0;
    localparam ShiftLimiter = log2(BaudRate*Oversampling >> (31-AccWidth));  // this makes sure Inc calculation doesn't overflow
    localparam Inc = ((BaudRate*Oversampling << (AccWidth-ShiftLimiter))+(ClockFrequency>>(ShiftLimiter+1)))/(ClockFrequency>>ShiftLimiter);

    localparam ActualCounter = (1<<AccWidth);
    localparam ActualDivider = ActualCounter/Inc;
    localparam ActualErrorCounts = Inc*ActualDivider-ActualCounter;
    localparam ActualErrorPercentage = 100 * ActualErrorCounts / ActualCounter;

    always @(posedge clock)
        if(enable)
            Acc <= Acc[AccWidth-1:0] + Inc[AccWidth:0];
        else
            Acc <= Inc[AccWidth:0];

    assign tick = Acc[AccWidth];
endmodule