module tb_decoder_2_4;

reg [1:0] a_i;
wire [3:0] d_o;

decoder_2_4 DUT
(
.a_i (a_i),
.d_o (d_o)
);

initial begin
a_i = 2'b00;
#10;
a_i = 2'b01;
#10;
a_i = 2'b10;
#10;
a_i = 2'b11;
#10;
$finish;
end

endmodule