module bsg_ready_to_credit_flow_converter
(
  clk_i,
  reset_i,
  v_i,
  ready_o,
  v_o,
  credit_i
);

  input clk_i;
  input reset_i;
  input v_i;
  input credit_i;
  output ready_o;
  output v_o;
  wire ready_o,v_o,N0,N1;
  wire [3:0] credit_cnt;
  wire [0:0] up;

  bsg_counter_up_down_variable_max_val_p10_init_val_p0_max_step_p1
  credit_counter
  (
    .clk_i(clk_i),
    .reset_i(reset_i),
    .up_i(up[0]),
    .down_i(v_o),
    .count_o(credit_cnt)
  );

  assign N0 = credit_cnt[2] | credit_cnt[3];
  assign N1 = credit_cnt[1] | N0;
  assign ready_o = credit_cnt[0] | N1;
  assign v_o = v_i & ready_o;
  assign up[0] = credit_i;

endmodule