module pic_progmem(input clock, write_data, write_strobe, input [3:0] adr, output [11:0] rdata);
    localparam K = 16;

    // the program logic
    reg [27:0] write_sr;
    always @(posedge clock)
        write_sr <= {write_data, write_sr[27:1]};

    wire [11:0] data[0:K-1];
    generate
        genvar ii, jj;
        for (ii = 0; ii < K; ii = ii + 1'b1) begin:word
            for (jj = 0; jj < 12; jj = jj + 1'b1) begin:bits
                sky130_fd_sc_hd__dlxtp_1 rfbit_i (
                    .GATE(write_sr[ii + 12] && write_strobe),
                    .D(write_sr[jj]),
                    .Q(data[ii][jj])
                );
            end
        end
    endgenerate
    assign rdata = data[adr];
endmodule