module top
(
  clk_i,
  reset_i,
  limit_i,
  counter_o
);

  input [15:0] limit_i;
  output [15:0] counter_o;
  input clk_i;
  input reset_i;

  bsg_counter_dynamic_limit
  wrapper
  (
    .limit_i(limit_i),
    .counter_o(counter_o),
    .clk_i(clk_i),
    .reset_i(reset_i)
  );


endmodule