module fp_sqrt (
	clk_en,
	clock,
	data,
	result);

	input	  clk_en;
	input	  clock;
	input	[31:0]  data;
	output	[31:0]  result;

	wire [31:0] sub_wire0;
	wire [31:0] result = sub_wire0[31:0];

	fp_sqrt_altfp_sqrt_d7d	fp_sqrt_altfp_sqrt_d7d_component (
				.clk_en (clk_en),
				.clock (clock),
				.data (data),
				.result (sub_wire0));

endmodule