module io_delay_line_dcc (
input            c_in_p,
input            c_in_n,
input      [3:0] r_gray,
input      [3:0] f_gray,
output           c_out_p,
output           c_out_n 
);

`ifdef TIMESCALE_EN
                timeunit 1ps;
                timeprecision 1ps;
`endif

parameter STEP_DELAY = 40;

reg c_in_del;

wire  [15:0] c_in_p_f;
wire  [15:0] c_in_p_r;

assign #63  c_in_p_f[0] = c_in_p;
assign #67  c_in_p_f[1] = c_in_p;
assign #71  c_in_p_f[2] = c_in_p;
assign #75  c_in_p_f[3] = c_in_p;
assign #79  c_in_p_f[4] = c_in_p;
assign #83  c_in_p_f[5] = c_in_p;
assign #87  c_in_p_f[6] = c_in_p;
assign #91  c_in_p_f[7] = c_in_p;
assign #95  c_in_p_f[8] = c_in_p;
assign #99  c_in_p_f[9] = c_in_p;
assign #103  c_in_p_f[10] = c_in_p;
assign #107  c_in_p_f[11] = c_in_p;
assign #111  c_in_p_f[12] = c_in_p;
assign #115  c_in_p_f[13] = c_in_p;
assign #119  c_in_p_f[14] = c_in_p;
assign #123  c_in_p_f[15] = c_in_p;

assign #63  c_in_p_r[0] = c_in_p;
assign #67  c_in_p_r[1] = c_in_p;
assign #71  c_in_p_r[2] = c_in_p;
assign #75  c_in_p_r[3] = c_in_p;
assign #79  c_in_p_r[4] = c_in_p;
assign #83  c_in_p_r[5] = c_in_p;
assign #87  c_in_p_r[6] = c_in_p;
assign #91  c_in_p_r[7] = c_in_p;
assign #95  c_in_p_r[8] = c_in_p;
assign #99  c_in_p_r[9] = c_in_p;
assign #103  c_in_p_r[10] = c_in_p;
assign #107  c_in_p_r[11] = c_in_p;
assign #111  c_in_p_r[12] = c_in_p;
assign #115  c_in_p_r[13] = c_in_p;
assign #119  c_in_p_r[14] = c_in_p;
assign #123  c_in_p_r[15] = c_in_p;

always @(*)
  if (c_in_p == 1'b0)
    begin
      case (f_gray[3:0])
       4'b0000 : c_in_del =  c_in_p_f[0];
       4'b0001 : c_in_del =  c_in_p_f[1];
       4'b0011 : c_in_del =  c_in_p_f[2];
       4'b0010 : c_in_del =  c_in_p_f[3];
       4'b0110 : c_in_del =  c_in_p_f[4];
       4'b0111 : c_in_del =  c_in_p_f[5];
       4'b0101 : c_in_del =  c_in_p_f[6];
       4'b0100 : c_in_del =  c_in_p_f[7];
       4'b1100 : c_in_del =  c_in_p_f[8];
       4'b1101 : c_in_del =  c_in_p_f[9];
       4'b1111 : c_in_del =  c_in_p_f[10];
       4'b1110 : c_in_del =  c_in_p_f[11];
       4'b1010 : c_in_del =  c_in_p_f[12];
       4'b1011 : c_in_del =  c_in_p_f[13];
       4'b1001 : c_in_del =  c_in_p_f[14];
       4'b1000 : c_in_del =  c_in_p_f[15];
       default : c_in_del =  c_in_p_f[0];
       endcase
    end
  else if (c_in_p == 1'b1)
    begin
      case (r_gray[3:0])
       4'b0000 : c_in_del =   c_in_p_r[0];
       4'b0001 : c_in_del =   c_in_p_r[1];
       4'b0011 : c_in_del =   c_in_p_r[2];
       4'b0010 : c_in_del =   c_in_p_r[3];
       4'b0110 : c_in_del =   c_in_p_r[4];
       4'b0111 : c_in_del =   c_in_p_r[5];
       4'b0101 : c_in_del =   c_in_p_r[6];
       4'b0100 : c_in_del =   c_in_p_r[7];
       4'b1100 : c_in_del =   c_in_p_r[8];
       4'b1101 : c_in_del =   c_in_p_r[9];
       4'b1111 : c_in_del =   c_in_p_r[10];
       4'b1110 : c_in_del =   c_in_p_r[11];
       4'b1010 : c_in_del =   c_in_p_r[12];
       4'b1011 : c_in_del =   c_in_p_r[13];
       4'b1001 : c_in_del =   c_in_p_r[14];
       4'b1000 : c_in_del =   c_in_p_r[15];
       default : c_in_del =   c_in_p_r[0];
       endcase
    end

assign c_out_p =  c_in_del;
assign c_out_n = ~c_in_del;

endmodule