module top
(
  a_i,
  signed_i,
  z_o,
  invalid_o
);

  input [15:0] a_i;
  output [15:0] z_o;
  input signed_i;
  output invalid_o;

  bsg_fpu_f2i
  wrapper
  (
    .a_i(a_i),
    .z_o(z_o),
    .signed_i(signed_i),
    .invalid_o(invalid_o)
  );


endmodule