module tb_transceiver;

    reg clk = 1'b0;


    reg        mgmt_clk;
    reg [1:0]  powerup_channel;

    reg        preemp_0p0;
    reg        preemp_3p5;
    reg        preemp_6p0;
           
    reg        swing_0p4;
    reg        swing_0p6;
    reg        swing_0p8;

    wire [1:0] tx_running;

    reg        refclk0;
    reg        refclk1;

    wire       tx_symbol_clk;
    reg [79:0] tx_symbols;

    wire [7:0]  debug;
           
    wire [1:0] gtptx_p;
    wire [1:0] gtptx_n;

   reg  [15:0] count;
initial begin
    mgmt_clk        = 1'b0;
    powerup_channel = 2'b11;
    preemp_0p0      = 1'b1;
    preemp_3p5      = 1'b0;
    preemp_6p0      = 1'b0;
           
    swing_0p4       = 1'b1;
    swing_0p6       = 1'b0;
    swing_0p8       = 1'b0;

    refclk0         = 1'b0;
    refclk1         = 1'b0;

    tx_symbols = 80'h0000000000000003FCFF;

    count = 16'b0;
       
    forever begin 
        #2
        refclk0  = ~refclk0;
        #2
        refclk0  = ~refclk0;
        mgmt_clk = ~mgmt_clk; // generate a clock
        if(count == 100) begin
            powerup_channel = 2'b00;
        end
        count = count + 1;
    end
end     

transceiver i_transceiver(
    .mgmt_clk        (mgmt_clk),
    .powerup_channel (powerup_channel),

    .preemp_0p0      (preemp_0p0),
    .preemp_3p5      (preemp_3p5),
    .preemp_6p0      (preemp_6p0),
           
    .swing_0p4       (swing_0p4),
    .swing_0p6       (swing_0p6),
    .swing_0p8       (swing_0p8),

    .tx_running      (tx_running),

    .refclk0         (refclk0),
    .refclk1         (refclk1),

    .tx_symbol_clk   (tx_symbol_clk),
    .tx_symbols      (tx_symbols),

    .debug           (debug),
           
    .gtptx_p         (gtptx_p),
    .gtptx_n         (gtptx_n)
);

endmodule