module rec_cmd_nib#(
    parameter ADDR = 4'b0000 // Bit Pattern
)
(
    input i_clk,
    input i_wr_en,
    input [3:0] i_nib,
    output reg o_hold
);

wire addr_sig;
assign addr_sig = (ADDR == i_nib);

always @(posedge i_clk) begin
    if (!i_wr_en) begin
        o_hold <= 0;
    end else begin
        o_hold <= addr_sig;
    end
end

endmodule