module aeMB_core (/*AUTOARG*/
   // Outputs
   iwb_stb_o, iwb_adr_o, fsl_wre_o, fsl_tag_o, fsl_stb_o, fsl_dat_o,
   fsl_adr_o, dwb_wre_o, dwb_stb_o, dwb_sel_o, dwb_dat_o, dwb_adr_o,
   // Inputs
   sys_rst_i, sys_int_i, sys_clk_i, iwb_dat_i, iwb_ack_i, fsl_dat_i,
   fsl_ack_i, dwb_dat_i, dwb_ack_i
   );
   // Instruction WB address space
   parameter ISIZ = 32;
   // Data WB address space
   parameter DSIZ = 32;
   // Multiplier
   parameter MUL = 1;
   // Barrel Shifter
   parameter BSF = 1;   

   /*AUTOOUTPUT*/
   // Beginning of automatic outputs (from unused autoinst outputs)
   output [DSIZ-1:2]	dwb_adr_o;		// From edk32 of aeMB_edk32.v
   output [31:0]	dwb_dat_o;		// From edk32 of aeMB_edk32.v
   output [3:0]		dwb_sel_o;		// From edk32 of aeMB_edk32.v
   output		dwb_stb_o;		// From edk32 of aeMB_edk32.v
   output		dwb_wre_o;		// From edk32 of aeMB_edk32.v
   output [6:2]		fsl_adr_o;		// From edk32 of aeMB_edk32.v
   output [31:0]	fsl_dat_o;		// From edk32 of aeMB_edk32.v
   output		fsl_stb_o;		// From edk32 of aeMB_edk32.v
   output [1:0]		fsl_tag_o;		// From edk32 of aeMB_edk32.v
   output		fsl_wre_o;		// From edk32 of aeMB_edk32.v
   output [ISIZ-1:2]	iwb_adr_o;		// From edk32 of aeMB_edk32.v
   output		iwb_stb_o;		// From edk32 of aeMB_edk32.v
   // End of automatics
   /*AUTOINPUT*/
   // Beginning of automatic inputs (from unused autoinst inputs)
   input		dwb_ack_i;		// To edk32 of aeMB_edk32.v
   input [31:0]		dwb_dat_i;		// To edk32 of aeMB_edk32.v
   input		fsl_ack_i;		// To edk32 of aeMB_edk32.v
   input [31:0]		fsl_dat_i;		// To edk32 of aeMB_edk32.v
   input		iwb_ack_i;		// To edk32 of aeMB_edk32.v
   input [31:0]		iwb_dat_i;		// To edk32 of aeMB_edk32.v
   input		sys_clk_i;		// To edk32 of aeMB_edk32.v
   input		sys_int_i;		// To edk32 of aeMB_edk32.v
   input		sys_rst_i;		// To edk32 of aeMB_edk32.v
   // End of automatics
   /*AUTOWIRE*/

   // INSTANTIATIONS /////////////////////////////////////////////////////////////////

   /* 
    aeMB_edk32 AUTO_TEMPLATE (
    .dwb_adr_o(dwb_adr_o[DSIZ-1:2]),
    .iwb_adr_o(iwb_adr_o[ISIZ-1:2]),
    );
    */
   
   aeMB_edk32 #(ISIZ, DSIZ, MUL, BSF)
   edk32 (/*AUTOINST*/
	  // Outputs
	  .dwb_adr_o			(dwb_adr_o[DSIZ-1:2]),	 // Templated
	  .dwb_dat_o			(dwb_dat_o[31:0]),
	  .dwb_sel_o			(dwb_sel_o[3:0]),
	  .dwb_stb_o			(dwb_stb_o),
	  .dwb_wre_o			(dwb_wre_o),
	  .fsl_adr_o			(fsl_adr_o[6:2]),
	  .fsl_dat_o			(fsl_dat_o[31:0]),
	  .fsl_stb_o			(fsl_stb_o),
	  .fsl_tag_o			(fsl_tag_o[1:0]),
	  .fsl_wre_o			(fsl_wre_o),
	  .iwb_adr_o			(iwb_adr_o[ISIZ-1:2]),	 // Templated
	  .iwb_stb_o			(iwb_stb_o),
	  // Inputs
	  .dwb_ack_i			(dwb_ack_i),
	  .dwb_dat_i			(dwb_dat_i[31:0]),
	  .fsl_ack_i			(fsl_ack_i),
	  .fsl_dat_i			(fsl_dat_i[31:0]),
	  .iwb_ack_i			(iwb_ack_i),
	  .iwb_dat_i			(iwb_dat_i[31:0]),
	  .sys_int_i			(sys_int_i),
	  .sys_clk_i			(sys_clk_i),
	  .sys_rst_i			(sys_rst_i));
   
   
endmodule // aeMB_core