Semiconductor chips are typically disposed on a metallic carrier, such as a copper carrier, by solder or glue. However, the thermal properties between the semiconductor chips and the metallic carrier are very different. For example, the thermal coefficient of expansion (CTE) of silicon chips is much less than the CTE of copper during the cooling process. This leads to increased thermo-mechanical tension between the chips and the carrier, which results in breakage in the silicon. The difference in thermal-mechanical properties also causes a strong bending of the carrier substrate, which makes subsequent processing of the semiconductor, such as laser drilling, lamination, wire bonding, etc., difficult. Therefore, a need exists for a method and system that minimize carrier stress of a semiconductor device.