1. Field of the Invention
This invention relates to a manufacturing method of semiconductor devices, and more particularly to a manufacturing method of MOS transistors or semiconductor integrated circuits containing MOS transistors.
2. Description of the Related Art
MOS transistors using polycrystalline silicon (polysilicon) layers, into which highly concentrated impurities have been introduced, as gate electrodes, are known as silicon-gate MOS transistors. Such silicon-gate MOS transistors, including p-channel MOS transistors on an n-type silicon substrate, are generally fabricated through the processes shown in FIGS. 1A through 1D.
First, as shown in FIG. 1A, a field insulating film 31 to separate elements is formed on the surface of an n-type silicon substrate 32 by selective oxidation to separate element regions 33 from each other.
As shown in FIG. 1B, a silicon oxide film 34 is then formed on the element region 33. To control the threshold of the MOS transistor, p-type impurities, such as boron ions, are implanted into the element region 33 through the silicon oxide film 34.
After removal of the silicon oxide film 34, as shown in FIG. 1C, another clean silicon oxide film (a gate oxide film) 35 is formed to a specified thickness. Deposited over the entire surface is a polysilicon layer 36, into which n-type impurities, such as phosphorus, are diffused. The phosphorus-diffused polysilicon layer 36 will be used as gate electrode material in the subsequent step. Heat treatment during the diffusion of phosphorus into the polysilicon layer 36 has activated ions implanted into the element region 33, which forms a p-type region 37.
As shown in 1D, the polysilicon layer 36 is then patterned on the desired shape to form the gate electrode 38 of the MOS transistor. After this, p-type impurities, such as boron ions, are implanted into the substrate to form the p-type source and drain regions 39 and 39 at the surface of the element region 33.
The aforementioned manufacturing method is now in widespread use. However, as MOS transistors are getting smaller, manufacturing such fine MOS transistors, particularly p-channel MOS transistors has begun to pose a problem. That is, for p-channel MOS transistors using n-type impurity-added polysilicon gate electrodes 38, in order to set the threshold of the MOS transistor to a practical range of -0.8 V to -0.5 V, p-type boron ions are implanted into the channel portion (the region between the source and drain diffusion regions) as described above, to form a p-type region 37 near the interface of the gate oxide film 35 and silicon substrate 32 as shown in FIG. 1D.
FIG. 2 shows an impurity profile in the substrate depth direction at the channel portion of the p-channel MOS transistor of FIG. 1D.
To control the threshold of the MOS transistor, it is necessary to sufficiently raise the impurity concentration in the p-type region 37 and give a shallow distribution. It is also necessary to place the peak of the impurity distribution in the interface with the gate oxide film, if possible.
In using ion implantation to control the threshold of the MOS transistor as mentioned above, the fabrication of MOS transistors with the implanted ion-exposed silicon oxide film 34 as it is causes many problems.
While smaller MOS transistors require thinner gate oxide films, using silicon oxide films exposed to implanted ions without any treatment cannot assure sufficient withstand voltage and reliability.
To avoid this problem, after the ion implantation in FIG. 1B is complete, the silicon oxide film 34 is removed, and then another clean gate oxide film 35 is formed to a specified thickness.
In this manufacturing method, however, after the ion implantation of boron to control the threshold of MOS transistor, the gate oxide film 35 is formed. As a result, boron atoms near the surface of the substrate are absorbed into the gate oxide film 35, reducing the boron concentration near the substrate's surface. This makes it difficult to place the peak of the impurity distribution in the interface with the gate oxide film.
The above phenomenon deepens the diffusion depth xj of the p-type impurity region in FIG. 2, so that the fabrication of fine p-channel MOS transistors becomes extremely difficult.