On-chip network architectures, also known as network-on-chip architectures, are being designed with a large number of agents. Traditionally, these network architectures have emulated off-chip networks, resulting in complex designs that are not scalable.
An interconnect, a type of mesh network, is a simplified design topology that enable large numbers of agents to coexist on-chip, with each agent being able to communicate with another agent. Interconnects are made from combinations of rings, presented in two dimensions, with intelligence embedded at the intersections of the rings.
Unfortunately, the design of such interconnects tends to favor the agents disposed at the periphery of the interconnect over agents located in the center of the interconnect. This design flaw may result in starvation, in which an agent is unable to send a message over the interconnect to another agent, and bounce, in which messages already in the interconnect are unable to reach their destination agent.
Thus, there is a continuing need for a solution to overcome the shortcomings of the prior art.