The present invention relates to a switched-capacitor integrator and, more particularly, to a switched-capacitor integrator for eliminating switching noise.
FIG. 1A shows a circuit diagram of a typical integrator which is a basic filter circuit in an electronic circuit implementing filters. The integrator includes an operational amplifier A for amplifying voltage passing through its negative input node and for outputting an output voltage signal Vout(t), a feedback capacitor C2 connecting the negative input node and an output node of the operational amplifier A and a resistor R1 connecting a voltage input node of Vin(t) and the negative input node of the operational amplifier A. The transfer function and frequency characteristics of the integrator are H(s)=xe2x88x921/R1C2*1/s.
When embodying the integrator of FIG. 1A in an integrated circuit, the resistor and capacitor of the integrator have accuracy errors of approximately 5% and 1%, respectively. These errors vary substantially with the operation environment, such as manufacturing process, temperature and use time, making it difficult to obtain accurate and reliable frequency characteristics. Therefore, in order to solve the above problem of the integrated circuit, there has been introduced a switched-capacitor circuit illustrated in FIG. 1B.
The switched-capacitor circuit will be explained with reference to FIG. 1B.
First of all, xcfx861 and xcfx862 are non-overlapping two-phase clock signals and a charge of Q1=C1*V1 is stored in C1 while xcfx861 has a xe2x80x981xe2x80x99 state. After one half period of the two-phase clock signals xcfx861 and xcfx862, wherein xcfx862 has a xe2x80x981xe2x80x99 state, C1 is coupled with V2 and, thus, a charge of Q2=C1*V2 is stored in C1. At this time, a charge of xcex94Q=C1(V1-V2) flows from the switched-capacitor C1. Therefore, during the one clock period T, an average current of I=xcex94Q/T=C1(V1-V2)/T, which can be represented as (V1-V2)/Req, flows from V1 to V2. Accordingly, the switched-capacitor circuit can be implemented by using an equivalent resistor Req.
The switched-capacitor circuit can be readily integrated on a single chip through the use of a CMOS manufacturing process and has advantages of removing resistors and reducing power consumption. As a result, it can be used in almost any analog integrated filter. Further, a filter using the switched-capacitor circuit expresses the frequency characteristics of the integrator as a capacitance ratio and, therefore, it can provide high accuracy and operational reliability.
Referring to FIG. 1C, there is provided an integration circuit using a switched-capacitor.
The switched-capacitor integrator includes an operational amplifier A, a capacitor C2 connected between a negative input node and an output node of the operational amplifier A, two switches S1 and S2 and a capacitor C1 connected between a connection node of the two switches S1 and S2 and a ground voltage node. The switches S1 and S2 alternately perform a switching operation in response to the non-overlapping two-phase clock signals xcfx861 and xcfx862 as described above.
When forming a capacitor on a practical integrated circuit, parasitic capacitance occurs at both ends of the capacitor, which has an influence on the frequency characteristics of the integrator. In order to exclude this influence, both ends of the parasitic capacitance should be connected to a certain voltage, a ground voltage source or the input or output node of the operational amplifier A at any clock signal xcfx861 or xcfx862 to avoid their floating states.
FIG. 1D illustrates a switched-capacitor integrator performing an integration operation regardless of the parasitic capacitance through the use of the above scheme.
The switched-capacitor integrator of FIG. 1D further includes switches S3 and S4 at both ends of the capacitor C1 shown in FIG. 1C. Switches S3 and S4 operate alternately in response to the non-overlapping two-phase clock signals xcfx861 and xcfx862, respectively, like the switches S1 and S2.
Herein, capacitors CP1L, CP1R, CP2L and CP2R represent parasitic capacitance caused at both ends of the capacitors C1 and C2, respectively.
At first, when considering the parasitic capacitors CP1L and CP1R related to the capacitor C1, one end of the parasitic capacitor CP1L is connected to an input voltage Vin if an actuated clock input, e.g., having a xe2x80x981xe2x80x99 state, is xcfx861 and, thus, the switch S1 is on. On the other hand, the other end of the parasitic capacitor CP1L is attached to the ground voltage source if the actuated clock input is xcfx862 and, thus, the switch S4 is on. In the mean time, one end of the parasitic capacitor CP1R is coupled to the ground voltage source if the actuated clock input is xcfx861 and, thus, the switch S3 is on. On the other hand, the other end of the parasitic capacitor CP1R is attached to a negative input node of the operational amplifier A if the actuated clock input is xcfx862 and, thus, the switch S2 is on. As a result, both ends of the parasitic capacitor are connected to a certain voltage, such as Vin, the ground voltage source or the input node of the operational amplifier A, at any actuated clock signal xcfx861 or xcfx862.
Meanwhile, the parasitic capacitor CP2L of capacitor C2 is always connected to a virtual ground voltage source and the parasitic capacitor CP2R of capacitor C2 is attached to the output node of the operational amplifier A. Therefore, the parasitic capacitors CP2L and CP2R do not have an influence on the operation of the integrator.
Referring to FIG. 2, there is shown a circuit diagram of a switched-capacitor integrator including a reference voltage unit in addition to the integrator of FIG. 1D.
The switched-capacitor integrator comprises a first and a second switch SW1 and SW2 providing input signals Va and Vb, respectively, to one end of an input capacitor C1, a first operational amplifier A1 receiving a reference voltage Vc as its positive input and whose output node is connected with its negative input node, a third switch SW3 connecting the output node N2 of the first operational amplifier A1 with the other end N1 of the input capacitor C1, a second operational amplifier A2 receiving a signal from the input capacitor C1 through a fourth switch SW4 as its positive input and the output of the first operational amplifier A1 as its negative input, and a feedback capacitor C2 connecting an output signal Vout with the negative input of the second operational amplifier A2.
Hereinafter, the operation of the switched-capacitor integrator employing the reference voltage unit will be explained with reference to FIG. 2. As described above, xcfx861 and xcfx862 are the non-overlapping two-phase clock signals. Furthermore, the first and third switches SW1 and SW3 operate in response to the first phase clock signal xcfx861 and the second and fourth switches SW2 and SW4 operate under the control of the second phase clock signal xcfx862.
That is, if the first phase clock signal xcfx861 is actuated and, thus, the first and third switches SW1 and SW3 are on, a charge of C1(Va-Vc) is stored in the input capacitor C1. On the other hand, if the second phase clock signal xcfx862 is actuated and, thus, the second and fourth switches SW2 and SW4 are on, a charge of C1(Vb-Vc) is stored in the input capacitor C1. Therefore, during one clock period, a charge of {C1(Va-Vc)}xe2x88x92{C1(Vb-Vc)}=C1(Va-Vb)moves from the input capacitor C1 to the feedback capacitor C2 according to the law of conservation of quantity of electric charge.
When the actuated clock signal changes from xcfx862 to xcfx861, the amount of charge stored in the input capacitor C1 cannot change suddenly from C1(Vb-Vc) to C1(Va-Vc) and, therefore, the instant voltage of the input capacitor C1 is maintained at Vb-Vc. However, since the input voltage changes from Vb to Va at the moment when the actuated clock signal becomes xcfx861, the voltage at the output node N2 of the first operational amplifier changes instantaneously to maintain the instant voltage across the capacitor C1 at Vb-Vc, causing switching noise to occur.
Since this switching noise influences all of the characteristics of the integration circuit, it should be minimized. Further, since the node N2 where the switching noise occurs is connected to the positive input of the second operational amplifier A2, it is necessary to eliminate the switching noise.
It is, therefore, a primary object of the present invention to provide a switched-capacitor integrator capable of eliminating noises caused by the switching of an input signal.
In accordance with the present invention, there is provided a switched-capacitor integrator including a resistor and a capacitor connected to an input node of an operational amplifier to eliminate switching noise caused when a voltage at the input node of the operational amplifier is instantaneously changed. As a result, since the voltage at the input node varies according to a time constant xcfx84=RC, the switching noise can be eliminated by adjusting the resistance R and the capacitance C. This allows the voltage at the input node of the operational amplifier to be virtually constant.