1. Technical Field
The present invention relates to semiconductor devices having a stacked metal-insulator-metal capacitor in general, and in particular to a method for fabricating a stacked metal-insulator-metal capacitor.
2. Description of Related Art
As the size of integrated circuits becomes smaller and smaller, capacitors used in memory storage cells need to have a higher capacitance per unit area. One technique of increasing capacitance per unit area is by changing capacitors from their typical polysilicon-insulator-polysilicon configuration to a metal-insulator-metal (MIM) configuration.
A metal-insulator-metal capacitor (MIMCap) is a specific type of capacitor having a dielectric layer embedded within two metal plates that are parallel to a semiconductor wafer surface. The MIMCap process flow typically contains a metal stack/cap oxide/metal stack integrated into a back-end-of-the-line (BEOL) structure. In addition to higher capacitance per unit area, MIMCaps also provide radiation hardening for memory devices as well as other integrated circuit devices.
The current MIMCap process flow requires an entire stack to be deposited at once and the metal films are subsequently patterned. As a result, defects are allowed to form since the upper levels are patterned and etched first, which makes the wafer non-planar and much more difficult for the lowest (i.e., the most critical) metal layer to be patterned. Also, defects formed during the patterning of the upper metal layer can cause defects on the lower metal layer due to micromasking.
Consequently, it would be desirable to provide an improved method for fabricating MIMCaps.