An integrated circuit (IC) is formed by processing a silicon or other semiconductor substrate. The processing creates semiconductor devices such as transistors, resistors, etc. on the substrate. The semiconductor die that results is typically very small and fragile. A semiconductor package encases the die, protecting the die and making it easier to handle. The package also includes a package substrate to direct power and signals to and from the die. The package substrate includes several terminals (or pads) on the bottom of the package to form external connections.
FIG. 1A illustrates a bottom view of a semiconductor package. The package 10 has several terminals on the bottom of the package. The terminals are connected with interconnect devices to form external connections. The interconnect devices may be, for example, ball grid array (BGA), pin grid array (PGA), or land grid array (LGA) interconnects. Before the interconnect is attached to the terminal or pad, the pad is plated to provide protection from electromigration, oxidation, joint failure, and signal degradation.
Several varieties of terminals are shown on the package 10. The signal pads 12 route signals to and from a die. The power pads 14 deliver power to the die. The ground pads 16 provide a ground for the die. Each of the different types of pads has different needs. For example, the signal pads 12 must deliver a clean signal. The power pads 14 and ground pads 16 need to tolerate high currents.
FIG. 1B illustrates a cross sectional view of semiconductor package terminals having protecting plating layers. As can be seen in FIG. 1B, the package substrate 18 includes pads 12, 14, and 16. All of the pads 12, 14, and 16 have been plated with a layer of immersion gold 20. The immersion gold layer 20 maintains good interconnect solder joint strength. However, the immersion gold layer 20 alone leaves the power pads 14 and ground pads 16 susceptible to electromigration. Electromigration is caused by an intermetallic copper-tin compound created at the joint between tin solder and copper terminals. Electromigration is aggravated by the high currents that the power and ground pads 14 and 16 carry. This problem is typically encountered when using BGA interconnects.
FIG. 1C illustrates a cross sectional view of a semiconductor package including pads that are coated using an electroless nickel—immersion gold (ENIG) process. The package 30 includes pads 12, 14, and 16, that are part of the package substrate 18. The ENIG process deposits a layer of electroless nickel 32 and a layer of immersion gold 20 on the pads 12, 14, and 16. The electroless nickel layer 32 protects the power pads 14 and ground pads 16 from electromigration failures, but weakens the joints between interconnects and the pads 12, 14, and 16.
FIG. 1D illustrates a semiconductor package having pads with electroplated copper and immersion gold layers deposited thereon. The package 40 includes several pads 12, 14, and 16, having first deposited thereon an electroplated nickel layer 42. Electroplating requires that a tie bar (not shown) be attached to each pad so that current can be driven through the pads. The tie bars are removed after the nickel layer 42 is deposited, however, short stubs 44 will remain on the pads 12, 14, and 16. Electroplating may be inappropriate for signal pads 12, since the stubs 44 may impair the signal integrity of the signal pads 12. The stubs 44 can create an impedance discontinuity resulting in a reflected wave which negatively affects signal integrity. An immersion gold layer 20 is deposited over the electroplated nickel layer 42. The immersion gold layer 20 again provides for a strong interconnect joint.
An immersion gold layer 20 is added to improve solder joint strength. A nickel layer, either the electroplated nickel layer 42 or the EL nickel layer 32, is added to prevent electromigration in the power and ground pads 14 and 16. The electroplated nickel layer 42 leaves stubs 44 which can affect signal integrity on signal pads 12. Further, the EL nickel layer 32 weakens the solder joints.