Processors used in computers and other devices execute instructions to perform logical operations, load and store operations, and other operations. Processor performance may be increased by providing several execution units which may execute instructions simultaneously. Processors which include multiple, concurrently operating execution units are referred to as superscalar processors.
Instructions to be executed by a processor are written in a certain order referred to as program order. For example, two different load instructions may load data into two different register locations in a processor, and then the next instruction in program order may perform an operation using the data in these two locations and write the result of the operation to another register location. Finally, a store instruction may store the results from the operation to a location in main memory associated with the processor. The first instructions in program order may be thought of as older than the later instructions in program order. In the example above, the initial load instructions are considered older than the store instruction and, conversely, the store instruction is considered to be younger than the load instructions.
A superscalar processor may increase overall processing speed by executing instructions out of program order. For example, a load instruction may be executed ahead of a store instruction in program order. That is, a younger load instruction may be executed ahead of an older store instruction. A load instruction executed ahead of a store instruction in program order is referred to as a preload.
Problems arise in executing instructions out of program order when one instruction depends upon data supplied by another instruction. For example, a store instruction may store data to an address in memory and a load instruction later in program order may load data from that address. In this example, if the load instruction is executed as a preload ahead of the store instruction, it will load incorrect data, causing an error in program execution. Because the preload instruction specifies the same address as the older store instruction, the preload conflicts with the later executed store instruction.