1. Field of the Invention
The present invention relates to a voltage generating circuit. More particularly, the present invention relates to a charge pump circuit, which can be applied to semiconductor memory devices.
2. Description of Related Art
Source voltages of various voltage levels are usually required in electronic devices, thus, charge pump circuits are usually disposed to generate source voltages of different voltage levels from existing source voltages. For example, FIG. 1 illustrates the canonical values of biases required by a memory cell of a flash memory at reading, writing (or programming), and erasing. For the reason of power saving, currently the source voltage supplied to an electronic device is generally 3.3V or lower, thus, obviously, the 5 V, 7 V, 9 V, and 10 V in FIG. 1 are to be pulled up by charge pump circuits.
FIG. 2 is a block diagram of a conventional charge pump circuit, which is disclosed in U.S. Pat. No. 6,567,309. Referring to FIG. 2, the charge pump circuit 200 includes a voltage detector 210, a clock generator 220, clock controllers 231˜234, and charge pumps 241˜244. The voltage detector 210 detects the voltage VP at node P. Before the voltage VP reaches a predetermined level (for example, 5V, 7V, 9V, or 10V in FIG. 1), the voltage detector 210 enables the clock generator 220 to generate four phase shift clock signals CK1˜CK4, which respectively drive the clock controllers 231˜234 and further drive the charge pumps 241˜244 to provide charges to node P, so that the voltage VP is continued to be pulled up. When the voltage VP has been pulled up to the predetermined voltage level, the voltage detector 210 disables the clock generator 220, so that the charge pumps 241˜244 stop providing charges to node P.
In the process described above, the voltage VP is detected by the voltage detector 210 to determine whether to enable or disable all the charge pumps 241˜244, that is, all the charge pumps 241˜244 providing charges to node P or none of the charge pumps 241˜244 providing charges to node P, and further to accomplish the purpose of adjusting the voltage VP. However, since all the charge pumps 241˜244 are enabled or disabled, the voltage VP drifts about the predetermined voltage to a great extent when the voltage VP is regulated at the predetermined voltage, and moreover, enabling all the charge pumps 241˜244 will consume power considerably.