High lead count semiconductor device packages require a very close spacing between the bonded wires that interconnect the IC chip bonding pads with the package leadframe. If a plastic package is to be created by conventional transfer molding, the plastic flow in the process will produce wire sweep in which those wires running perpendicular to the flow will be "swept" or moved along with the flow. This can produce shorting between adjacent wires which results in a defective product. As higher lead count packages are developed, the wires are closer together and wire sweep becomes more of a problem.
FIG. 1 shows a 132 lead package structure. The outlines show the inner portions of a 132 lead pattern in a Leadframe. The peripheral numbers identify the fingers starting at 1 at the vertical center and proceeding counterclockwise around the array. Every fifth finger is shown numbered. The four fingers 133 at the four array corners support the lead frame chip mounting pad 134, which will accomodate various sized IC chips. The lead wires that interconnect the IC chip and the leadframe are identified as elements 143. Only two of the 130 wires shown are identified. Three IC chips are shown. The 1, 1.5 and 2 micron geometries, labeled 135, 136 and 137, shown are related to the IC feature size. It turns out that the smaller feature sizes result in smaller chip sizes. The following chart shows the actual physical dimensions for the three fabrication geometries illustrated in FIG. 1. The upper numbers are in mils and the lower numbers are in microns:
__________________________________________________________________________ GATE ARRAY WIRE LAYOUT FAB DIE SIZE PAD MAX WIRE GEOMETRY X Y AREA PITCH LENGTH __________________________________________________________________________ 2 MICRON 259/6.58 262/6.65 68K/43.8 7/0.178 170/4.32 1.5 MICRON 194/4.93 196/4.98 38K/24.6 5.2/0.132 216/5.49 1 MICRON 129/3.28 131/3.33 17K/10.9 3.5/0.089 262/6.65 __________________________________________________________________________
The wire connections are shown only for the 2 micron die 137 fabrication size. Clearly, the smaller die sizes must involve closer bonding pad spacing and longer wires. In terms of wire sweep producing wire shorting, all of the FIG. 1 configurations are susceptible. The length to spacing ratio of the wires in the 2 micron geometry is almost 25:1. However, with the 1 micron geometry chip the 0.089 micron spacing and 6.65 micron length results in a ratio of almost 750:1. This large ratio is clearly much more susceptible to shorting. It would be desirable to avoid the wire shorting problems resulting from wire sweep due to molding compound flow. The most immediate solution to the problem would be to use insulated wire in the wire bonding machines. However, such insulation interferes with the machine operation and the insulation would have to be stripped from the ends of the wire being bonded, thus, making the wire bonding machines and wire handling excessively complex.