Electronic devices, such as the integrated circuits (IC) 103 shown in FIG. 1, commonly include circuits 106 (labeled “HV circuits”) that operate from a relatively high DC supply voltage (for example, 3V). IC 103 also includes circuits 109 (labeled “LV circuits”) that operate from a lower DC supply voltage (for example, 1V), i.e., lower than the relatively high DC supply voltage.
To accommodate such circuits, IC 103 includes an internal linear regulator 112 to generate the low-voltage supply (1V) from the high-voltage supply (3V, as provided by battery 115). Linear regulator 112 drives the 1V supply rail, including a pin to an external capacitor 118.
Often, the actual supply voltage to HV circuits 106 is higher than the level that would support a given performance specification. For example, although HV circuits 106 may only have a minimum operating supply voltage of 2V, it may be supplied by a 3V power source. Assuming that HV circuits 106 consume approximately the same supply current independent of the supply voltage, HV circuits 106 consume about 50% more power than necessary. Similarly, linear regulator 112 consumes approximately two times the power consumed by LV circuits 109.
To reduce the excess power consumption in the IC in FIG. 1, IC 103 in FIG. 2 incorporates a switch-mode DC-DC regulator 121 to drop a higher supply voltage down to a level closer to the minimum voltage actually required by the circuitry. For example, an inductor-based switch-mode DC-DC regulator 121 (using inductor 124 in conjunction with capacitor 118A) is used in the arrangement in FIG. 2 to step down the voltage of a 3V battery 115 to the 2V level appropriate for HV circuits 106.
A switching DC-DC regulator can provide power transfer efficiencies much higher than that of a typical linear regulator. Using a linear regulator to drop the battery voltage from 3V to 2V for HV circuits 106 would have relatively little impact on the power consumed from the battery, while switch-mode DC-DC regulator 121 with, say, 90% efficiency, would reduce the battery power drain by approximately 26%.
In IC 103 of FIG. 2, switch-mode DC-DC regulator 121 is used to generate the HV supply (2V) used by both HV circuits 106 and linear regulator 112, which generates the LV supply. By reducing the supply voltage to linear regulator 112, switch-mode DC-DC regulator 121 reduces the power loss in linear regulator 112 relative to the arrangement in FIG. 1. Linear regulator 112 in FIG. 2, however, still wastes about the same amount of power as consumed by LV circuits 109 (compared to wasting twice the power consumed by LV circuits 109 in FIG. 1).
One way of reducing the power lost in linear regulator 112 is to further reduce its input voltage. However, given that the 2V supply generated by switch-mode DC-DC regulator 121 is limited by the minimum operating voltage of HV circuits 106, switch-mode DC-DC regulator 121 output voltage cannot be further reduced, given the circuit arrangement of FIG. 2.
An alternative arrangement, shown in FIG. 3, uses switch-mode DC-DC regulator 121 to power LV circuits 109 directly from battery 115, i.e., keep HV circuits 106 powered directly from external battery 115. In this arrangement, switch-mode DC-DC regulator 121 generates the 1V supply for LV circuits 109, while HV circuits 106 operate directly from 3V battery 115. Although the power consumed by HV circuits 106 does not benefit from using switch-mode DC-DC regulator 121, the power loss of a linear regulator (as shown in FIGS. 1-2) is eliminated and replaced by a smaller power loss in switch-mode DC-DC regulator 121.
Depending on the relative power consumption of HV circuit 106 and LV circuits 109 and their operating supply voltages, some ICs might benefit more from the arrangement shown in FIG. 2, while other ICs might benefit more from the arrangement shown in FIG. 3. For example, if the HV circuits' power consumption is much larger than the LV circuits' power consumption, using switch-mode DC-DC regulator 121 to generate the supply to HV circuits 106 provides a larger benefit, as the power saved in HV circuits 106 would exceed the potential power savings of the arrangement in FIG. 3. Conversely, if the power consumed by LV circuits 109 dominates, the arrangement in FIG. 3 would provide a larger benefit, given that the power saved by eliminating linear regulator 112 would exceed the power loss in HV circuits 106 due to the larger supply voltage provided to HV circuits 106.