Solid-state image sensors have found widespread use in camera systems. The solid-state imager sensors in some camera systems are composed of a matrix of photosensitive elements in series with switching and amplifying elements. The photosensitive sensitive elements may be, for example, photoreceptors, photo-diodes, phototransistors, charge-coupled device (CCD) gate, or alike. Each photosensitive element receives an image of a portion of a scene being imaged. A photosensitive element along with its accompanying electronics is called a picture element or pixel. The image obtaining photosensitive elements produce an electrical signal indicative of the light intensity of the image. The electrical signal of a photosensitive element is typically a current, which is proportional to the amount of electromagnetic radiation (light) falling onto that photosensitive element.
Of the image sensors implemented in a complementary metal-oxide-semiconductor (CMOS)- or MOS-technology, image sensors with passive pixels and image sensors with active pixels are distinguished. The difference between these two types of pixel structures is that an active pixel amplifies the charge that is collect on its photosensitive element. A passive pixel does not perform signal amplification and requires a charge sensitive amplifier that is not integrated in the pixel.
FIG. 1A illustrates one embodiment of a conventional pixel structure used within a synchronous shutter image sensor. A synchronous shutter image sensor is used to detect the signal of all the pixels within the array at (approximately) the same time. This is in contrast to an asynchronous shutter image sensor that may be implemented with a 3T (three transistor) or 4T (four transistor) pixel structure that does not include a sample and hold stage. Such an asynchronous shutter image sensor outputs the state of a pixel at the moment of read out. This gives movement artifacts because every pixel in the array is not sensing a scene at the same moment.
The pixel structure of FIG. 1A that is used in a synchronous shutter image sensor includes a light detecting stage and a sample and hold stage. The light detecting stage includes a photodiode, a reset transistor and a reset buffer (e.g., a unity gain amplifier). The sample and hold stage includes a sample transistor, one or more memory capacitors (represented by the capacitor C in FIG. 1A), a sample buffer and a multiplexer, i.e., switch or select transistor coupled to a column output of the pixel array.
FIG. 1B illustrates one conventional circuit configuration of the synchronous pixel of FIG. 1A. The reset transistor of the light detecting stage is used to reset the pixel to a high value, and then the voltage on the gate of the source follower transistor M1 starts dropping due to the photocurrent generated in the photodiode. The source follower transistor M1 operates as a unity gain amplifier to buffer the signal from the photodiode. The sample and hold (S&H) stage of FIG. 1B “sample” loads the voltage signal of source follower transistor M1, through the sample transistor, on the memory capacitor (Cmem). The voltage signal from the source follower transistor MI will remain on the memory capacitor when the sample transistor is turned off.
Before that, however, the switch, or pre-charge, transistor briefly unloads the Cmem capacitor. The voltage (Vmem) applied to the back plate of Cmem may be a fixed voltage, but in practice, a varying voltage for Vmem may help to shift the voltage on the memory node, so as to drive the source follower transistor M2 in a more suitable regime. A potential problem with the pixel structure illustrated in FIG. 1B is with respect to current leakage that may cause a loss of stored information. In particular, the sample capacitor Cmem charge may leak to ground (GND) through the pre-charge transistor. For the pixel shown in FIG. 1B, when the pre-charge transistor is off, this means that the gate of the pre-charge transistor is at logical “0” (e.g., GND) and the gate-source voltage (VGS) of the pre-charge transistor is zero. A CMOS process, utilizing metal-oxide-semiconductor field-effect-transistors (MOSFET), is typically used to implement pixel structures currently used in image sensors. With deep submicron CMOS technologies, the MOSFET drain current at VGS=0 is not really zero and, therefore, a significant current leakage (Ioff) can occur when the pre-charge transistor is off that results in the memorized voltage on the sample, or memory, capacitor Cmem leaking away. Such leakage current Ioff results in a loss of the stored information with even fA leakage potentially affecting the signal that is output to the column of the pixel array. As such, the pixel structure of FIG. 1B may not optimal for long (e.g., a fraction of a second or longer) memory times.