Some computing devices include two or more levels of memory organized in a multi-level memory hierarchy. In some of these computing devices, some or all of the levels of the multi-level memory hierarchy are implemented using different types of memory (i.e., memory circuits having different architectures, circuit structures, organization, etc.). For example, multi-level memory hierarchies may include some or all of dynamic random access memory (DRAM) or die-stacked DRAM, phase-change memory (PCM), non-volatile memory (NVRAM) such as flash, etc. Each type of memory has various characteristics, benefits, and limitations. For example, some types of memory, such as DRAM, enable faster memory accesses, but consume more electrical power, are more expensive, produce more heat, etc. As another example, some types of memory, such as flash memory, are cheaper and more scalable, but are slower to access.
In some cases, pages of memory (e.g., 2 KB blocks of data, instructions, etc.) may be stored in levels of multi-level memory hierarchies for which the corresponding type of memory is less than optimal for storing the page of memory. For example, a page of memory that is accessed often may be stored in a slower type of memory—thereby requiring more time for accesses than if the page of memory was stored in a faster type of memory. Because efficient operation of memory is an important aspect of the overall operation of computing devices, the storage of pages of memory in multi-level memory hierarchies is a concern.
Throughout the figures and the description, like reference numerals refer to the same figure elements.