The present inventive concepts relate to memory modules, and more particularly, to memory rank remap logic and memory page remap logic in a volatile memory.
A volatile memory module such as a dynamic random access memory (DRAM) module is a key component of modern day computer servers and other computing systems. DRAM modules are known to fail after running for a certain amount of time. Upon failure, the computer server gives an error message in an error log indicating that the failed module has failed. Such a failure typically requires that the DRAM module be replaced with a new module. This requires that the computer server be taken out of service, powered down, and the faulty DRAM module removed and replaced. Not only does this cause down-time for the computer server, which results in interruption to computing processes, but the total cost of ownership also increases due to the cost of the replacement parts. Such events can cause significant disruption to businesses and individuals who rely on computing power for a wide array of tasks.
Moreover, most failed DRAM modules have only a single failure of a memory rank (sometimes referred to as a memory bank), yet conventionally, the whole DRAM module must be replaced. The failure of the memory rank can result in gaps in the address space corresponding to the portion of the address space mapped to a faulty rank, thereby rendering the entire DRAM module inoperable. Embodiments of the present inventive concept address these and other limitations in the prior art.