As feature size decreases and transistor density increases, the heat flux of integrated circuits increases and thermal management becomes more difficult. Integrated circuits or ‘chips’ generally do not have uniform distribution of circuitry and certain regions of the chip tend to generate more heat than others. These ‘hot spots’ or regions of higher heat typically have the highest temperatures. Thermal management strives to maintain the temperature of the chip below a certain threshold to minimize the likelihood of failure or degraded performance. The hot spots require a higher level of thermal management to maintain the chip at or below the threshold.
Most thermal management solutions remove heat from the entire chip. Heat spreaders typically distribute the heat from the hot spots to a cooling device. Cooling devices often consist of passive air-cooled heat sinks. Fans may add convective cooling. Active cooling devices such as thermoelectric coolers based upon the Peltier effect may also provide cooling to integrated circuits. Active, chip-scale cooling devices have inherent inefficiencies as they unnecessarily remove heat from areas of the chip having lower heat flux density in addition to the hot spots. In addition, inefficiencies in the active coolers generate additional heat load that the heat sink must remove.
An approach that can selectively cool the hot spots would have an advantage over the full-chip cooling solutions. One possibility includes arrays of individually addressable thermoelectric coolers, but these would increase the costs dramatically.