Direct digital frequency synthesis (DDS) is the process by which a digital frequency synthesizer component may output a stable, precise clock frequency at one of a broad range of possible frequency output values for any number of applications, usually across an integrated circuit chip.
In the past, combination analog-digital integrated circuits were either prohibitively expensive, of poor quality, or simply non-existent. However, recent advances in semiconductor processing and manufacture, such as CMOS, BiCMOS, Silicon on insulator (CMOS SOI) and SiGe have made economical, high-quality mixed-signal circuits a reality. More importantly, deep-submicron CMOS has allowed integration to unprecedented levels with single chip radios that include RF, analog, MODEM, applications processor, memory and peripheral interfaces, all on a single IC. Second generation cellular communication and onwards have placed increased demands on digital frequency synthesizers due to their stringent phase noise requirement, tuning range and band coverage especially for fourth generation cellular standard commonly referred to as LTE. One resolution bottleneck relates to the quality of the output signal produced by the frequency synthesizer demanding very stringent phase noise in low-voltage CMOS processes. Accordingly, novel circuit designs and approaches are needed to improve the output signal quality of digital frequency synthesizers, which translates into more stringent requirements for lower phase noise in the output signal and larger tuning bandwidth across multiple bands.