This invention relates generally to operational amplifier (op-amp) circuits and more particularly to those op-amp circuits in which the op-amp has high output impedance and/or low output current driving capability.
Op-amps are widely used in numerous circuit applications. One application is to precisely amplify a known voltage level, such as a fixed, temperature compensated bandgap voltage or other fixed reference voltage, to generate different desired voltage levels. These different voltage levels can be used, for example, as bias voltages within an integrated circuit. An op-amp circuit for precisely amplifying an input voltage by a predetermined positive factor, which is well known in the art, is shown in FIG. 1. An op-amp 10 has a positive input 12 for receiving an input voltage V.sub.IN, a negative input 18, and an output 14 for providing the desired output voltage, V.sub.OUT. A resistive feedback network includes resistors R1 and R2, which determine the positive closed-loop gain of the op-amp circuit. Resistor R2 is coupled between the output node 14 and the negative input 18, and resistor R1 is coupled between the negative input 18 and a reference voltage source at circuit node 16. The reference voltage is typically ground, but can be set to other voltage levels depending upon the application.
Assuming that op-amp 10 shown in FIG. 1 is an ideal op-amp, the following simplifying assumptions can be made: the voltage differential between the positive and negative inputs 12 and 18 of the op-amp 10 is zero; the open loop gain is infinite; the input impedance is infinite; the output impedance is zero; and the output driving capability is infinite. Under these ideal conditions, the output voltage of op-amp 10, V.sub.OUT, is a non-inverting function of the input voltage V.sub.IN as follows: EQU V.sub.OUT -V.sub.REF =(V.sub.IN -V.sub.REF).times.(R1+R2)/R1 [1]
The transfer function is thus dependent upon the ratio of resistors R1 and R2, which makes the op-amp circuit suitable for fabrication on an integrated circuit.
One simple transistor-level implementation of the op-amp circuit of FIG. 1 is circuit 20 shown in FIG. 2. Circuit 20 includes a simple differential amplifier that provides the relatively high gain of the op-amp. The differential amplifier includes emitter-coupled transistors Q1 and Q2 in the well known differential pair configuration. The base of transistor Q1 is the positive input of the op-amp, the base of transistor Q2 is the negative input of the op-amp, and the collector of transistor Q2, which is coupled to load resistor R.sub.L at circuit node 32, is the output of the op-amp. Bias current, I.sub.BIAS, for transistors Q1 and Q2 is provided by current source 22. A buffer stage 28 has an input coupled to the load resistor R.sub.L and an output that forms the output of the op-amp at circuit node 14. The buffer stage 28 has a high input impedance and a low output impedance, which buffers the loading of the feedback resistors R1 and R2 on circuit node 32. In addition to the buffer stage 28, other gain stages can be included to increase the overall open-loop gain of the op-amp. The feedback resistors R1 and R2 are coupled to the negative input and the output of the op-amp as shown in FIG. 1 to provide a non-inverting gain that is a function of resistors R1 and R2.
The following two circuit examples using circuit 20 illustrate the loading effects of the feedback resistors R1 and R2 on the output of the op-amp. (The following two examples are merely illustrative of the loading effect and any number of op-amp circuit configurations or operating conditions could be presented.) Assume in a first example that an ideal output section 28 is included in op-amp circuit 20 (infinite input impedance and zero output impedance, as well as infinite current drive capabilities) and the following circuit component values and operating conditions exist:
V.sub.DD =10V
V.sub.REF =0V
R.sub.L =10K .OMEGA.
R.sub.2 =1K .OMEGA.
R.sub.1 =1K .OMEGA.
V.sub.IN =2.5V
I.sub.BIAS =1 mA
The closed loop gain of op-amp circuit 20 is therefore two and the output voltage is equal to five volts.
Since the base-emitter voltage of the transistors Q1 and Q2 are approximately equal, the current supplied by the current source 22 divides equally between the two transistors, i.e., 500 .mu.A flows through each transistor. Therefore, the voltage drop across the load resistor R.sub.L is 500 .mu.A.times.10K.OMEGA.=5 volts, and the corresponding voltage at the collector of transistor Q2 (circuit node 32) is also 5 volts (10 volts at V.sub.DD minus 5 volts across load resistor R.sub.L). The voltage at circuit node 32 is buffered at the output node 14 by output section 28. Output section 28 delivers all of the current required by the feedback resistance network (I.sub.F), which is equal to: EQU I.sub.F =(V.sub.OUT -V.sub.REF)/(R2+R1)=5V/(1K.OMEGA.+1K.OMEGA.)=2.5 mA [2]
Note that the current I.sub.32 supplied at circuit node 32 to the input of the buffer is zero.
For ease of implementation on an integrated circuit, however, and to conserve integrated circuit area, the output section 28 can have limited current drive capability and/or high output impedance. Sometimes the output section 28 is eliminated entirely, especially on an integrated circuit that has a multiplicity of other functions, due to the size consumed by the output section. In this case, node 32 is shorted directly to the output node 14. A simple op-amp is therefore the differential amplifier including only transistors Q1 and Q2, current source 22 and load resistor R.sub.L.
In the following second example, output section 28 is eliminated and circuit node 32 is shorted directly to output node 14. The current through the load resistor is labeled I.sub.RL, the current supplied by the collector of transistor Q2 is labeled I.sub.Q2, and the current at the output of the op-amp is now equal to I.sub.F, which is the current required by the feedback network. The following equations describe the new operating condition: EQU I.sub.RL =I.sub.Q2 +I.sub.F [ 3] EQU I.sub.RL =(V.sub.DD -V.sub.OUT)/R.sub.L [ 4] EQU I.sub.F =(V.sub.OUT -V.sub.REF)/(R1+R2) [5]
Rearranging the terms in equations [3]-[5] yields a single equation for calculating the output voltage: EQU V.sub.OUT =((R.sub.L .times.(R1+R2))/ (R.sub.L +R1+R2)) .times.((V.sub.DD /R.sub.L)+V.sub.REF /(R1+R2)-I.sub.Q2) [6]
For the same operating conditions as set forth above in the first example, the elimination of the output section produces a new output voltage equal to 2.27 volts, which is unacceptable for use as a precision reference or bias voltage. Note also that the output voltage expression is a function of the load resistance, the current flowing through the collector of transistor Q2, and the positive power supply voltage, all of which can change and affect the accuracy of the output voltage.
Common approaches to solving this problem are to include an output section 28 having a low output impedance and high current driving capability. This solution restores the precision output voltage and the original gain expression, but can consume significant integrated circuit area due to the size of the required output current driving transistors and associated circuitry. Another solution is to increase the resistance of resistors R1 and R2 in the feedback network, which also has similar size problems. In addition, the increased resistance can increase noise. Yet another solution is to increase the bias current I.sub.BIAS, which undesirably increases circuit power dissipation. Each of these solutions require significant additional circuitry, and therefore silicon area, or impose other problems or limitations on the circuit.
Accordingly, a need remains for minimizing the loading effect of the feedback network on the output voltage of op-amp circuits in which the op-amp has a simple output section, or lacks an output section entirely, that is easily fabricated on an integrated circuit and consumes a minimum amount of silicon area.