Digital and analog electronic systems can rely on or use clocks to synchronize operations such as data transfers. In an example, a clock signal can be generated using an oscillator in a phase locked loop (PLL) circuit. A PLL circuit can include, among other things, a phase detector, a charge pump circuit, a loop filter, and a voltage-controlled oscillator (VCO). The phase detector can compare reference phase or frequency information from a reference clock with a feedback clock signal from the PLL circuit's VCO. Based on the comparison, the phase detector can provide an output signal that includes information about a mismatch between the phase or frequency of the feedback clock signal and the reference. The charge pump circuit can receive the output signal from the phase detector and, in response, can cause charge to be added to or removed from the loop filter. As the charge pump circuit changes the charge at the filter, the output phase or frequency of the VCO is changed.
A charge pump circuit can be programmable to provide a range of output levels for the VCO and the PLL. In an example, a charge pump circuit includes multiple stages, or legs, and each of the stages can be selectively operated to provide the charge pump's output. Some parameters of the charge pump circuit can be negatively affected by the programmable nature of the circuit, such as due to the various circuit features used to enable the programmability. One such parameter that can be negatively affected is an output impedance of the charge pump circuit. In an example, an output impedance of a charge pump circuit is low at low gain settings, such as due to parasitic effects of high-current-handling devices in the charge pump circuit. Such reduced or low output impedance can affect the loop filter, and can limit a flexibility or breadth of the PLL circuit's transfer function.