Most electrical systems are digital today and hence require analog-to-digital converters (ADCs) to interface to the outside world. The outside world can either be real world signals such as temperature, pressure, voice, etc., or modulated carriers transmitting information over some medium (analog or digital communication). For all applications, energy efficiency is extremely important and more so for battery operated systems.
Delta sigma architectures are widely used for high resolution, low speed ADCs as well as for medium resolution, high speed ADCs. The continuous time delta sigma modulators (CTDSM) for low speed applications require lower number of bits and are very popular because of their simple design and low power. High speed applications require CTDSM with very high sampling rate. However, the CTDSM loop contains filters, one or more comparators and one or more feedback DACs (digital to analog converters) which contribute to some delay in the loop which is termed as excess loop delay. The excess loop delay modifies the transfer function of the loop thus degrading the stability and signal to noise ratio of the CTDSMs. Thus, for high speed applications, a CTDSM is required which can support high sampling rate.