1. Field of the Invention
This invention relates generally to the design of data processing systems and similar logic structures, and more particularly to an automated design procedure that synthesizes a logic structure in a manner similar to the technique used by a design engineer.
2. Description of the Related Art
The design of digital logic circuits may be considered as a map of nodes and arcs, wherein the nodes are functional in nature and the arcs are connective in nature. For example, the functionality of a node may be that of an adder element, the adder element providing an output signals in response to input signals. The adder element may be technology independent which, in the present context, means that the adder element has no physical characteristics associated therewith and therefore does not define a digital device. The technology independent adder element is, however, functionally correct and can have attributes, such as a shape, for use in drawings, simulation behavior, equivalent gate count, etc. If a digital device, with a defined technology, were available that exactly matched the behavior and the interface characteristics of the adder element, then the digital device could be substituted for the technology independent adder in the design of the circuit. This technique is used in the automated design of digital logic circuits of the prior art where the transformation from technology independent to technology dependent design is accomplished by the substitution of previously designed elements defined by a predetermined technology.
Referring next to FIG. 1, the procedure for synthesizing a logic circuit design according to the prior art is shown. Model definition data structures from a library of component definitions is entered into the data structures associated with the synthesis data base in step 11. In step 12, the information related to the instances of the circuit design, including the connectivity information, is entered in the data base. The instances of the circuit design are generally in a behavioral or functional form when entered in the synthesis data base. The synthesis procedure relates the instances of the circuit design to the model instances in step 13. In step 14, a set of rules for the synthesis procedure is applied to each of the model instances and the model instances are altered and connected in such a way as to maximize certain parameters such as size, path delay, power, etc. In step 15, the resulting circuit design is placed in a format that can control the automated fabrication of the circuit.
The synthesis procedure of the prior art has several disadvantages. In particular, each individual replacement component or instance has a full set of design rules applied thereto, there being no provision to discard unrelated rules. In addition, the application of a rule typically results in a one to one replacement of circuit instances. A need has been felt for a synthesis procedure that does not apply inapplicable rules and which has a flexibility in replacement of instances during the procedure that is more analogous to the techniques used by design engineers. In particular, a need was felt for a synthesis procedure implemented with a rule structure that can be conveniently utilized and that does not require excessive interpretation.