In recent years, along with rapid development of display technologies, thin-film transistors for driving and controlling pixels are also in development, and have been developed as oxide thin-film transistors from amorphous-silicon thin-film transistors and low temperature poly-silicon thin-film transistors.
Oxide thin-film transistors have excellent characteristics of electronic mobility, ON-state current, switching characteristic or the like. Moreover, oxide thin-film transistors also have the advantages such as less characteristic unevenness, low material and process cost, low processing temperature, capacity of utilizing a coating process, high light transmittance, large band gap, or the like. Therefore, oxide thin-film transistors can be used for display devices which need a rapid response and a large driving current, e.g., liquid crystal displays, organic light emitting displays or the like with high frequencies, high resolutions and large sizes.
Generally, the oxide thin-film transistor with an etch stop layer needs to be prepared with four masks by four patterning processes. Namely, a gate electrode is formed with a first mask by a first patterning process; a gate insulating layer is formed; an active layer is formed with a second mask by a second patterning process; the etch stop layer is formed with a third mask by a third patterning process; and a source electrode and a drain electrode are formed with a fourth mask by a fourth patterning process. The etch stop layer needs to be prepared, so production cost is increased and possibility of reducing yield is increased.
Currently, there has been proposed a back channel etching process which does not adopt the etch stop layer. FIG. 1(a) to FIG. 1(c) are flow charts of preparing an oxide thin-film transistor by adopting the back channel etching process according to one technology. As shown in FIG. 1(a) to FIG. 1(c), preparation of the oxide thin-film transistor by adopting the back channel etching process needs to be completed with three masks by three patterning processes. Namely, a gate electrode 02 (as shown in FIG. 1(a)) is formed with a first mask by a first patterning process; a gate insulating layer 03 (as shown in FIG. 1(b)) is formed; an active layer 04 (as shown in FIG. 1(b)) is formed with a second mask by a second patterning process; and a source electrode 05 and a drain electrode 06 (as shown in FIG. 1(c)) are formed with a third mask by a third patterning process.
If the number of the masks can be further reduced, a preparation process of the oxide thin-film transistor can be simplified, and preparation cost can be reduced.