For the purpose of miniaturizing an electronic device, a multilayer wiring board has recently been adopted to construct an electronic circuit for high density mounting of an electronic component. In terms of a wiring pattern of each layer of the multilayer wiring board, a multilayer wiring pattern satisfying electric performance may be obtained by inputting circuit data to computer-aided design (CAD) for aiding in designing the multilayer wiring board.
However, the mechanical performance of a finished component mounting board varies with a material of each layer of a multilayer wiring board or a width of a wiring pattern, that is, a difference in the survival rate of a copper foil portion of a wiring pattern, a difference in the rigidity of an internally mounted electronic component, via hole positions, the number of via holes, a component mounted to a surface, a component mounting method, and the like. Specifically, there is possibility that the curvature beyond the limit will occur in a multilayer wiring board, and a malfunction will occur in the multilayer wiring board due to external force or temperature variation.
As is seen from the prior art (Patent Literature 1) for a multilayer wiring board, three-dimensional models of layers are created from a pattern corresponding to an external geometry of the board and thickness data. A solid model of the entire board is created by overlapping and accumulating the three-dimensional models of layers. When external force or temperature variation is applied to the solid model, it is determined whether geometric variation in the solid model is deformation in an allowable range. If the geometric variation in the solid model is deformation out of the allowable range, the multilayer wiring board satisfying the mechanical performance is designed by feeding back the deformation to a design step based on the CAD.
The idea of the above “solid model” itself is the theory established and adopted in the field of the stress analysis of various kinds of three-dimensional industrial components, and is described in detail in Non-Patent Literature 1 and the like.    Patent Literature 1: Japanese Patent Unexamined Publication No. 2004-13437    Non-Patent Literature 1: “Finite Element Method Handbook I Basic Volume”, Kyuichiro Washizu and Hiroshi Miyamoto, BAIFUKAN Co., Ltd., Feb. 25, 1989, Fifth Impression of First Edition