An electronic module comprises an array of electronic components connected to a printed-circuit board or PCB.
These electronic components are:
passive components 22 of the connector, capacitor, resistor, transformer or inductor type, provided with connection elements that are placed on the sides of the body of the component;
electromechanical components etched into the silicon and known by the name MEMS (Micro-ElectroMechanical systems), etc. provided with connection pads intended for surface mounting, or else:
semiconductor electronic components, otherwise called active components or “chips”.
It is known to encapsulate these active components in packages provided with external outputs for these packages having dimensions generally 1.2 to 5 times larger than the bare chip, thus making it easier to be manipulated. The bare chip is connected to a substrate which is itself placed in the package, the package having its own external connection system. The encapsulation in packages makes it possible notably to carry out test procedures on the chip, thereby considerably increasing the fabrication yield of circuits on which they are mounted.
Various types of packages are known in the prior art, namely leaded packages 24 and ball grid array or BGA packages 23. These packages are intended for surface mounting on a substrate.
In certain cases, these electronic components are connected by applying solder, the solder generally consisting of a metal alloy of the tin-lead or tin-silver-copper type for example. However, for certain, mainly high-temperature applications (oil services industry, drive systems for automobiles, aircraft, etc.), soldering is not suitable. This is because the metallurgy of these alloys results in the appearance of layers of intermetallics. The growth of these intermetallics is activated by temperature (Arrhenius law). Accelerated ageing mechanisms in solders occur, resulting in their destruction (for example due to grain coarsening, to intermetallic diffusion, to the formation of brittle intermetallic compounds, etc.).
Moreover, the increase in families of components and the rarefaction of packages for a given active component give rise to a criticality in respect of package terminations. Specifically, the electronic assembly is a heterogeneous system such that, in certain cases, reliability cannot be achieved. For example, ball grid array packages based on SAC105 alloy (melting point Tm=228° C.) are incompatible with packages based on tin-lead terminations (Tm=186° C.) or even tin-silver-copper (SAC305).
In other cases, these electronic components are connected solderlessly to an interconnection circuit. An example of such an interconnection process is described in the patent FR 03/15034. This process comprises notably the assembly of components on a substrate, the external outputs of the components facing the substrate. This substrate may be a temporary substrate intended to be removed. The process then comprises the deposition of a resin layer on the top side of the substrate, making it possible to mold the components and ensure the mechanical retention thereof, the whole assembly thus constituted forming a wafer that may comprise a large number of components arranged in a given number of identical patterns, thus providing a wafer-scale process. The process then includes the surface treatment of the wafer for revealing, on a substantially planar connection surface, the external outputs of the components. These outputs are then connected together according to a predetermined electrical connection scheme, for example by photoetching a metal layer. Several metallization levels may be produced if the routing cannot be accomplished on a single level. This multilevel or multilayer interconnection circuit is constructed on the wafer—there is no PCB circuit. In the case of a wafer-scale process, the wafer is finally diced in patterns for producing as many electronic devices able to withstand high temperature. This process does, however, have the following drawbacks: the interconnection complexity is limited as it is difficult to produce a circuit consisting of more than four layers by an additive deposition technique. In addition, it is impossible to repair a wafer comprising defective molded components.
According to a known variant illustrated in FIG. 1, the fabrication of the wafer 2′ is decoupled from the fabrication of a PCB circuit 1. These are then connected together by means of a silver-based epoxy adhesive 10. However, it is known that the bonding of “tinned” components, such as the external outputs 26, gives rise to wet thermal oxidation that may result in an insulating interface between the tin-based external output 26 (lead, ball, etc.) and the silver-based adhesive 10. To remedy this, it is known that it is necessary to bond to nonoxidizable metals. This is why, before connection, the external outputs 26 of the wafer are covered with a barely oxidizable or nonoxidizable metal or alloy 21, such as gold, and also the contact pads of the PCB circuit (metallized contact pads 11) intended to be connected to the external outputs. This embodiment makes it possible to use a standard PCB circuit but it is not always possible to repair defective molded components in a wafer.