The present invention is related to a novel line driver for applications such as ADSL (Asymmetric Digital Subscriber Line) or VDSL (Very High Speed Digital Subscriber Line).
In the design of line drivers for applications such as ADSL (Asymmetric Digital Subscriber Line) or VDSL (Very High Speed Digital Subscriber Line), power consumption is a critical issue and signal linearity requirements are stringent. Manufacturers are continually looking for solutions to decrease power consumption. At the moment, the DSL chip market is estimated at 50 million chip sets for 2000 (total value of more than 1 billion USD in 2000).
A traditional class AB driver consumes about 1.3 Watt to produce an output signal of 100 mWatt. The power consumption of the class AB driver may be reduced by about 100 mWatt/xcex7 (where xcex7 is the efficiency of the amplifier which typically has a value between 0.05 and 0.10) through use of an active back termination. Such an active back terminated line driver is described in EP-A-0901221.
A class G driver can also be used, including switches and circuitry to monitor the crest factor of the transmitted signal and to appropriately switch between two power supply levels.
A traditional switch mode driver (SW-DRIVER), which consists of a xcexa3xcex94-modulator (xcexa3xcex94), circuitry (SW) to monitor the crest factor of the transmitted signal and to appropriately switch between different power supply levels, a low pass filter (Fl) and a hybrid (HY), less power as digital technology proceeds to deeper submicron technologies. Such a switch mode driver for instance is shown in FIG. 1b of xe2x80x9cBasic considerations and topologies of switched-mode assisted linear power amplifiersxe2x80x9d, IEEE transactions on Industrial Electronics, Vol. 44 No.1 pp 116-123, February 1997. Power consumption is optimized through switching between the different power supply levels. In an improved version of the switch mode driver (SW-DRIVER), the crest factor is monitored in the hybrid (HY). The power consumption may even be further reduced by about 100 mWatt/xcex7 (xcex7 being the efficiency of the amplifier) through use of active back termination.
A switch mode amplifier (digital amp.) in parallel with a linear amplifier (analog amp.) each producing part of an outputted audio signal is disclosed in FIG. 4 of xe2x80x9cA New High-Efficiency and Super-Fidelity Analog Audio Amplifier with the aid of Digital Switching Amplifier: Class K Amplifierxe2x80x9d, (IEEE publication, Nam-Sung Jung, Nam-In Kim and Gyu-Hyeong Cho, 1998) and in WO 98/37731. In the class K amplifier, the linear amplifier (analog amp.) is an independent source, whereas the switch mode amplifier (digital amp.) is controlled by the voltage sensed over the resistor Rsense and consequently is dependent on the current source by the linear amplifier (analog amp.). Also FIG. 2 of xe2x80x9cBasic considerations and topologies of switched-mode assisted linear power amplifiersxe2x80x9d, IEEE transactions on Industrial Electronics, Vol. 44 No.1 pp 116-123, February 1997 and FIG. 3 of xe2x80x9cA Design of a 10-W Single-Chip Class D audio amplifier with Very High Efficiency using CMOS Technologyxe2x80x9d, IEEE Transactions on Consumer Electronics, Vol. 45, No.3, pp 465-473, August 1999 show switched-mode assisted linear amplifiers with a structure and functionality similar to that of the class K amplifier of xe2x80x9cA New High-Efficiency and Super-Fidelity Analog Audio Amplifier with the aid of Digital Switching Amplifier: Class K Amplifierxe2x80x9d, already cited above.
The switching mode line driver is the most power efficient line driver, but is very sensitive for power supply variations (low power supply rejection) and clock jitter. This results in errors in the transmitted signal.
The present invention aims to provide a novel line driver which is linear, stable, and efficient. The output of said driver should be free of errors due to power supply variations and clock jitter.
The present invention comprises in a first aspect a line driver for amplifying an input signal, said line driver comprising:
a first input terminal for receiving said input signal,
a non-linear amplifier connected to said input terminal and arranged to provide a first output signal at a first output terminal,
a digital to analogue converter arranged to transform said input signal to an analogue input signal,
an analogue linear amplifier comprising a second and a third input terminal and a second output terminal, set up as a comparator between a first correction signal provided at said second input terminal and a second correction signal provided at said third input terminal and arranged to provide a second output signal at said second output terminal,
combining means arranged to combine said first output signal and said second output signal to provide a total output signal to an output line,
a first operational amplifier configured to sense the current of said total output signal and arranged to provide a third output signal at fourth output terminal, said third output signal being based on said current and the impedance of the output line, and
a second operational amplifier arranged to subtract said third output signal from said analogue input signal to provide a fourth output signal,
wherein said first correction signal is the total output signal and the second correction signal is said fourth output signal.
Preferably, the proportion of the first output signal in the total output signal is at least 95%.
The line driver of the present invention can be further characterised in that the non-linear amplifier is selected from the group consisting of switching mode amplifiers, clipping amplifiers, G, B or K-class amplifiers and pulse modulation amplifiers, and in that the linear amplifier is selected from the group consisting of class A and AB amplifiers.
The combining means preferably comprise a hybrid.
The input signal can be generated by a DMT.
In a preferred embodiment, the line driver of the present invention further comprises an active back termination circuit.
A second aspect of the present invention comprises a method for amplifying an input signal, comprising the following steps:
providing a line driver according to the present invention,
feeding said line driver at the input terminal with said input signal,
a first amplifying step, comprising amplifying said input signal with the non-linear amplifier and providing the first output signal at the first output terminal,
a second amplifying step, performed in parallel with said first amplifying step and comprising a digital to analogue conversion of the input signal to an analogue input signal, sensing the current of the total output signal and the impedance of the output line with a first operational amplifier to provide a third output signal, comparing said analogue input signal with said third output signal using a second operational amplifier to provide a fourth output signal, and comparing said fourth output signal with said total output signal using an analogue linear amplifier, providing a second output signal at the second output terminal, and
a combination step comprising combining said first output signal with said second output signal to obtain the total output signal to the output line.
Said combination step can be performed using a hybrid.
The input signal can be generated by a DMT.