The industry recognized T0-220 power transistor package is well known for its relatively high power dissipation and has become very popular as a standard power device package. It originally appeared in a three pin configuration used for power transistors. Such power transistors were rated at up to 60 watts dissipation for T.sub.C =25.degree. C. Later a five pin version became popular for integrated circuit devices.
The five pin T0-220 package is almost ideal for housing voltage regulators of the switching variety. The device contains a high current switch along with an oscillator and pulse width modulator that can operate the switch and vary its duty cycle as a function of a feedback or control voltage input. When this device is combined with a relatively few eternal parts it can provide a regulated d-c voltage output. For example, it can provide an up-converter or boost function in which the regulated output exceeds the input supply voltage. It can further be employed in buck converter mode where the output voltage is substantially lower than the output and as positive-to-negative or negative-to-positive polarity converters. Finally, it can be used in conjunction with a transformer which not only isolates the output, but can be employed to provide relatively large regulated output voltages. In terms of power supply efficiency switching regulators can operate at about 90% or better.
FIG. 1 illustrates the prior art boost switching regulator in the form of a combined block-schematic diagram. An input voltage V.sub.IN is applied between + terminal 10 and ground terminal 11. The IC chip elements are shown within dashed outline 12 and the chip pads are diagrammed as squares.
The heart of the circuit is a power switching transistor 13 which is operated by driver amplifier 14. An oscillator 15, operating in the vicinity of 10-100 kHz, controls the switching rate of the circuit and provides two outputs. A narrow pulse output on line 16 applies a reset pulse to flip flop 17 the Q output of which is applied to driver 14. An oscillator ramp output on line 18 is fed to the noninverting input of duty cycle comparator 19, the output of which is coupled to the set input of flip flop 17. Elements 15, 17 and 19 form a pulse width modulator which will control the duty cycle of switch 13 as a function of the d-c potential at the inverting input of duty cycle comparator 19.
An inductor 21 couples the collector of switch transistor 13 to the power supply at terminal 10. Rectifier 22 in conjunction with capacitor 23 peak rectifies the potential produced at the collector of switch transistor 13 and a filtered d-c output is available at terminal 24. In view of the relatively high frequency of oscillator 15, a modulator value capacitor 14 provides excellent filtering. In a boost type of circuit the d-c voltage at terminal 24 is higher than the power supply voltage at terminal 10.
Resistors 25 and 26 divide the output voltage by a controlled ratio and apply it to the inverting input of error amplifier 27. A reference potential, V.sub.REF, is applied to the noninverting input at terminal 28. This reference potential is provided by a well-known band gap circuit (not shown) which produces a temperature stable 1.23 volts. The output of error amplifier 27 is coupled to the inverting input of comparator 19. This completes the voltage regulator feedback loop. A compensation capacitor 29 and resistor 30 bypass the output of error amplifier 27 so that the feedback loop has the gain and phase margin needed for stability.
In operation the switching duty cycle will be varied until the voltage across resistor 26 equals V.sub.REF at terminal 28. Thus, the stable operating condition produces a V.sub.OUT of: ##EQU1## where R.sub.25 and R.sub.26 are the values of resistors 25 and 26.
The value of inductor 21 is chosen so that the inductor current changes a fraction of its average D.C. value when it is charged and discharged. When switch 13 is on the inductor current will rise linerly with time. Then, when switch 13 turns off the inductive kick back will pull the potential at the collector of switch 13 up until diode 22 conducts to charge capacitor 23 which develops the d-c output. Thus, the positive excursion of the collector of switch 13 is clamped at one diode drop above V.sub.OUT and the negative excursion is clamped at V.sub.SAT.
The circuit of FIG. 1 will maintain a constant d-c output over a wide range of d-c supply voltage inputs. For example, when a d-c output of 15 volts is employed the ratio between resistors 25 and 26 will be about 11.2:1. Good output regulation will be maintaind over the input range of 3 to 12 volts in the boost mode.
FIG. 2 is a graph showing the circuit waveforms. Waveform 31 represents the reset pulses on line 16. Waveform 32 is ramp signal on line 18. Dashed line 34 represents the output of the error amplifier 27 which is a d-c potential due to the action of capacitor 29. Waveform 33 is the signal at the collector of transistor 13. The on transition of waveform 33 is initiated by the reset pulse of waveform 31 and terminated by comparator 19 when the ramp intersects line 34. For the condition shown it can be seen that the on duty cycle is relatively short. This is due to the fact that V.sub.OUT is close to V.sub.IN and not much energy is required to charge capacitor 23. This is called a low gain condition.
When the circuit is operated at high gain, where V.sub.IN is a fraction of V.sub.OUT, the condition of waveform 33' develops. Here dashed line 34' is high on the curve of waveform 32' and waveform 33' shows that the duty cycle has increased. This will be required because a lower value of V.sub.IN, will involve more energy being applied to the rectifier circuit to maintain the value of V.sub.OUT. Thus, as the value of V.sub.IN varies waveform 34 will ride up and down on waveform 32 as needed to maintain the regulated V.sub.OUT.
In terms of load regulation, when a varying load causes V.sub.OUT to vary, the same percentage change appears across resistor 26 and the input to error amplifier 37 will also vary. Thus, the duty cycle of the signal applied to transistor 13 will be varied whenever the output voltage is changed, in such a direction to restore the value of V.sub.OUT to its set point. Thus, the output voltage is fully regulated against changes in either load or input conditions. Typically, the regulation is to within about 0.1% or better.
The circuit of FIG. 1 portrays five IC pads. These are: +V.sub.IN, ground, feedback, compensation capacitor and switch collector as indicated. It is clear that such a voltage regulator is well-suited to the five pin TO-220 package. It is also applicable to the industry standard four lead TO-3 in which the metal case is the ground terminal. However, any circuit embellishments that require additional package pins must be avoided.
While the above description applies to a boost type regulator, it is to be understood that the circuit can be used in other modes. For example, it can be used in the flyback, buck and polarity inverting modes. Furthermore, it can be used in conjunction with a transformer for isolation or relatively high voltage outputs.
One basic flaw in the above-described regulator is found in the starting. When the circuit is first started up capacitor 23 will be fully discharged and V.sub.OUT will be zero. Thus, when power is first applied V.sub.REF will dominate the error amplifier 27 and it will rapidly charge cpacitor 29. As shown in FIG. 2 this will maximize the waveform 33' duty cycle and the circuit will attempt to charge capacitor 23 as rapidly as possible. The resulting surge can damage output transistor 13 and may overload the input supply. Accordingly, some form of "soft start" is desirable where the starting surge is avoided.
FIG. 3 shows a typical prior art solution to the soft-start approach. A capacitor 36, transistor 37 and current source 38 have been added to the circuit. During circuit power up capacitor 29 will be initially discharged. When power up is to occur current source 38 will slowly charge capacitor 36, which is chosen to determine the charge time constant. The emitter of transistor 37 will clamp the output of error amplifier 27 to one diode drop above the charge on capacitor 36. Since this charge starts at zero and then rises slowly, comparator 19 does not immediately force the switch duty cycle to maximum. As a result, the circuit start is slow and is regarded as soft. However, as can be seen, this approach requires a second external capacitor and an extra chip bonding pad.