The population of printed circuit boards (PCBs), for example system motherboards or adapter cards, invariably involves the attachment of one or more multi-pin card connectors into corresponding vias (openings) defined in the PCB. Such connectors typically include tens or hundreds of pins each having a diameter which is typically a fraction of a millimeter. In merging such a connector to a PCB, one or more pins can easily become bent or deformed in which case the defective pin may not be correctly placed within the corresponding via. A defective pin, if not detected when the PCB and connector are merged, can lead to the scrapping or reworking of the entire PCB.
It is thus important to verify the proper placement of pins within their respective vias and to this end a number of different techniques have been proposed. The simplest, in terms of cost and complexity, is a visual inspection technique in which the merged PCB/connector is examined to verify that all pins are protruding through the PCB. A bent or deformed pin is thus detected visually by the absence of a pin protruding from the side of the PCB opposite the connector. Although simple in concept, this technique is time consuming and prone to error on the part of the person performing the check.
An alternative technique for verifying the proper placement of components is described in U.S. Pat. No. 5,235,740 (Kroeker et al). In this patent, a test block is provided which serves to support the PCB receiving the electrical component. Provided in the test block are a plurality of electrical probes configured in the same pattern as the vias in the circuit board. If, on merging the circuit board and the connector, a pin becomes bent or deformed and does not pass through its corresponding via to contact the probe, a circuit is made and an indication is provided to the operator. Although this system is more fool-proof than simple visual inspection of absent pins, it suffers from the disadvantages of increased complexity and cost, which are exacerbated when multiple systems are required on a manufacturing line. What is needed is a simple, reliable technique for verifying the proper placement of electrical components on printed circuit boards.