The American National Standards Institute has recently established a new basic standard for high-speed, multiplexed digital data transmission. This is the "synchronous optical network" standard, henceforth referred to as SONET. The SONET standard specifies optical interfaces, data rates, operation procedures and frame structures for multiplexed digital transmission via fiber optic networks.
The International Telecommunications Union (ITU) has adopted the interface principles of SONET and recommended a new global transmission standard for high-speed digital data transmission. This standard is the "synchronous digital hierarchy" (SDH).
For an account of the SDH standard, reference should be made to the report entitled "REPORT OF Q.22/15 MEETING" from "STUDY GROUP 15" of the ITU International Telecommunication Standardization Sector, bearing the document number "Temporary Document 62(3/15)" and the date "Geneva, May 16-27, 1994".
The SDH standard is designed to enable manufacturers to develop telecommunications equipment which:
a) will be interchangeable in all telecommunication networks built around the world to its standard; and which PA1 b) is backwards compatible, i.e. can be used with data which is in the older telecommunications formats used in N.America, Europe and Japan.
This is achieved by a complex hierarchy of so-called "Containers" (C) and "Virtual Containers" (VC), see FIG. 1. The container, e.g. C-4, C-3, C-12, etc., are information structures designed to accommodate data traffic with specific transmission rates. The C-4 carries traffic with a base rate of up to 139 264 kbit/s, the C-3 container carries either up to 44 736 or 34368 kbit/s, etc. The containers are turned into virtual containers by adding Path OverHead information (POH) to it. By procedures defined as multiplexing, mapping, or aligning, data structures are generated which are constitutive to the SDH. These data structures are named "Administrative Unit Groups" (AUG) and "Synchronous Transport Module" (STM). The label of an STM is defined by the number of AUGs it carries: a STM-4 contains for example four AUGs. An AUG contains either one "Administration Units" (AUs) of type 4 or three AU-3. Referring to the simplest cases, in turn one AU-4 contains one C-4 signal and one AU-3 carries one C-3 signal.
The SDH/SONET data frames, i.e., the STM-N signals, are 125 micro-seconds long. The amount of data transmitted in each frame depends on the hierarchy level N of the signal. The higher hierarchical levels are transmitted at higher data rates than the basic STM-1 level of approximately 155 Mbit/s. (The exact transmission rate is defined as 155.52 Mbit/s. However here and in the following transmission rates are often denoted by their approximate values. This in particular due to the fact that the exact data transmission rates are distorted by overhead data traffic and idle cell stuffing.) The integer N indicates how many times faster the data is transmitted than in the STM-1 level. For example STM-4 denotes a data transmission rate of 622 Mbit/s, whereby each data frame contains four times as many bytes as does a frame of STM-1. The highest defined level is STM-64, which has a data rate of 9.95 Gb/s. Clearly, each part of the STM-N signal is broadcast in the same time as the corresponding part of an STM-1 signal, but contains N times as many bytes.
The STM-1 signal, as shown in FIG. 2, contains an information rectangle of 9 rows with 270 bytes/row corresponding to a SONET/SDH data rate of 155.52 Mbit/s. The first 9 bytes/row represent the "Section OverHead", henceforth SOH. The remaining 261 bytes/row are reserved for the VCs, which in FIG. 1 is a VC-4. The first column of a VC-4 container consists of the "Path Overhead" (POH). The rest is occupied by the payload (a C-4 signal). Several VCs can be concatenated to provide a single transmission channel with a corresponding bandwidth. For example, four VC-4 in a STM-4 signal can be concatenated to form single data channel with approximately 600 Mbit/s capacity: in this case the four VC are referred to in the standard terminology as VC-4-4c and the signal as STM-4c.
This flexibility of the SDH standard is partly due to the pointer concept: In SDH, the frames are synchronized, but the VCs within them are not locked to the frames. So the individual containers of the SDH signals do not have to be frame aligned or synchronized amongst each other. A "pointer" is provided in the Section Overhead which indicates the position of the above introduced POH, i.e., the start of a virtual container in the SDH frame. The POH can thus be flexibly positioned at any position in the frame. The multiplexing of information into higher order SDH frames becomes simpler than in the old data standards, and an expensive synchronization buffer is not required in SDH. Similarly, lower order signals can be extracted out of and inserted into the higher order SDH signals without the need to demultiplex the entire signal hierarchy. The pointers are stored in the fourth row of the Section Overhead.
The Section Overhead is further subdivided into: (i) The "Regenerator Section Overhead" or RSOH. This contains bytes of information which are used by repeater stations along the route traversed by the SONET/SDH Signal. The Regenerator Section Overhead occupies rows 1-3 of the Section Overhead. (ii) The "Multiplexer Section Overhead" or MSOH. This contains bytes of information used by the multiplexers along the SONET/SDH signal's route. The Multiplexer Section Overhead occupies rows 5-9 of the Section Overhead. These sections of the overhead are assembled and dissembled at different stages during the transmission process. FIG. 2 also shows an exploded view of the MSOH.
In the parallel SONET system, a base signal of 51.84 Mbit/s is used. It is called the Synchronous Transport Signal level 1, henceforth STS-1. This has an information rectangle of 9 rows with 90 bytes/row. The first three bytes/row are the section overhead and the remaining 87 bytes/row are the "synchronous payload envelope", henceforth SPE. Three of these SPEs fit exactly into one Virtual Container-4. Thus signals in the STS-1 signal format can be mapped into an STM-1 frame. Furthermore, frame aligned STS-1 or STM-1 signals can be multiplexed into higher order STM-N frames.
In general, any lower data rate signal which is combined with other such signals into new data frames of higher rate is referred to as a "tributary" signal. For example in the previous paragraph, the three STS-1 signals which are combined into one STM-1 signal are tributary signals. It may be noted that the scope of the term tributary in this description exceeds the standard definition, as it is also used to describe the inter-level signal mapping in SDH.
The present invention relates to a data processing module for mapping data, i.e. tributaries, into and out of the SDH/SONET formats. The data processing achieved with the present invention concerns in particular the compilation of data which is at relatively low data rates into standard data frames of relatively high data rate, and vice-versa.
Some manufacturers have already put data processing modules on the market which conform to the SDH/SONET standards. Amongst these prior art arrangements are a number of electro-optical transceiver modules designed by large carrier operating companies or their suppliers to connect the existing proprietary equipment to SONET/SDH. Other companies, mainly chip manufacturers offer SONET/SDH processor ASICs or chip sets, which interface tributary signals to signals in the STM-1 format. The chip family provided by PMC SIERRA and known as PM53XX family may exemplify such a set. The known sets have severe disadvantages, which prevent a truly modular approach as achieved by the current invention. The chip used for mapping ATM 155 Mbit/s traffic into a STM-1 signal combined with three other chips of its kind is not sufficient (and with an appropriated interconnection) to generate a STM-4 signal. The known arrangement of transceivers requires an additional complex and expensive chip which multiplexes the tributaries into the STM signal and derives those part of the SOH and POH which relate to the whole frame or to a whole container, e.g. the POH byte B3 and the SOH byte B1. Additionally, certain functions in the four chips must be disabled to allow them to be combined, and these prevent each from functioning any longer as an STM-1 interface. Further, the arrangement can only interface separate incoming data signals, e.g. ATM 155 Mbit/s signals, to STM-4. It fails when having to map a single incoming data stream, such as the ATM 622 Mbit/s data signal, to an STM-4c signal.
In summary, the available prior art SONET/SDH interface ASICs are primarily intended to interface signals to one particular STM-N level. Dedicated and expensive chips are used in the rare cases where a partially modular approach into higher levels of the SDH hierarchy is attempted. Another example representing the known devices is described in the U.S. Pat. No. 5,257,261. In this patent, apparatus and methods for concatenating a plurality of lower level SONET signals into higher level SONET signals are provided. In the described arrangement of at least three lower level signal processing apparatus, one of which serving as master apparatus, a specific byte of the POH (J1 byte) is used to synchronize the reading of the data stream of each apparatus. The apparatus is capable of calculating the B3 byte, which is a parity check byte calculated over all bits of the VC of the previous SONET/SDH signal. Each lower level apparatus is connected to its adjacent apparatus by one bus to transmit a J10Rcomposite signal, one bus for the J1ANDcomposite signal, one bus for the (receive) rxJ1 signal, and further two busses by which the master apparatus issues receive (rxSPE) and transmit (txSPE) signals to coordinate the reception and transmission of SPEs, which correspond within the SONET standard to the above described VCs. For the calculation of the B3 byte in the reception mode and in the transmission mode, adjacent apparatus are connected by an additional pair of lines.
In view of the known prior art, it is object of the current invention to provide a apparatus for generating SONET/SDH compliant signals out of arbitrary tributaries. Arrangements of this apparatus should be scalable to any level of the above standards restricting the additional amount of interconnection and hardware within such an arrangement to what can be regarded as being absolutely necessary.