During manufacture of an electrical or opto-electronic package, electrical or optical devices or integrated circuits are frequently attached to a substrate. This is often accomplished by forming bond pads on the electrical or optical device or integrated circuit. The bond pads are placed in contact with corresponding portions of the substrate that have solder bumps or solder balls. A heating step then causes the solder to reflow and attach the device to the substrate.
The formation of the solder bumps is a critical step in the manufacturing processes used in fabricating the packages; manufacturing processes frequently require both accurate dimensions and placement of the solder bumps, and several techniques have been developed for the formation of the solder humps. An exemplary technique is a lift-off process. In this technique, a resist layer is formed on the substrate and patterned to form windows which expose selected portions of the substrate. The solder hump material is deposited on the substrate by, for example, sputtering. The resist is then lifted off by immersion of the substrate and resist in a solvent which attacks the exposed portions of the resist in the sides of the windows and ultimately removes all of the resist, as well as the metal on the resist, from the substrate. The lift-off is facilitated with windows having a negative taper; that is, the windows are bigger at the bottoms than they are at the tops. The negative taper exposes more resist to the solvent than does a window with no taper. The lift-off technique suffers from the drawbacks of poor resist adhesion to the substrate and limited solder bump height due to small resist thickness; the solder bump height can not exceed the resist thickness.
Electrodeposition is another technique that has also been used to form solder bumps. Electrodeposition may be done with patterned resists or other patterned insulating surfaces that expose a conducting surface; electrodeposition does not occur on insulating surfaces, but only on conducting surfaces. The areas where solder bumps are to be formed are connected to a current source by patterned conductors on the substrate surface. However, the patterned conductors have a finite resistance which, of course, becomes larger as the dimensions of the conductors shrink. The conductors become smaller as device dimensions decrease and more contacts are made to the devices and integrated circuits. The plating rate, and ultimately the amount of solder plated, at any point is proportional to the electric field at that point. Due to the voltage drop caused by the finite resistance, the electric field is not necessarily the same at all the areas being plated and the solder bumps may have varying heights.
Varying solder bump heights are undesirable liar several reason. For example, self-alignment of devices with respect to the substrate is difficult with bumps having different size; that is, the solder bumps should all have the same amount of solder to permit accurate self-alignment. Additionally, many devices and integrated circuits require alignment only with respect to the plane of the substrate; that is, only with respect to the patterned conductors on the substrate. There are, however, devices, such as lasers, that must be attached to a substrate with accurate alignment in the direction perpendicular to the plane of the substrate; that is, in the z direction. Accurate alignment in the z direction is difficult to obtain if the solder bumps have varying heights.