1. Field of the Invention
The invention relates to a memory circuit having memory cells which have a resistance memory element, wherein the resistance memory element exhibits a bipolar switching behavior.
2. Description of the Related Art
The development of semiconductor memory technology is essentially driven by the requirement for increasing the performance of the semiconductor memories in conjunction with miniaturization of the feature sizes. However, further miniaturization of the semiconductor memory concepts based on storage capacitors may be difficult due to the large quantity of charge that is required for writing to and reading from the storage capacitors which leads to a high current demand. Therefore, thought is increasingly being given to new cell concepts that are distinguished by a significantly lower quantity of charge for the writing and reading operation. Semiconductor memories having a resistance memory element which exhibits a bipolar switching behavior are one such new promising circuit architecture.
One possible memory concept having a resistance memory element is the so-called CBRAM (conductive bridging RAM) cell, in which the resistance memory element comprises an inert cathode electrode, a reactive anode electrode and also a porous, highly resistive ionically conductive carrier material in between. Through application of an electric field between the two electrodes, it is possible to produce a conductive path through the carrier material and to clear it away again. Depending on the polarity of the electrical pulses applied between anode electrode and cathode electrode, the reactive anode electrode is dissolved electrochemically and the metal-rich deposits on the carrier material are intensified, which then leads to an electrically conductive connection between the electrodes, or the electrically conductive connection is resolved again, the metal ions depositing from the carrier material on the anode electrode.
CBRAM memory cells can thus be switched back and forth between a high-and low-resistance state by means of electrical pulses, the different resistance values then each being assigned a logic state. Furthermore, CBRAM cells are distinguished by a low area requirement, which is a minimum of 4 F2, where F is the feature size of the fabrication technology under consideration.
In addition to CBRAM cells, further resistive memory cell concepts are currently being investigated, such as the phase change memory principle (used in phase change RAM, or PCRAM), for example, in which a metal alloy is heated by means of electrical pulses and switched between an amorphous and crystalline phase state in the process. The two states may be distinguished by a difference in their conductivity, which can be utilized for the electrical read-out of the memory cell state. A further resistive memory concept is the perovskite cell, in which, in a perovskite layer, a structure transition between a high- and a low-resistance state is produced by means of charge injection. Amorphous silicon continues to be used as carrier material for a resistance memory element in a resistive memory cell; said amorphous silicon, after a forming step can be switched back and forth between a high- and a low-resistance state by means of electrical pulses. Consideration is also being given at the present time to memory concepts having polymer or organic storage layers in which states having different conductivities can be produced in the layer based on charge transfer complexes that are influenced by electrical pulses.
However, commercial products based on memory concepts having a resistance memory element are as yet not known. Under discussion as an alternative, therefore, is a 1-transistor/1-resistor arrangement arranged at the crossover points of bit and word lines. Although the 1-transistor/1-resistor cell concept is distinguished by an improved isolation of the individual memory cells against interference effects, it is not possible to prevent an interference level at at least one end of the resistance memory element of the memory cell. This has a very unfavorable effect in particular in the case of memory concepts having a low operating voltage, such as the CBRAM memory, in which the memory cells are driven with a low switching voltage of approximately 300 mV. Moreover, the 1-transistor/1-resistor cell concept can only be reduced to an area requirement of 6 F2.
WO 2004/001760 A1 discloses a memory circuit having memory cells which are connected in series between a plate line and a bit line and in each case have a capacitive memory element having an anode electrode and a cathode electrode, the memory element having a bipolar switching behavior and having a drive transistor connected in parallel with the memory element. The drive transistors of the memory cells are connected to a word line in order to switch the drive transistor on and off in such a way that a current path can be formed either via the associated drive transistor or via the associated capacitor. Furthermore, a changeover switch is arranged at one end of the series of memory cells in order to produce a connection between the series-connected memory cells and the bit line.
WO 2004/017328 A1 furthermore discloses a memory circuit in which the memory cells comprise individual resistance memory elements which are in each case connected up crosswise to the bit and word lines.