As processors and memories to be used in servers and the like, a laminated semiconductor chip in which a plurality of semiconductor chips are laminated is sometimes used for enhancement of performance. As illustrated in FIG. 12, terminals (micro-bumps) 102 in each of which a solder 103 is provided on the top of a cupper pole (a Cu post or a Cu pillar) are formed on a semiconductor chip 101. There is used a method of laminating a plurality of semiconductor chips 101 by bonding the terminals 102 of the plurality of semiconductor chips 101 to each other.
As illustrated in FIG. 13, a paste-like or film-like reinforcement resin 104 is supplied on the semiconductor chip 101, for securing the bonding reliability after the plurality of semiconductor chips 101 are laminated. The paste-like reinforcement resin 104 is called an NCP (Non-conductive Paste), and the film-like reinforcement resin 104 is called an NCF (Non-conductive Film). As illustrated in FIG. 14 and FIG. 15, using a heating header 201 of a semiconductor mounting apparatus such as a flip-chip bonder, terminals 102A and solders 103A of a semiconductor chip 101A push and penetrate the reinforcement resin 104, while the semiconductor chip 101A is heated and compressed. The solders 103A of the semiconductor chip 101A and solders 103B of a semiconductor chip 1016 are bonded, and thereby, the conduction and hardness between the semiconductor chip 101A and the semiconductor chip 1016 are secured.
[Patent document 1] Japanese Laid-open Patent Publication No. 2000-332390
[Patent document 2] Japanese Laid-open Patent Publication No. 2011-66027
[Patent document 3] Japanese Laid-open Patent Publication No. 2015-18897