Dies, such as focal plane arrays, are typically produced collectively in arrays on wafer substrates. Back-end or back-end of line fabrication of focal plane arrays is often performed serially after front-end wafer-level detector processing. Entire wafers are generally front-end processed and singulated, and then back-end processing is performed at a die-level. Back-end processing can include processes such as thinning, polishing, coating, and hybridizing. Typically, thinning, polishing, coating, and hybridizing processes are performed after singulating the wafer into individual dies. Thus, if there are ten arrays on a wafer, the thinning process is performed ten different times, resulting in a time-consuming and expensive processing technique. As a result, a significant portion of focal plane array cost is attributed to the traditional approach of back-end of line fabrication. The traditional approach of wafer-level processing without a carrier has been tried, but has been typically abandoned because of damage that occurs to the backside optical surface during backside processing.
As a result, there is a need for improved techniques for fabricating focal plane arrays for imaging devices such as Group III-V and II-IV compound semiconductors for infrared cameras.