1. Field of the Invention
This invention is related to the field of clocking of integrated circuits and, more particularly, to clock gating in integrated circuits.
2. Description of the Related Art
Digital circuits, including processors, systems-on-a-chip (SOCs), etc., are being designed to be operated at ever increasing frequencies. As the frequencies increase (and the number of transistors on a chip also increases), the power consumption of such circuits increases.
One attempt to manage power in integrated circuits includes clock gating. Generally, at a single, predefined level of abstraction in the integrated circuit, the clocks may be selectively gated based on whether or not corresponding circuitry is in use. By deactivating the clocks, the corresponding digital circuitry may be prevented from switching and thus from consuming dynamic power.