Monitoring power supply current has become an increasingly standard requirement for many circuits and systems, and in particular, for graphics processing units (GPUs), at board or ASIC (Application Specific Integrated Circuit) level. Conventional techniques for monitoring power supply current rely on board level circuits or specially designed voltage regulator modules (VRMs) to provide a signal representing the monitored current. Such signal is often analog in form or digital, e.g., relayed via an I2C (Inter IC) signal bus, as is well known in the art, for the voltage rail for which the current is being monitored (e.g., VCC for bipolar circuits, or VDD or VSS voltages for MOS circuits).
Such conventional techniques are often problematic. For example, such techniques require special or custom board level design or voltage regulator controllers, all of which add to the BOM (Bill Of Material) costs for the overall product and are often impractical for use in a mass production environment. Additionally, static current measurements require calibration, which must be done for each product incorporating the circuitry for which the current is to be monitored (e.g., for each stock keeping unit (SKU) as opposed to the specific ASIC used, which also appears in other products as well). Dynamic current measurement is difficult to calibrate, in many cases impractical, and even after calibration tends to have poor accuracy. Further, such techniques take significant engineering efforts for each and every ASIC released to verify their operation, thereby making their costs prohibitive for incorporation into low and mid-range products.
Additional techniques include using a HALL sensor on the current path or a series sense resistor in the current path. However, HALL sensors must generally be used at the printed circuit board level and tend to be large and costly, and offer limited bandwidth. Series sense resistors are sensitive to variations in device fabrication and temperature, and can potentially reduce the effective voltage of the power supply rail being monitored, as well as increase power consumption and heat dissipation requirements.
Accordingly, it would be desirable to have a technique for monitoring current flow to an IC in a temperature-compensated manner which is not dependent upon individual product designs incorporating the IC to be monitored. Further, or alternatively, it would be desirable to avoid any requirement for adding or using special discrete components, structures or designs within the circuit under test, i.e., to use elements or parameters inherent in the design of the IC being monitored. Further, or alternatively, it would be desirable to have such technique capable of being integrated into the IC, i.e., the die itself, within which the current is to be monitored.