1. Field of the Invention
The present invention relates to analog-to-digital converters, and particularly to sigma delta type converters with multiplexed channels.
2. Description of the Related Art
Digital processing and transmission of electrical signals has become commonplace in many industrial and consumer applications. Applying digital methods to analog information requires an analog-to-digital (A/D) conversion, but the needed linearity, resolution, and speed of such a conversion depends on the application. For example, many industrial control applications require A/D conversion with good linearity and high resolution (12-24 bits) but the necessary conversion or data throughput rate is relatively slow (20 Hz or less); whereas, video applications demand high speed (20 MHz or more) but tolerate lower resolution (8 bits) and poorer linearity. Intermediate speed applications (12 bits, 1-5 MHz) appear in document scanners and facsimile machines.
Industrial control and test and measurement applications typically monitor parameters, such as pressure and temperature, that essentially are slow time varying dc voltage levels. The measurements are performed by using a transducer to sense the physical parameter, such as temperature, and generate an analog electrical signal that the A/D converter transforms into a digital representation for processing in a computer or microprocessor. It is quite common in these applications to have several parameters (2 to 64) that must be sensed, digitized, and processed in a single control cycle, and for 1 to 20 control cycles to occur within one second. Because the A/D converter can be one of the more expensive elements in a system, it is often desirable to use an inexpensive multiplexer in front of a single A/D converter rather than devote an individual A/D converter to each transducer.
There are three types of A/D converters typically used in these industrial control applications: (1) integrating converters with 8 to 16 bit resolution which are inexpensive but slow (usually less than 50 conversions per second) and therefore have limited utility with multiplexers; (2) successive approximation register (SAR) converters with 12 to 16 bit resolution which are much faster and work well with multiplexers, however, these converters with their required sample-and-hold circuit are very expensive; and (3) sigma delta converters with 16 to 22 bit resolution which are inexpensive but slow based on existing architectures and have limited utility with multiplexers. A sigma delta converter capable of high channel count multiplexed operation would offer a very cost effective solution to many measurement requirements.
Sigma delta analog-to-digital converters consist of two major elements, a modulator that oversamples and digitizes an input analog signal, and a digital filter that removes unwanted noise. In low frequency industrial control and test and measurement applications, the filtering operation must remove internally generated quantization and other noise and externally generated line frequency noise.
The known sigma delta converters used for low frequency test and measurement applications have taken the approach of using single or cascaded lowpass digital filters to remove both the internal and external noise in a single operation. The converter throughput rate is typically taken as the lowpass -3 dB down filter attenuation point, and therefore throughput is limited by the lowest frequency signal to be filtered out. In all practical cases for low frequency test and measurement applications, the lowest frequency to be filtered out is the externally generated line noise frequency of 50 or 60 Hz. For these known sigma delta converters, the typical -3 dB point is between 10-20 Hz, resulting in a corresponding throughput rate of 10-20 conversions per second.
For example, see European Patent Application publication No. 0 458 524 A2, published Nov. 27, 1991, which is hereby incorporated by reference. In this publication the digital filter includes summations and subtractions mimicking the sigma delta modulator, and the filter resets at each channel change by the input multiplexer and thereby avoids filter settling time problems.
If input signals are multiplexed into a converter, the throughput rate is further reduced by the number of input channels and, in some cases, other settling/stabilization characteristics of the lowpass filter. Disregarding these stabilization characteristics, the throughput will be reduced by a factor equal to the number of channels. For example, each of eight inputs will have a throughput rate that is eight times slower than the rate for a single input channel.