Designers of integrated circuits constantly strive to extend the voltage range within which the circuit will operate. In the case of circuits constructed only with enhancement mode transistors, extension to low values of the supply voltage is restricted, among other things, by the inability of transistors to turn on sufficiently hard to function properly. In particular, memory circuits use many "bootstrapped" transistors in which the gate of a pass transistor is capacitively boosted to a value above the supply voltage. Since enhancement mode transistors typically are limited to an output that is one threshold voltage below the supply voltage, a circuit that employs only enhancement mode transistors will have more difficulty in coping with a low value of the supply voltage than will a circuit in which depletion mode transistors are available.
In the prior art, a particular limiting factor in the extension of the voltage range to low values has been that of the critically important bootstrapped gate nodes of pass transistors--in particular the Row Select circuit. As the supply voltage (Vcc) drops, this circuit typically fails in conventional prior art circuits at a supply voltage approximately equal to three times the value of the threshold voltage (Vt) that is used in the circuit. In the prior art circuit of FIG. 1, the voltage on gate 11 is precharged to the value Vcc at the end of a memory cycle, by a suitable pulse (greater than Vcc) on gate 22, and then leaks down at a rate set by the stray capacitance and the leakage impedance. If the interval between memory accesses is long, the precharge circuit 20 will effectively not be present.
If it could be guaranteed that the gate of the pass transistor would be at its maximum voltage at the critical time, then the circuit could be used with a reliable safety margin at lower values of supply voltage than is the case in the prior art.