1. Field of the Invention
The present invention relates to a semiconductor device having a so-called SOI (silicon on insulator) structure in which a semiconductor layer is provided on an insulating surface. Further, the present invention relates to a semiconductor display device having an SOI structure on an insulating substrate having a light-transmitting property such as a glass substrate, and a manufacturing method thereof.
2. Description of the Related Art
Integrated circuits using semiconductor substrates called silicon on insulator (hereinafter also referred to as “SOI”) in which a single-crystalline semiconductor layer is formed on an insulating surface instead of using silicon wafers that are manufactured by thinly slicing an ingot of single-crystalline semiconductor are developed. The integrated circuits using the SOI substrates draw attention as semiconductor integrated circuits whose performance is improved by reduction of parasitic capacitance between a drain of a transistor and a substrate.
There are various manufacturing methods of SOI substrates, but an SOI substrate formed by a method called Smart Cut (registered trademark) is known as an SOI substrate with both quality of an SOI layer and easiness in production (throughput). This SOI substrate is formed in the following manner. Hydrogen ions are added to a bond wafer to be a silicon layer and the bond wafer is bonded to another wafer (base wafer) at room temperature. Here, a strong bond is formed by van der Waals' forces at room temperature. After bonding of the base wafer and the bond wafer, a layer to which the hydrogen ions are added is separated by heat treatment at about 500° C., to form a silicon layer over the base wafer.
As an example of semiconductor devices using such an SOI substrate, a semiconductor device invented by one of the inventors of the present invention is known (Patent Document 1: Japanese Published Patent Application No. 2000-012864).
Further, as a method of forming a single-crystalline silicon thin film obtained by utilizing a smart cut method over a crystallized glass which is high heat resistant glass, a method invented by one of the inventors of the present invention is known (Patent Document 2: Japanese Published Patent Application No. H11-163363).
Furthermore, in order to obtain high electron mobility of an n-channel MOSFET and high hole mobility of a p-channel MOSFET in a CMOSFET formed over a silicon wafer, a semiconductor device including PMOS formed on a silicon wafer having a face (110) and NMOS formed on an SOI layer having a face (100) is known (Patent Document 3: Japanese Published Patent Application No. 2006-229047).