The front-end circuits of memory interface receivers have the function of converting the signals received from memories into logic high and logic low signals that can be used by core circuits. The front-end circuits of memory interface receivers are sometimes referred to as amplifiers since they amplify small-swing signals as signals with greater swings.
With the advancement of the memory interface specification, there is an increasingly demanding requirement for improving power supply voltage compatibility so that the front-end circuits may work properly under various power supply voltages, such as 1.5V, 1.2V, and 1.0V. The speed target for the front-end circuits, on the other hand, also increases. Designing the front-end circuits that meet the demanding specification thus becomes more and more difficult. The difficulty in the design is further increased due to the process variations that may cause the shift in threshold voltages in the MOS transistors used in the front-end circuits, and due to the variation in the reference voltages and power supply voltages used by the front-end circuits.
There were some conventionally used front-end circuits of memory interface receivers, such as complementary self-bias differential amplifiers. This type of amplifiers was popular since they do not need bias. Furthermore, with their push-pull characteristic, the rising delay and the falling delay match with each other, resulting in a small duty mismatch. Typically, this type of amplifiers may work at a power supply voltage greater than about 1.8V (for example 1.8V to 2.5V), and the work frequency may be up to about 1 Gbps.
Complementary self-bias differential amplifiers, however, have cascade structures, and may have four MOS transistors cascaded in some circuits. Accordingly, when the threshold voltages of the MOS transistors are high (which may be caused by process variations), there is not enough headroom for threshold voltages. The operation speed is also low.
Conventionally used front-end circuits also include pseudo differential amplifiers, which may be of either p-type or n-type. Again, this type of front-end circuits were popular since they do not need bias, and the headroom for threshold voltages is increased over that of complementary self-bias differential amplifiers. Typically, this type of front-end circuits may work at a power supply voltage as low as about 1.2V, and the work frequency may be up to about 2 Gbps.
Pseudo differential amplifiers, however, need to have the input signal compared with a reference voltage, which may be a half of the power supply voltage. Accordingly, due to the single-ended characteristic, at very low power supply voltages, the headroom is still tight, and the operation speed is not high enough. Further, a pseudo differential amplifier is either p-type or n-type, and hence there may be a serious rising/falling delay mismatch, which leads to duty skew.
Another type of amplifiers uses P-N-type dual inputs combined with current minor summation. This type of front-end circuits uses a p-type amplifier and an n-type amplifier. An input signal and a reference voltage are provided to each of the p-type amplifier and the n-type amplifier, and the currents generated by the p-type amplifier and the n-type amplifier are summed. Typically, this type of front-end circuits may work at a power supply voltage as low as about 1.2V, and the work frequency may be up to about 5 Gbps.
Again, for this type of front-end circuits, the headroom for threshold voltage is low when the power supply voltage is low, for example, close to about 1.0V. Furthermore, the reference voltage may suffer from variations, which sometimes cause the reference voltage to be lower than the threshold voltage of the MOS transistors in the p-type amplifier and the n-type amplifier. This may lead to operation failure or a low operation speed.