A ferroelectric memory (FeRAM) which attracts attention as a new memory device in recent years is to read/write information actively utilizing spontaneous polarization characteristics of a ferroelectric thin film, and is expected as an excellent memory which can overcome drawbacks of previous DRAM, SRAM, FLASH memory and the like, in view of volatility, write speed, reliability, cell area and the like.
As a ferroelectric material for FeRAM, metal oxide materials such as lead zirconate titanate (PZT, PLZT) and bismuth layer-structure Perovskite ferroelectric (BLSF) have been proposed and studied.
Usually, for formation of such a ferroelectric thin film, a film formation method such as a physical vapor deposition method (PVD) such as a sputtering method or a chemical vapor deposition method such as a MOCVD method, or a chemical solution film formation method (solution method) has been proposed. Among them, the solution method is known to be useful to form a ferroelectric thin film most simply at the lowest cost without any special and expensive apparatus required. Further, the solution method has such advantages that the composition can easily be controlled precisely, and that a change in characteristics due to a difference in composition, which is shown in many ferroelectric materials, can be suppressed, and accordingly it is being studied as one of very useful processes for producing a ferroelectric thin film.
Preparation of a ferroelectric thin film by the solution method is a process for forming a ferroelectric thin film by coating on a substrate a solution having a metal compound (precursor) of components as a material homogeneously dissolved, drying the resulting coating film, and pre-baking the coating film as the case requires, and then baking the coating film, for example, in the air at about 700° C. or higher temperature to form a thin film of a crystalline metal oxide. As a soluble metal compound as the material, an organic metal compound such as a metal alkoxide or its partial hydrolysate, or an organic acid salt or a chelate complex compound has been commonly used.
Further, with respect to a cell structure employing the above FeRAM, several cell structures have been proposed, and practically used at present is a so-called planar structure wherein a ferroelectric capacitor and a transistor are connected with local wiring, having a structure disadvantageous in view of reduction of the cell area i.e. high integration.
As a structure which overcomes the above drawback, a stack structure wherein a ferroelectric capacitor is formed on a plug has been proposed, but the reducing atmosphere at the time of formation of multilevel interconnection causes fatal deterioration of characteristics of the ferroelectric thin film. Further, as a structure which overcomes such problems, such a structure has been proposed that after formation of multilevel interconnection i.e. after completion of the logic process, a ferroelectric thin film and a plate line are formed on an outermost layer. In such a structure, a film is formed on a logic circuit, and accordingly the baking temperature at the time of formation of a ferroelectric thin film is required to be decreased to a level of from 400° C. to 450° C.
To cope with the above, various means have been proposed to reduce the crystallization temperature also in preparation of a ferroelectric thin film by the solution method. They may, for example, be a method of appropriately controlling the structure of a precursor as shown in e.g. U.S. Pat. No. 5,925,183, a method of preliminarily adding bismuth silicate as a paraelectric to a coating liquid (Ferroelectrics, vol. 271, p. 289 (2002)), a method of using a lead titanate layer as a seed layer (Jpn. J. Appl. Phys., vol. 35, p. 4,896 (1996)), selection of a proper substrate (J. Am. Ceram. Soc., vol. 75, p. 2,785 (1992)) and a vacuum annealing method (Jpn. J. Appl. Phys., vol. 38, p. 5,346 (1999)). However, reduction of the baking temperature in such conventional methods is limited to a level of 550° C. Accordingly, heretofore, formation of a ferroelectric thin film on a logic circuit which is required for high integration has been considered practically difficult in a case of the solution method.
Further, it has been attempted to form a thin film by using a composition wherein fine ferroelectric particles coexist with a soluble metal salt (Jpn. J. Appl. Phys., vol. 41, p. 6,969 (2002)). However, since the fine ferroelectric particles are particles obtained by long term mechanical grinding, crystallinity or the like of the particles tends to decrease, and no desired chrematistics have been obtained.