FIG. 17A shows an arrangement using a Schmitt trigger circuit, as an example of implementation of a conventional waveform shaping circuit. To simplify the explanation, this waveform shaping circuit shows a circuit configuration designed by taking account of a case in which an input signal IN changes from Low (a ground potential GND) to High (a power supply potential VDD). As shown in the block diagram of FIG. 17A, this conventional waveform shaping circuit comprises a control potential setting means 11 for generating a control potential on the basis of the input signal IN, and an output means 13 for outputting an output signal OUT on the basis of the output control potential from the control potential setting means 11.
FIG. 17B shows a practical circuit example. In FIG. 17B, reference symbols Q1 and Q15 denote P-channel MOS transistors; Q2, Q3, Q4, and Q16, N-channel MOS transistors; and VDD; the power supply potential. The control potential setting means 11 is made up of the transistors Q1, Q2, Q3, and Q4, and the output means 13 is made up of the transistors Q15 and Q16. These elements construct the waveform shaping circuit. This waveform shaping circuit outputs a signal having the same polarity as the input signal IN. If one inverter is added in series with the output means 13, the waveform shaping circuit outputs an inverted signal of the input signal IN.
FIG. 18A is a voltage waveform chart showing the operation of the waveform shaping circuit shown in FIG. 17B. Assuming that the input signal IN gradually changes from Low to High, the output signal changes to High when the input signal IN exceeds a logical threshold value Vth. When the input signal IN exceeds the logical threshold value Vth, the gate potential (the potential of N1 in FIG. 17B) of the transistor Q4 lowers, so the transistor Q4 is cut off. Consequently, the logical threshold value Vth of the waveform shaping circuit slightly lowers, so High can be stably output as the output potential even if the input signal IN fluctuates by the influence of external noise or the like.
That is, the waveform shaping circuit shown in FIG. 17B has a function of stably shaping the waveform of the input signal IN into a Low or High digital signal on the basis of the logical threshold value Vth as a boundary. When the input signal IN changes from High to Low, the same effect can be obtained by using an arrangement (called a second arrangement) in which the power supply voltage VDD and ground GND are switched by switching the polarities of the MOS transistors in the arrangement (called a first arrangement) shown in FIG. 17B. Since the input signal IN generally changes from Low to High and from High to Low, a circuit configuration obtained by combining the first arrangement and second arrangement is used in practice (e.g., reference [Neil H. E. Weste and another, “PRINCIPLES OF CMOS VLSI DESIGN—A Systems Perspective—”, the 2nd ed., Addison-Wesley Publishing Company, 1994, p. 367]).
As shown in FIG. 18B, however, the conventional waveform shaping circuit has the problem that a large through current (sink current) Itotal flows from the power supply potential VDD to the ground GND if the input signal IN is close to the logical threshold value Vth. The paths of the through current Itotal are: paths in which the current flows from the power supply potential VDD to the ground GND via the transistors Q1, Q2, and Q3, and via the transistors Q4 and Q3, since the transistors Q1, Q2, Q3, and Q4 are weakly turned on when the input signal IN is close to the logical threshold value Vth; and a path in which the current flows from the power supply potential VDD to the ground GND via the transistors Q15 and Q16, since the transistors Q15 and Q16 are weakly turned on when the gate potential N1 of the transistor Q4 is close to the logical threshold value Vth. As shown in FIG. 17B, letting I1 be a through current flowing through the transistors Q15 and Q16 and I2 be a through current flowing through the transistor Q3, Itotal=I1+I2.
The more moderate the change in input signal IN, the longer the time during which the through current Itotal flows. Therefore, in an application using a large number of waveform shaping circuits, the through current occupies a large portion of the current consumption of the overall circuit, so it is necessary to suppress the current consumption by preparing a power supply having a large current capacity, or by limiting the number of waveform shaping circuits.
As a conventional through current reducing method, Japanese Patent Laid-Open No. 9-83345 discloses a method which performs control by a clock signal or the like by connecting a switch transistor in series in the path of the through current. This method cuts off the series-connected switch transistor when the input is at an intermediate potential and the through current flows, and turns on the switch transistor when the input signal is determined and no through current flows.
Unfortunately, although the method disclosed in Japanese Patent Laid-Open No. 9-83345 can eliminate the through current, it cannot capture the moment at which the input signal exceeds the logical threshold value of the waveform shaping circuit. That is, the method cannot be used to detect the time at which an analog input signal having a slope exceeds the logical threshold value as disclosed in Japanese Patent No. 3082141.
Another through current reducing method is to reduce the through current by using a dynamic operation. In this dynamic operation, each node of the circuit is set at (charged or discharged to) a potential determined before the operation, and a switch transistor is cut off during the operation so that no through current flows. When an input signal turns on a transistor in the circuit, the charged electric charge is discharged (or the discharged electric charge is charged), and the output voltage changes. This makes it possible to reduce the through current, and at the same time capture the moment at which an input signal exceeds the logical threshold value of the waveform shaping circuit.
Unfortunately, the waveform shaping circuit which reduces the through current by the dynamic operation has the problem that the threshold value of the circuit is the threshold voltage (normally 0.4 to 0.6 V) of a transistor. It is usually appropriate to set the logical threshold value at about half the power supply potential (e.g., 1.6 to 1.7 V when the power supply voltage is 3.3 V), but this setting cannot be performed in the waveform shaping circuit using the dynamic operation. Accordingly, no conventional method capable of setting the normal threshold value while reducing the through current by the dynamic operation has been proposed.