The Universal Serial Bus (USB) is a kind of interfaces of the peripheral equipment, and is set up jointly by seven manufacturers of software and hardware. The transmitting speed of this kind of interfaces can be either 1.5 Mbps or 12 Mbps, and can be connected to up to 127 sets of peripheral equipment simultaneously.
Since there is a very restricted regulation regarding the voltage range capable of receiving the input signals Vin for the Universal Serial Bus (USB), all voltage values within a certain range (0.8 to 2.2V) should be capable of being received satisfactorily.
Please refer to FIGS. 1(a) and 1(b), which are the circuits employed for receiving the input signals traditionally. In FIG. 1(a), a NMOS is employed for receiving input signals within a voltage range having relatively higher values. In FIG. 1(b), a PMOS, with characteristics opposite to the NMOS, is employed for receiving input signals within a voltage range having relatively lower values. The circuits in FIGS. 1(a) and 1(b) are capable of receiving input voltage Vin which is restricted to relatively higher and lower voltage values, and the range of voltage values is also relatively smaller.
But the desired voltage range of the input signals that the Universal Serial Bus (USB) is capable of receiving is getting larger and larger now, the circuits employed traditionally could not meet such a challenge. The manufacturers are all trying their best to combined the PMOS with the NMOS so as to enlarge the voltage range of the input signals that the Universal Serial Bus (USB) is capable of receiving.
Please refer to FIG. 2, it shows a receiving circuit which is a combination of PMOS and NMOS so as to enlarge the voltage range of the input signals. When the input voltage belongs to a relatively lower voltage, the PMOS transistors M5 and M6 receive the input voltage and transmit it to a 1:1 tail-current transistor 20 so as to produce and to output a tail-current. If the input voltage belongs to a relatively higher voltage, the NMOS transistors M1 and M2 receive the input voltage and transmit it to a 1:1 tail-current transistor 21 so as to produce and to output a tail-current.
Though the circuit in FIG. 2 can be employed so as to enlarge the voltage range of input signals, but the tail-current transistors 20 and 21 are always in conducting and their status won't be dynamically changed following the “shut down” “turn on” of the PMOS or NMOS respectively. No matter the transmitting signals are received by which, either a PMOS or a NMOS, there is a tail-current transistor in conducting but not operated so as to increase the power loss.
Besides, the PMOS and the NMOS are conducted simultaneously when the input voltage belongs to the central portion of the voltage range which will result in a relatively higher than normal tail-current so as to cause an extremely high power loss.
Kept the drawbacks of the prior art in mind, and employed experiments and research full-heartily and persistently, a dual differential comparator circuit with full range of input swing is finally conceived by the applicants.