1. Field of the Invention
The present invention relates to a method for accessing a memory, and more particularly to a method for accessing a memory corresponding to an address space occupied by a memory-mapped input output (MMIO) function.
2. Description of Related Art
In Intel 80×86 series microprocessors and other processor families, separate address spaces are defined to access memories and peripheral apparatuses. One of the address spaces is referred to as a memory space for accessing memory devices, whereas another address space, named input/output (I/O) space, is applied to the peripheral apparatuses. The peripheral apparatuses may also occupy the memory space, which is completely determined by hardware designers. As said design is adopted, the peripheral apparatuses are called memory-mapped devices.
In terms of the processors, the memory-mapped devices are executed as normal memories but are functioned in a completely different manner. The peripheral apparatuses not only provide data storage function but also process received information as commands or data. In the event that the peripheral apparatus is disposed in the memory space, the system is then referred to as a memory-mapped I/O (MMIO) system.
Spaces occupied by a part of input/output hardware may be saved when the memory-mapped I/O (MMIO) system is employed, for many circuits therein can be integrated together. Said arrangement is able to discard the complexity of the hardware design, even though it is not capable of reducing costs of manufacturing a whole circuit board. In addition, software technologies including pointers, data structure, and so on can be used to interact with the peripheral apparatuses, such that the relevant programs can be easily designed and efficiently executed, which is conducive to program designers.
It should be noted that each address in the memory address space corresponds to a physical memory, and the processors access the data stored in the physical memory based on the address defined in the memory address space. The MMIO function requires reserving a specific area in the memory address space for accessing the MMIO device. For example, as regards a computer using a 32-bit operating system, a certain area must be reserved in a first 4-gigabyte address space for accessing the MMIO system.
However, the certain area in the address space corresponds to the physical memory as well, and thus the memory address corresponding to the physical memory is occupied when the system performs the MMIO function, such that the corresponding part of the physical memory cannot be provided for the processor to use, leading to a waste of the memory.
Conventionally, to resolve said issue, the operating system has to support a physical address extension (PAE) mode in which the operating system is able to access the memory address space larger than or equal to four gigabytes. Next, with use of a memory remapping function of a north bridge chip, the address space having certain area occupied by the MMIO function in the memory address space is mapped onto four gigabytes or more of the address space. Given that said conditions are all satisfied, when the operating system or the application program requires utilizing the physical memory corresponding to the address space having the certain area, the processor may send a memory address larger than or equal to four gigabytes so as to access the data stored in the physical memory. However, the operating system has to support the PAE mode so as to employ said remapping function in the address space. Moreover, the north bridge chips should be equipped with the memory remapping function, and the processor has to support the function of issuing the memory address larger than or equal to four gigabytes. Unless the aforesaid three conditions are all complied with, the physical memory cannot be fully utilized. Accordingly, in most cases, the part of the physical memory is still unable to be effectively exercised, resulting in the waste of the memory.