1. Technical Field
The present invention relates to a method of manufacturing a semiconductor substrate and a method of manufacturing a semiconductor device and more particularly to a method of manufacturing a semiconductor device, which can be suitably used for a field effect transistor formed on an SOI (Silicon On Insulator) substrate.
2. Related Art
The usefulness of field effect transistors formed on an SOI (Silicon On Insulator) substrate has attracted much attention, in that isolation of semiconductor devices is easy, latch-up does not occur, and source-drain junction capacitance is small. Particularly, since full depletion-mode SOI transistors have low power consumption, can operate at a high speed, and can be easily driven with low voltage, studies for allowing the SOI transistors to operate in the complete depletion mode have vigorously advanced. Here, for example, as disclosed in Japanese Unexamined Patent Application Publication Nos. 2002-299591 and 2000-124092 which are examples of the related art, SIMOX (Separation by Implanted Oxygen) substrates or bonded substrates are used as the SOI substrates.
A method of forming SOI transistors at low cost by forming an SOI layer on a bulk substrate is disclosed in T. Sakai et al.'s paper, Second International SiGe Technology and Device Meeting, Meeting Abstract, pp. 230-231, May (2004). In the method disclosed in T. Sakai et al.'s paper, by forming Si and SiGe layers on a Si substrate and selectively removing the SiGe layer, cavities are formed between the Si substrate and the Si layer. Then, by thermally oxidizing Si exposed to the inside of the cavity, an SiO2 layer is filled between the Si substrate and the Si layer and a BOX layer is formed between the Si substrate and the Si layer.
However, in order to manufacture the SIMOX substrate, it is necessary to ion-implant oxygen with a high concentration into a silicon wafer. In addition, in order to manufacture the bonded substrate, it is necessary to bond two silicon wafers to each other and then to polish the surface of the combined silicon wafer. As a result, the SOI transistor requires a cost higher than that of field effect transistors formed in a bulk semiconductor substrate.
In addition, there are problems in that the deviation in thickness of the SOI layer is great in the ion-implanting or the polishing and that when the SOI layer is thinned to manufacture a complete depletion-mode SOI transistor, it is difficult to stabilize the characteristics of the field effect transistors.
On the other hand, in the method disclosed in T. Sakai et al.'s paper, since only the SiGe layer is selectively removed by the use of a selectivity ratio between Si and SiGe, there is a problem in that the etching distance of the SiGe layer is restricted and the area of the SOI layer is restricted. Here, when the concentration of Ge increases in the SiGe layer, the selectivity ratio between Si and SiGe can increase. However, when the concentration of Ge in the SiGe layer increases, it is difficult to increase the thickness of the SiGe layer while maintaining the crystal quality. Accordingly, the thickness of the BOX layer decreases and the crystal quality of the Si layer formed on the SiGe layer deteriorates, thereby reducing the characteristics of the SOI transistor.