With the spread of cellular phones and optical communications, ceramic substrates have been employed as substrates for mounting semiconductor devices of high output and high power consumption which work in the high-frequency region, such as GaAs type FET, Si—Ge type HBT, Si type MOSFET and GaN type laser diode, for the reason of low dielectric loss at high frequencies. Of the ceramic substrates, aluminum nitride sintered substrates are particularly paid attention because they have excellent characteristics that the thermal conductivity is high and the coefficient of thermal expansion is close to that of semiconductor devices.
For bonding a device onto a ceramic substrate such as an aluminum nitride sintered product, it is general that a first and a second undercoating metal layers firmly bonded to the ceramic substrate are formed by metallization, then on the undercoating metal layer an electrode layer composed of a noble metal such as gold is formed, and the device is soldered to the electrode layer. For soldering the device, a reflow process is frequently adopted from the viewpoint of efficiency. Therefore, a solder layer of a specific pattern for bonding the device needs to be previously formed on the electrode layer of the substrate.
As the semiconductor devices are integrated more highly in recent years, the solder layer needs to be formed in an extremely small area on the substrate for the reflow process with higher precision using thin film-forming technique. The solder layer is generally formed by laminating various metal thin film layers successively in such a manner that a prescribed solder composition should be obtained when the solder layer is molten. Such a solder layer is referred to as a “thin film-laminated solder layer” hereinafter, and a ceramic substrate having an electrode layer on which the thin film-laminated solder layer has been formed is referred to as a “ceramic substrate with a thin film-laminated solder layer” hereinafter.
As such a ceramic substrate with a thin film-laminated solder layer, there is known a substrate having an Au—Sn type thin film-laminated solder layer (see patent document 1), a substrate having a thin film-laminated solder layer that gives a Sn-37 wt % Pb eutectic solder having a melting point of 183° C. or gives a solder containing this eutectic solder and a small amount of a different metal (these solders being also referred to as “Sn—Pb eutectic solders” generically hereinafter) in the melting stage (see patent document 2), or the like. The Sn—Pb eutectic solders are most popular as electronically industrial solders and have widely spread, and they can bond devices with high bond strength even in case of a thin film-laminated solder layer (e.g., solder layer shown in FIG. 12 in which a Pb layer and a Sn layer are laminated alternately).
On the other hand, so-called Pb-free solders containing no lead component have been employed recently because harmfulness of lead has become a problem. As the Pb-free solders, those having a melting point equivalent to that of the Sn—Pb eutectic solvers are desired from the viewpoint of substitutes for the Sn—Pb eutectic solders, and as such Pb-free solders, a Sn—Zn—In type solder (see patent document 3) and a Su—Ag—Bi type solder (see patent document 4) are known. These solders, however, are alloy solders previously prepared so as to have a prescribed composition, and any example of the thin film-laminated solder layer using such Pb-free solders is not known. In the present specification, the solder layer composed of an alloy solder previously prepared so as to have a prescribed composition is called an “alloy solder layer” for convenience and distinguished from the aforesaid thin film-laminated solder layer.
Pertinent background art includes the following Japanese patent documents:
Patent document 1: Japanese Patent Laid-Open Publication No. 373960/2002;
Patent document 2: Japanese Patent Laid-Open Publication No. 186884/1993;
Patent document 3: Japanese Patent Laid-Open Publication No. 155984/1995; and
Patent document 4: Japanese Patent Laid-Open Publication No. 200288/2003.
In the case of a ceramic substrate with a thin film-laminated solder layer, Pb-freeing is an important technical problem, and it has been heretofore been desired to convert a thin film-laminated solder layer that gives a Sn—Pb solder in the melting stage into a Pb-free thin film-laminated solder layer.
In the case of the thin film-laminated solder layer, however, the whole layer gives a prescribed solder composition when the layers are molten, so that its performance is greatly influenced by the layer structure differently from an alloy solder layer (this is apparent also from the later-described comparison between the examples and the comparative examples). For example, even if high bond strength is obtained by the alloy solder layer, sufficient bond strength is not obtained frequently by the thin film-laminated solder layer that is formed so as to give the same composition as that of the alloy solder layer in the melting stage. Further, the process to bond a device to a ceramic substrate having a Sn—Pb eutectic thin film-laminated solder layer has been established, and therefore, in the shift to the Pb-free thin film-laminated solder layer from the Sn—Pb eutectic thin film-laminated solder layer, it is required that bond strength equivalent to that obtained by the Sn—Pb eutectic thin film-laminated solder layer should be obtained, and besides there is no large modification of the process. In order to satisfy these requirements, the Pb-free thin film-laminated solder layer adopted needs to have a melting point of 170 to 230° C. preferably 180 to 200° C.
It is an object of the present invention to provide a substrate for device bonding which has a Pb-free thin film-laminated solder layer satisfying the above requirements.