1. Field of the Invention
The present invention relates to a PWM converting circuit and PWM converting method for differentially amplifying two pulse signals and outputting a PWM (Pulse Width Modulation) signal. Furthermore, the present invention relates to a digital-to-analog (D/A) converter using the PWM converting circuit.
2. Description of Related Art
FIG. 10 is a block diagram showing a configuration of a conventional PWM converting circuit.
In FIG. 10, the reference numeral 101 designates a pulse generator for generating a pulse signal P taking either a low or high level for each pulse of a basic clock pulse train CK in response to the value of the digital data D; 102 designates a logical inverter for inverting the logical level of the pulse signal P supplied from the pulse generator 101, and for outputting a pulse signal N; and 103 designates a differential amplifier for producing a differential amplification component between the pulse signals P and N as a PWM signal.
Next, the operation of the conventional PWM converting circuit will be described.
The pulse generator 101 outputs the pulse signal P in response to the value of the digital data D. The logical inverter 102 carries out the logical inversion of the pulse signal P, and outputs the pulse signal N. The pulse signal P from the pulse generator 101 and the pulse signal N from the logical inverter 102 are supplied to the non-inverting input terminal (+) and inverting input terminal (xe2x88x92) of the differential amplifier 103 consisting of an operational amplifier, respectively. Thus, the differential amplifier 103 outputs the differential amplification component between the two inputs as a PWM signal Out. Subsequently, the PWM signal Out undergoes waveform shaping by a low-pass filter (not shown) to be converted into an analog D/A converted signal.
FIG. 11 illustrates relationships between the basic clock pulse train CK, pulse signals P and N and PWM signal Out of the PWM converting circuit in FIG. 10. In FIG. 11, the total number of pulses (bits) of the basic clock pulse train CK in one period of the PWM output pulse is assumed to be eight.
As shown on the left half of FIGS. 11(a)-11(i), the pulse width (the number of high-level bits) of the pulse signal P varies, on a bit-by-bit basis, the basic clock pulse train CK in response to the value of the digital data D. Since the total number n of the pulses of the basic clock pulse train CK in one period of the PWM output pulse is eight here, the pulse signal P has nine patterns. The pulse signal N, on the other hand, has waveforms reversed in the level to those of the pulse signal P through the logical inverter 102.
Thus, as illustrated in the right half of FIGS. 11(a)-11(i), the pulse width PW of the PWM signal Out the differential amplifier 103 varies from +4 to xe2x88x924, providing nine patterns of the PWM signal Out, at the maximum. Generally, the conventional PWM converting circuit generates n+1 patterns of the PWM signal out for the total number n of the pulses of the basic clock pulse train CK in one period of the PWM output pulse.
With the foregoing configuration, the conventional PWM converting circuit has a problem of being unable to increase its dynamic range because of its limited output resolution. This is because the number of the output patterns of the PWM signal is limited to n+1, at the maximum, for the total bit number n of the basic clock pulse train in one period of the PWM output pulse.
The present invention is implemented to solve the foregoing problem. It is therefore an object of the present invention to provide a PWM converting circuit and PWM converting method, and a D/A converter capable of improving the output resolution and dynamic range by increasing the number of output patterns of the PWM signal for the total bit number n of the basic clock pulse train in one period of the PWM output pulse.
According to a first aspect of the present invention, there is provided a PWM converting circuit including a pulse generator for generating two pulse signals, which pulse generator varies a pulse width of one of the two pulse signals on a bit-by-bit basis of a basic clock pulse train in response to the value of digital input data, and holds a level of the other of the two pulse signals throughout a predetermined number of bits of the basic clock pulse train. It can increase the number of patterns of the PWM signal for the predetermined number of bits of the basic clock pulse train, thereby offering an advantage of being able to improve the resolution and dynamic range of the PWM signal.
According to a second aspect of the present invention, there is provided a D/A converter including the foregoing PWM converting circuit and a low-pass filter for carrying out waveform shaping of the PWM signal. It offers an advantage of being able to provide a D/A converter with improved dynamic range.
According to a third aspect of the present invention, there is provided a PWM converting method that generates two pulse signals, varies a pulse width of one of the two pulse signals on a bit-by-bit basis of a basic clock pulse train in response to the value of digital input data, and holds a level of the other of the two pulse signals throughout a predetermined number of bits of the basic clock pulse train.