In wireless communications systems, such as those operating in accordance with 3GPP2 CDMA2000-1x standards and 3GPP UMTS W-CDMA standards, a turbo code has been adopted for data transmission on both the uplink and downlink due to its superior error correcting capabilities. To detect the residue errors that cannot be corrected by the turbo decoder, Cyclic Redundancy Check (CRC) code bits are appended to the packet data before the encoder at the transmitter. A CRC check is then performed at the receiver on the decoded packet to determine whether a pass or fail results.
FIG. 1 shows a high-level block diagram of wireless communications system that uses turbo encoding for error correction and CRC for error detecting. This block diagram is applicable to both 3GPP2 and 3GPP systems at the conceptual level. At the transmitter 101, which can be either within a mobile terminal or a base station, a CRC circuit 102 determines the CRC bits to be appended to a data packet on input 103 that is to be transmitted to receiver 104. Turbo encoder 105 then encodes the resultant block of data. The turbo-encoded packet is then processed by the physical channel processing circuitry 106, which performs such functions, for example, as spreading, scrambling, modulating and multiplexing for transmission over propagation channel 107 in accordance with the whatever system standards are being employed. At receiver 104, the physical channel processing circuitry 108 performs the opposite functions of circuitry 106, including de-multiplexing, demodulation, descrambling and despreading, to produce at its output a set of soft symbol metrics representing the data at the output of turbo encoder 105 in the transmitter. Turbo decoder 109 then processes these soft symbol metrics to produce a block of bits at its output that includes the CRC bits appended to the data packet on input 103 at the transmitter 101 by CRC circuit 102. Using the same methodology employed by CRC circuit 102 in the transmitter 101, CRC checker 110 performs a CRC check by calculating the CRC from those bits within the decoded data block at the output of turbo decoder 109 that correspond to the transmitted data packet. If the CRC determined by CRC checker 110 matches the CRC in the block of bits at the output of turbo decoder 109, then the received packet has passed its CRC check and no packet error is detected. CRC checker 110 then outputs a CRC Pass and the decoded data packet on outputs 111 and 112, respectively. If the CRC determined by CRC checker 110 doesn't match the CRC in the decoded block of bits at the output of turbo decoder 109, then the CRC has failed and a packet error is detected. CRC checker 110 then outputs a CRC Fail on output 111, which fail is reported to the higher layer. Disadvantageously, CRC bits introduce overhead, and when the data block size is small, the overhead can be large. For example, in 3GPP2, the smallest data block length for the turbo code is 174 bits. The CRC for this block size comprises 12 bits thereby introducing an overhead of 10 log10(1+12/174)=0.29 dB. For 3GPP, the smallest data size for the turbo code is 40 bits. When a CRC of 24 bits is used, the overhead is 10 log10(1+12/40)=2.04 dB. It is desirable, therefore, to reduce the overhead introduced by CRC bits while still retaining the error detecting functionality that a CRC check affords.