1. Technical Field
Low noise amplifiers employed for wide band low frequency signals are disclosed.
2. Description of the Related Art
Low noise amplifiers (LNA) are important building blocks in several electronic systems interfacing to sensors, transducers or other signal sources. Getting the input referred noise as low as possible or sufficiently low for an application is one of the design objectives for LNAs. At the same time, because the supply current is limited in most systems, low power dissipation is also one of the objectives.
Several different architectures for LNAs exist. For example, various embodiments described herein are related to LNA architecture used for wideband low frequency signals based on an open loop configuration. A typical implementation of such an LNA is shown in FIG. 1. The circuit 10 illustrated in FIG. 1 operates as follows.
The input transistors M1 and M2 are PMOS transistors connected as source followers. Assuming an ideal behavior of the source followers, the input voltageVIN=VINP−VINN is applied directly across RI. In this situation, the current IIN through RI, will therefore be equal to:IIN=VIN/RI  (Equation 1)
Hence, the input stage operates as a trans-conductor converting the input signal voltage, VIN, to a signal current, IIN. The signal current is then mirrored by the transistor pairs M3/M5 and M4/M6 and applied to the load resistors RL, generating the output voltageVOUT=VOP−VON Under ideal circumstances, the voltage gain Gin of the LNA would beGin˜(2*RL*M)/RI  (Equation 2)wherein M is the mirror gain of transistor pairs M3/M5 and M4/M6.
However, non-idealities in transistor characteristics would degrade the gain and linearity of such an amplifier since part of the input signal would be left across the input transistors M1 and M2. The requirement for Equation 2 is that the trans-conductance of the input devices M1 and M2 is much larger than 1/RI. This is typically obtained by boosting the trans-conductance of the input device. An example of such an LNA embodiment is disclosed in T. Kwan and K. Martin, An Adaptive Analog Continuous-Time CMOS Biquadratic Filter, IEEE Journal of Solid-State Circuits, Vol. 26, No. 6, June 1991. Such an implementation of an LNA 20 is also illustrated in FIG. 2.
In this embodiment, any change in gate-source voltage of M1 and M2 would be amplified with a relatively high gain to the gate voltages of M3 and M4. A negative feedback path is added back to the source voltage of M1 and M2 controlling the current through M1 and M2 to be nearly constant and hence controlling the gate-source voltage of M1 and M2 to be nearly constant. This is similar to increasing the trans-conductance of M1 to M2. The result is that nearly all current flowing through RI is conducted through M3 and M4 instead of through M1 and M2. Hence, the signal current will be present in M3 and M4 and copied to the output branch by M5 and M6.
A considerable disadvantage with the embodiment shown in FIG. 2 is that multiple branches of supply current exist. Current is copied from M3 and M4 to M5 and M6 respectively. Assuming a mirror gain between M3 and M5 and between M4 and M6 of unity, the total consumed current will be two times the standby current of M3 and M4. This results in unnecessarily high total power dissipation. Therefore, there is a need for a more efficient VGA implementation.