1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly relates to a semiconductor device in which a control chip and controlled chips are connected to each other via through silicon vias.
2. Description of Related Art
A memory capacity required for semiconductor devices such as DRAM (Dynamic Random Access Memory) has been increasing every year. In recent years, to satisfy this requirement for an increased memory capacity, there has been proposed a method of stacking plural memory chips and electrically connecting these memory chips via through silicon vias on a silicon substrate (see Japanese Patent Application Laid-open No. 2005-210106).
Japanese Patent Application Laid-open No. 2005-210106 describes a semiconductor device having plural power-source through silicon vias for power source arranged to surround a periphery of a through silicon via for signal transmission. With this arrangement, electromagnetic noise that occurs along with transmission of a signal can be reduced.
According to Japanese Patent Application Laid-open No. 2005-210106, plural through silicon vias are used to supply one kind of a power, source. Similarly, using plural through silicon vias in parallel is also considered for a through silicon via for signal transmission. However, when signals are transmitted by using plural through silicon vias for all signals, a necessary number of through silicon vias becomes considerably large, and it is not efficient. On the other hand, when each signal is transmitted by using one through silicon via that is allocated to each signal in a fixed manner, a device as a whole becomes defective even when one defect occurs in a through silicon via. Therefore, as to how to transmit each signal by using through silicon vias needs to be considered in relation to operations and an area of a stacked semiconductor device.