Formation of integrated circuit structures upon a semiconductor wafer may require photoresist patterning and subsequent electroplating processes. During electroplating, a metal or other electrically conductive material is plated from the wafer surface within the openings of the patterned photoresist. In certain implementations the electrically conductive material take the form of solder bumps utilized in controlled collapse chip connection (C4) to interconnect a semiconductor device to external circuitry via the solder bumps. Subsequent to plating, the photoresist is stripped from the semiconductor wafer utilizing a photoresist stripping solution.
The Restriction of Hazardous Substances Directive (RoHS) restricts the use of certain hazardous substances in electrical and electronic equipment and has driven the electronics industry to move away from solders that contain Lead (Pb). As a result, lead-free solder bumps may now be electroplated upon a lead-free semiconductor wafer within the patterned photoresist. In some instances, the photoresist upon the lead-free wafer may be stripped in the same photoresist stripping tool and photoresist stripping solution as leaded (non lead-free) semiconductor wafers.