1. Field of the Invention
This invention relates to computer technology, and more particularly, to a method and circuit for safeguarding the data stored in a CMOS RAM (Complementary Metal-Oxide Semiconductor Random Access Memory) in a computer system, such as an IBM-compatible personal computer (PC), when the battery unit used to power the CMOS RAM is below working level.
2. Description of Related Art
CMOS RAMs are a volatile memory made using CMOS technology, which are characterized in low power consumption and are therefore widely used as the storage means for BIOS (Basic Input Output Systems) setup data and real-time clock in PCs. A CMOS RAM unit in a PC is typically from 128 to 256 bytes in capacity.
In a PC, the CMOS RAM is typically powered alternatively by two sources: a main power supply and a battery unit, in such a manner that when the PC is powered on, the CMOS RAM is powered by the main power supply, and when powered off, the CMOS RAM is powered by the battery unit. The battery unit is typically a nonrechargeable type. For the purpose of environmental protection, the US regulations specifically set forth the use of lithium battery as the battery for CMOS RAM in PCs. When the PC is powered off, the data stored in the CMOS RAM can still be retained since it is still powered by the battery. When the PC is powered on, the power connection to the CMOS RAM will be switched from the battery to the main power supply for the purpose of saving battery power.
FIG. 1 is a schematic diagram showing a typical power supply system for a CMOS RAM unit 100 in a PC. As shown, the CMOS RAM 100 is connected via a first diode D1 to the main supply V.sub.CC of the PC, and via a second diode D2 to a battery unit, which is typically a nonrechargeable lithium battery unit supplying a battery power VBAT, where VBAT is less in magnitude than V.sub.CC. When the PC is powered on, the main power V.sub.CC is transferred to the CMOS RAM 100. In this case, since V.sub.CC is greater in magnitude than VBAT, the second diode D2 is reversely biased, and thus the battery voltage VBAT is inhibited by the second diode D2. However, when the PC is powered off, the second diode D2 is fowardly biased, thus allowing the battery voltage VBAT to be transferred to the CMOS RAM 100.
One drawback to the foregoing system, however, is that the battery unit is non-rechargeable and therefore will be consumed up over time. When the battery power is below working level, it has to be replaced by a new one. When doing this, the data stored in the CMOS RAM 100 can be permanently lost. Therefore, each time the old battery is replaced, the user has to redo the previous settings to the PC, which is quite inconvenient to the user and may cause some data to be lost forever.
In modern PCs, the CMOS RAM is also used to store some important initialization data of the operating system (OS) in addition to BIOS setup data. Therefore, once the data stored in the CMOS RAM are lost, it would be extremely difficult and laborious to put the PC back to work.