Non-volatile memory (NVM) systems are used in a variety of electronic systems and devices. During the lifetime of an NVM system, however, cycling performance will degrade dramatically after a large number of cycles (e.g., 20,000 program/erase cycles) because of the accumulation of damage within NVM cells due to cycling. One example of such damage is the increasing number of charges (e.g., holes and electrons) that become trapped in tunnel oxides (i.e., trap-up) after large numbers of cycles for NVM systems that use tunnel dielectric layers. Because of this damage to tunnel dielectric layers as cycle counts rise, it is difficult to keep cycling performance at adequate levels as compared with early cycles within the product lifetime. Further, the damage not only degrades cycling performance, but it also degrades other reliability aspects, as well, such as DR (Data Retention), OL (Operating Life), read disturb, program disturb, and other reliability measures for NVM systems.