1. Technical Field
The present invention is directed generally toward memory architecture and, more particularly, toward a method and apparatus for providing a re-configurable content addressable/dual port memory.
2. Description of the Related Art
Content addressable memory (CAM), also known as “associative storage,” is a memory in which each bit position can be compared. In regular dynamic read only memory (DRAM) and static RAM (SRAM) chips, the contents are addressed by bit location and then transferred to the arithmetic logic unit (ALU) in the CPU for comparison. In CAM chips, the content is compared in each bit cell, allowing for very fast table lookups. Since the entire chip is compared, the data content can often be randomly stored without regard to an addressing scheme which would otherwise be required. However, CAM chips are considerably smaller in storage capacity than regular memory chips.
When designing an application-specific integrated circuit (ASIC) product, such as a metal programmable device, anticipating for a potential need for CAM is difficult. Existing solutions include embedding pre-diffused CAM blocks into the metal programmable device and, alternatively, building CAM memory entirely out of gate array elements in the metal programmable device.
Pre-diffused blocks of CAM take up space on the metal programmable chip. Since CAMs are not always used, there is little incentive to include CAM blocks on metal programmable products. On the other hand, building even a small CAM entirely out of gate array elements takes up a tremendous amount of area, because the storage element is so large. The performance of gate array CAM is also lower than that of a CAM built from an optimized core cell.
Therefore, it would be advantageous to provide a re-configurable content addressable memory.