An LDPC code (LDPC stands for Low-Density Parity-Check) is known as an encoding method that has a strong error correction/encoding capacity and that is used in communication systems and memory devices. An LDPC code uses a parity check matrix and repeatedly performs message value calculation called row processing and column processing; and performs decoding by obtaining the posterior probability of received-word data. From among the existing types of error correction codes, an LDPC code has the error correction capacity close to the theoretical limit. For that reason, the LDPC code is widely used in communication systems and storage devices.
Meanwhile, regarding the flash memory that, in recent years, has become mainstream as far as nonvolatile semiconductor memory devices are concerned, miniaturization of memory cells and multi-bit per cell architecture have escalated the errors occurring during reading. For that reason, the error correction capacity of the conventional BCH code (BCH stands for Bose, Chandhuri, Hocquenghem) has become insufficient. Thus, in recent years, a lot of attention is being focused on the LDPC codes having a higher error correction capacity. Besides, in order to retain the intergenerational compatibility among the error correction methods, there has been a demand for a technology providing an on-chip decoding circuit for decoding the LDPC codes. As a result of providing an on-chip decoding technology, the LDPC code decoding operation can be performed using a circuit arranged on the chip on which the semiconductor memory device is formed. As a result, the apparent error occurrence rate of the semiconductor memory device can be held down to a certain level or lower.
Meanwhile, since an LDPC code performs probability-based error correction, it becomes necessary to perform complex real number calculation. Particularly, in the check node processing performed during the calculations for decoding an LDPC code, it is necessary to perform product-sum operations of probability values, thereby requiring a large amount of calculation resources. Hence, in order to implement the decoding operation for an LDPC code using hardware, a large-scale digital semiconductor circuit is required. That makes on-chip implementation a difficult task.
In that regard, in order to downscale the semiconductor circuit that performs decoding of an LDPC code, a method has been proposed in which the real numbers are expressed as electrical current and the real number calculation is performed using analog circuitry. However, in the case of expressing data values as electrical current, electrical current must continuously flow during the data processing. That leads to consumption of an enormous amount of electrical power.
In this way, in order to achieve a sufficient error correction capacity in an LDPC code using the conventional technology, it is necessary to perform the decoding operation using real number calculation. However, because of that, it becomes complex to implement an error correction device using a semiconductor integrated circuit.