The present invention relates to a semiconductor memory device and more particularly, to an erase method in a flash memory device for reducing power consumption.
Generally, a flash memory device is divided into a NOR type flash memory device that provides high speed and a NAND type flash memory device that provides high storage capacity.
This flash memory device performs a read operation, a program operation and an erase operation. The program operation and the erase operation in the NAND type flash memory device are performed by utilizing Fowler-Nordheim (FN) tunneling of an insulating layer between a P-well and a floating gate of a memory cell by charged particles. The program operation of the flash memory device is performed by injecting electrons into the floating gate of the memory cell through FN tunneling. In the program operation, only selected memory cells in a memory cell block are programmed.
The erase operation in the flash memory device is performed by ejecting electrons from the floating gate of the memory cell to the P-well through FN tunneling. In the erase operation, data stored in all memory cells in a memory cell block are simultaneously erased. In other words, the erase operation is performed in units of blocks.
FIG. 1 is a flow chart illustrating a common erase process in the flash memory device.
At step 11, a pre-program is performed so as to ensure uniform an erase threshold voltage of memory cell.
At step 12, an erase operation is performed by applying an erase voltage to a P-well of a selected memory cell block.
At step 13, a verifying operation is performed to verify whether or not the memory cells in the selected memory cell block have been erased properly.
A determination is made as to whether or not the erase operation is a “pass” or a “fail” (step S14). The erase process is a “pass” if all the memory cells in the selected block have been erased. The erase process is a “fail” if not all the memory cells of the selected block have been erased.
At step 15, the erase process is a “pass,” a soft program is performed. The soft program is performed to narrow the width of the threshold voltage distribution that has been scattered due to the erase operation performed at the step S12.