Power control is used in cellular systems to enhance performance, in order to compensate for variations in the channel power gains, e.g. by suppressing fading effects of various kinds. In WCDMA (Wideband Code Division Multiple Access) systems, in the uplink, this is achieved by measurements (or estimation) of the signal to interference ratio (SIR) in the base station receiver. These measurements are compared to a reference SIR, and based on this information the base station computes power control commands at a rate of 1500 Hz which are transmitted to the terminal. The terminal adjusts its output power accordingly and the process is repeated.
Since the actuator and the output measurement are located at different locations (RBS and terminal for downlink, terminal and RBS for the uplink), a complication is that power control commands must necessarily be transmitted over the control channel. The power control commands are therefore subject to degradation due to fast fading, interference and noise, a fact which makes the received commands uncertain to varying degrees. Good reviews of fast power control for WCDMA can e.g. be found in H. Holma and A. Toskala, “WCDMA for UMTS—Radio Access for Third Generation Mobile Communications”, Chichester, UK: Wiley, 2000, pp. 34, 109, and in section 9.2.
In WCDMA, the design of the control loop is based on a number of simplifications. Transmission errors are not accounted for, i.e. the transmitted control signal is equivalent to the received control signal. No disturbance modelling is exploited. As a consequence the currently used scheme is not optimal in case the disturbances are coloured.
Furthermore, a limitation in present systems is that the bit rate available for control purposes is very limited to keep the over-head consumption of bit-rates low. A key aspect of the power control problem is that each power adjustment command needs to be digitized. Thus, it is constrained to be represented by a small number of bits. In existing WCDMA designs, the discrete time power control signals therefore represent power increments. The inner-loop controller sends a value associated with the difference in achieved and targeted SIR estimates, which is then quantized. Typically, each value needs to be expressed via 1 bit, in which case the range of the increments has only two elements. The control signal thereby gives an order of increasing or decreasing the power one step. Typically, a saturation block will limit the available maximum power.
The restriction to use only 1 bit (or a few bits) will limit the efficiency of the power control. In certain situations, the one-step increment may be too small to compensate for fast variations in gain. On the other hand, if constant conditions prevail, alternating increments and decrements result in non-optimum utilization of the signalling resources. A consequence of that is that the performance of e.g. the WCDMA fast power control loop is not as good as it could be.