The present invention relates to a disk drive system utilizing a voice coil motor (VCM). In particular, the present invention is a VCM power amplifier circuit having reduced silicon die area and improved performance.
The actuator in a hard disk drive, sometimes called the voice coil motor (VCM), moves the read and write heads across the disk. In most disk drive systems, an integrated circuit (IC), called the motor controller IC, contains the necessary circuitry to regulate the current through the VCM. In most systems, the entire power amplifier that is connected directly to the VCM is included in the motor controller IC. The circuit typically consists of an H-bridge using NDMOS transistors (due to their lower on state resistance), and two amplifiers each with a gain of A/2 but with opposite input polarities, resulting in a differential amplifier with a gain of A. A power amplifier must be designed with a gain of A that uses a small amount of silicon die area, has good linearity including low crossover distortion, requires minimum power dissipation, and has a relatively large bandwidth and slew rate. These are all conflicting requirements that make the design of the power amplifier difficult.
Class AB power amplifiers have been typically used to control voice coil motors because of their low crossover distortion. Unlike other power amplifiers, Class AB power amplifiers continually bias a small quiescent current through the output transistors. A typical class AB power amplifier will either use separate operational amplifiers (opamps) to control both upper and lower NDMOS transistors on each half of an H-bridge, or one opamp to control the bottom NDMOS and an open loop level shifter to control the top NDMOS on each half of the H-bridge. Using two opamps increases power dissipation as well as die area. It also makes stabilizing the feedback loops difficult and causes problems during large step inputs, which may result in shoot-through current. Additional anti-shoot-through circuitry must be added to eliminate the possibility of both upper and lower NDMOS conduction, which further increases die area and complexity. Using only one opamp to control the bottom NDMOS and simply level shifting to control the upper NDMOS decreases linearity. It also makes voltage gains (other than one) more difficult to obtain.