1. Field of the Invention
In general, the present invention relates to a nonvolatile storage device. To put it in detail, the present invention relates to a nonvolatile storage device having a plurality of plate electrodes each used for applying a voltage to a plurality of memory cells.
2. Description of the Related Art
Most of information apparatus such as a computer make use of a high-density DRAM (Dynamic Random Access Memory) as a storage device which is capable of operating at a high speed. Since the DRAM is a volatile storage device which inevitably loses information stored therein when the power supply thereof is turned off, however, there is a demand for a nonvolatile storage device which does not undesirably lose information stored therein even if the power supply thereof is turned off.
In order to meet the demand described above, there has been proposed a variable-resistance-type storage device to be used as the nonvolatile storage device. Typical examples of the variable-resistance-type storage device are an FeRAM (Ferroelectric Random Access Memory), an MRAM (Magnetic Random Access Memory), a PMC (Programmable Metallization Cell) and an RRAM (Resistive Random Access Memory). Each of these nonvolatile storage devices is capable of continuously holding information stored therein for long time even if the supply of power to the nonvolatile storage device is cut off. In addition, each of these nonvolatile storage devices does not require a refresh operation so that the amount of power supplied to the storage device can be reduced by a quantity which is needed to carry out the refresh operations.
Such nonvolatile storage devices include one that adopts a plate method. In the nonvolatile storage device which adopts the plate method, a storage element employed in each memory cell included in the nonvolatile storage device is electrically connected to a common plate electrode for applying a common voltage to the storage elements. The plate electrode provides a storage element with a voltage for writing data into a memory cell employing the storage element or a voltage for erasing data from a memory cell employing the storage element. For more information on this nonvolatile storage device which adopts the plate method, the reader is advised to refer to Japanese Patent Laid-open No. 2006-351779.