In the field of telecommunication networks, an apparatus, or circuit arrangement representing a parallel amplifier architecture, may be used for amplifying and combining at least two radio frequency input signals into a combined radio frequency output signal, where the combined output signal may have a high power. Described below is such an apparatus and a method for amplifying and combining at least two radio frequency input signals into a combined radio frequency output signal.
In the field of wireless transmitters, multiple amplifiers are often connected in parallel, and used to amplify a single signal. A transmitter, which uses multiple amplifiers stages connected in parallel is called a parallel amplifier transmitter. The outputs of the parallel amplifier stages in a transmitter are combined before transmission through one or more antennas.
The parallel amplifier architecture allows the use of smaller, less expensive amplifiers. Further, upon the failure of one of its multiple amplifiers, a parallel amplifier transmitter will not suffer a complete service outage, but will instead exhibit only a decrease in output power. By contrast thereto, in a single amplifier design, the failure of a single amplifier will cause a service outage for the entire transmitter.
Unfortunately, efficient combining of the output of several parallel amplifiers is not trivial. Amplifiers vary in amplitude and phase characteristics such that the same signal fed into several amplifiers will generally result in a slightly different output signal from each amplifier.
EP 1 201 027 B1 discloses a method and apparatus for using parallel amplifiers to efficiently amplify an information signal. The apparatus utilizes digital signal manipulation techniques in optimizing the modulation and timing of the input signals provided to each of the parallel amplifiers. The modulation and timing of the input signals are adjusted such that the power at the output of a combiner is maximized as compared to the sum of the power of combiner input signals.
However, a modulation and timing adjustment for a maximum output power is often not possible with existing parallel amplifier circuitries and additional functional blocks are required for the adjustment. Further, it is often very difficult to precisely determine the correct modulation and timing adjustment. However, not properly adjusted signals, which are supposed to be combined, may cause an inefficient signal combination respectively a reduced output power.