Computers are an indispensable part of society. Initially quite costly, powerful computers today are practically a commodity, obtainable by anyone for just a few hundred dollars. A major reason for this ease of availability is the computer industry's standardization of component interfaces, such as the bus.
A computer component is a physical device that can be attached or removed from the computer, such as a video adapter or a network card. A bus is the data path on the computer's motherboard that interconnects the microprocessor with components through expansion slots, into which the components can be inserted. If properly designed, for a given computer architecture, two component devices from two different manufactures can be plugged into a bus on the same computer, and seamlessly work together.
Component suppliers have responded to computer price pressure by shortening their own development cycles and reducing material costs. Among the strategies used to reduce costs are the use modeling and verification tools during design, when changes can be made relatively quick and less costly.
Modeling permits a component developer to efficiently develop a large number of test cases, each representing a particular behavioral scenario in which to verify a specific design against. Without modeling, the developer would have to physically create a multiplicity of configurations, dramatically increasing costs and schedule delays.
Perhaps the most common component interface today is the PCI. It is in nearly all x86-based computers that are currently manufactured. PCI, or Peripheral Component Interconnect, was designed to sustain the high data transfer rated needed by modern components. PCI devices are designed to function as either a master or a slave. Master devices can initiate a bus transaction, while slave devices can only be targets, and “speak only when spoken to.”
Generally speaking, the PCI includes at least two separate busses: an address/data bus and a command/byte enable bus. The address/data bus is 32 or 64 bits wide, and is used by a master device in order to write or read data to a memory location at another master or a slave device. This bus is also used to transfer the requested data. The command/byte enable bus is 4 or 8 bits wide, and is used to define the PCI command during the address phase of the transaction. It's also used for byte enabling during the data phase of the transaction, since not all of the bytes on the bus may contain valid data.
PCI-X, or Peripheral Component Interconnect Extended, is a new computer bus technology that further increases the speed that data can move within a computer, up to 1.06 GB/sec in the current implementation. In addition to many significant enhancements, PCI-X allows single transactions to be further split into multiple smaller transactions in order to optimize bus performance. For example, a master may be initiating a large multi-byte read transaction from a slave. After the first portion is transferred to the master, the slave may not be ready with the remaining portion. The master may tell the slave to transfer the remaining portion at a later time, and thus free up the PCI bus for another pending transaction. PCI-X is backwards-compatible, meaning that a PCI-X card can function on a standard PCI slot, at the regular PCI speed.
In the prior art, there have been attempts at modeling and verifying individual discrete PCI transactions. Attention has not been paid to modeling sets of PCI transactions, i.e., transactions that are coupled, linked, and combined with other PCI transactions in real-time during operation on the bus. This is in part because interdependent PCI transactions are particularly difficult to model and to verify efficiently and accurately. The present invention relates to methods and apparatus for efficiently and accurately modeling and verifying PCI transactions, including sets of interdependent PCI transactions.