1. Field of the Invention
The present invention relates to a signal recording apparatus for a video device using a magnetic recording medium, and particularly to an improved video device using a magnetic recording medium capable of generating a pilot tone for automatic tracking and accurate positioning of a recording/reproducing head on a magnetic recording track during recording of a digital video signal on a magnetic recording medium such as a magnetic tape.
2. Description of the Conventional Art
Generally, a circuit for recording digital information on a magnetic recording medium converts a video or audio signal from a signal source into a standardized digital format. This conversion process involves performing error correction and coding, and processing the signal to a recording signal format using a recording unit and coding unit.
As mentioned above, when recording digital information (either a digital audio or video data) on a magnetic recording medium, a track following circuit has been generally used as a recording apparatus.
The track following circuit uses a time multiplexing method for completely separating the data signal and the servo signal system within the track, and a frequency multiplexing method for separately recording the data and the servo position information, such as a pilot tracking tone, on separate frequency regions.
FIG. 1 shows the track arrangement on a tape for one picture. A digital signal is on the track recorded in accordance with the frequency multiplexing method. In particular, the input data is recorded on tracks F0, F1, F2, F0, F1, . . . , while the head runs angularly over the tracks of the tape from the lower to the upper portion of each track. As further shown in FIG. 1, one picture consists of ten tracks.
Reading of recorded data by the head will now be described.
Assuming that pilot tone frequency on the (2n)th track is referred to "f1", and the pilot tone frequency of the (2n+1)th is referred to "f2", different than f1, f1 and f2 can be separated using a band-pass filter. Thus, it is possible to accurately follow the track from the size of the servo position information f1 and f2. Namely, when the head deviates from its corresponding track, since the amount of one frequency component is increased, and the amount of another frequency component is decreased, it is possible to detect the amount of movement of the head position by computing the difference of the magnitude of the pilot tone between neighboring tracks.
In order to accurately position the head, the power spectrum of the encoded data bit stream should be decreased near the pilot tone frequency, and then the data should be encoded.
Referring to FIG. 1, each track of the tape is classified into F0, F1, F2 in accordance with the frequency characteristic.
In the track F0, the pilot tone does not exist in the frequencies f0 and f1. In track F1, the pilot tone does not exist in the frequency f1, and in track F2, the pilot tone does not exist in frequency f2.
As shown in greater detail in FIG. 2, the frequency of the F0 track has a notch in order for the energy of the frequency of f1 and f2 to be lower than the normal level by less than 9 dB. Preferably, the pilot tone should be lower than a range between 16 dB and 19 dB.
These pilot tones are referred to as tracking signals so as to accurately read the position of the recorded data, and are recorded on the magnetic recording medium together with other digital information such as video and audio data.
The pilot tones and digital information are recorded in accordance with an international standard reference. In particular, as shown in FIG. 1, one track is composed of four sectors such as an ITI (Insert and Track Information), a video data, an audio data, and a sub-code. Since a gap exists between these four sectors, the data is recorded thereon without overlapping data of another region. In addition, the data within a predetermined track is added by an error correction code, and is then scrambled and divided into a plurality of bits by 24 bits. One bit is added to the top thereof at every 24 bits for coding, and the total recording ratio is about 42 Mbps.
This is called as 24-25 modulation. The entire 25 bits is referred to as one code word, and the code word selected in accordance with the following two limitative conditions is recorded on the tape:
Condition 1 (Priority 1): The "run lenth" of consecutive "0" or "1" bits should be less than 10. If the maximum bit run length (of number of bits) becomes greater than 9 by adding one bit ("0" or "1"), an additional one bit is selected to shorten the maximum bit run length of the code word.
Condition 2 (Priority 2): When the modulated sequence satisfies the above Condition 1 (priority 1), one bit is selected to make the frequency characteristic of the modulated sequence close to the frequency characteristic shown in FIG. 2 for each track.
FIG. 3 shows a conventional circuit for generating the pilot tone by affixing one bit at the top of every 24 bits from the input bit stream during the recording and coding process. By adding this one bit, the tracking pilot tone is included in the data.
The pilot signal is used as a control signal when the video head runs on the track to reproduce or play-back the information recorded on the magnetic tape. That is, it is possible to periodically vary the digital sum value (DSV) of the number of "0" or "1" bits contained in the input data having a predetermined length by controlling the added bit to "0" or "1", and is possible to generate the signals having the aforementioned two kinds of pilot tone signal frequencies f1 and f2. Three tracks of F0, F1, F2 of FIG. 1 are made by varying the pilot tone signal at every track. The frequency spectrum of each track is shown in FIG. 2.
The circuit of FIG. 3 in which the data is recorded with the pilot tone includes an affixing portion for affixing one bit signal so as to obtain (n+1) bits of information, a 2T precoder for generating a code word, and a predetermined portion for generating a control signal.
As further shown in FIG. 3, the conventional signal recording apparatus includes a parallel/serial converter 301 for converting 8 bit parallel input data into a serial data stream of 24 bits. A signal affixing block 302 receives the output of the parallel/serial converter 301 and sets one bit to a "0". A signal affixing unit 303 receives the output of the parallel/serial converter 301 and sets one bit to a "1". A 2T precoder 304 receives the output of the signal affixing unit 302 and generates the 25 bit code word. A 2T precoder 305 receives the output of the signal affixing unit 303 and outputs the 25 bit code word. Control signal generator 306 receives the output of the precoders 304 and 305, detects the frequency characteristic of each bit stream (a 25 bits code word), and generates the control signal so that the bit stream nearest the frequency characteristic of the track to be recorded among two bit streams to be selected.
As further shown in FIG. 3, a Tmax detector 307 detects the upper limitative value (for example, 10) of the bit length of the signal affixing unit 304. Tmax detector 307 also supplies the signal to the control signal generator 306. Another Tmax detector 308 detects the upper limitative value of the bit length of the signal affixing unit 305 and outputs in response thereto the detected value to the control signal generator 306. A decision block 309 receives the output of the control signal generator 306 and the output of the Tmax detectors 307 and 308 and selects, as well as controls, the code word to be recorded. A head/switching unit 310, receiving the control output of the recording signal decision unit 309, selects one code word of the 2T precoder 304 and one code word of the 2T precoder 305 in accordance with the control output of the recording signal decision unit 309. The code words are then recorded.
In this conventional signal recording unit, the bit run length (the number of the continuous "0" or "1") is limited to below 9. Under this condition, an "AT"-precoder having a condition of "a.gtoreq.2" is better than a "1T"-precoder, and when selecting "n" (the number of bits of the input unit)&lt;10, efficiency is improved.
The circuit of FIG. 3 is the hardware for recording n-bit information, and the signal recording operation with respect to each block is performed as follows.
Parallel video data of 8 bits is input to the parallel/serial converter 301. The parallel/serial converter 301, in turn, converts three groups of parallel data of input 8 bits into the bit stream of 24 bits serial data, and, therefore, 24 bits of converted data are input to "0" signal affixing unit 302 and "1" signal affixing unit 303.
The "0" signal affixing unit 302 affixes "0" one bit at the top of every 24 bits of the input 24 bits stream for the previously described 24-25 modulation. In addition, the "1" signal affixing unit 303 affixes a "1" to one bit at the top bit of 24 bits of the input bit 24 stream for the 24-25 modulation.
Through the above-mentioned process, a channel word of 25 bits is obtained by the signal affixing units 302 and 303.
The channel word of 25 bits is input to the 2T precoders 304 and 305, respectively, which converts the channel word of 25 bits into a code word of 25 bits. FIG. 4 shows the construction of one of precoders 304 and 305.
The precoder includes an exclusive OR gate (XOR) 401 and two register R1, 402 and R2 403. Channel word data and the value of R1 register 402 having a predetermined characteristic delayed by a clock cycle T of an input signal are input to exclusive OR gate 401 to generate output data. This output is supplied to the R2 register 402 in order for it to be input to the exclusive OR gate 401.
When converting two 25 bits channel words to which "0" or "1" are affixed into a code word, R values stored in registers R and R2, X1 and X2, respectively, should be assigned to the register value of the 2T precoder, which outputs the code word that is recorded/selected among the previous code words. Thus, it maintains the interdependency between the code words after synchronization so that it is possible to return to the original signal.
Two registers 402 and 403 are used for the above-mentioned reason, and each output is input to the 2T precoder, and the output from another precoder is input to the registers 402 and 403.
FIG. 5 shows the embodiment of the input/output relationship of the 2T precoder of FIG. 4.
The data converted into the code word by the 2T precoder is input to the control signal generator 306, the Tmax detectors 307 and 308, and the delay units 312 and 313, in that order, as shown in FIG. 3. The delay circuit stores the code word until a control signal is generated by the control signal generator. The control signal generator 306 detects the frequency characteristic of the 25 bit input code word bits. In response, control signal generator 306 generates a control signal so that the code word nearest the frequency characteristic of the track to be recorded among two code words can be selected.
The Tmax detectors 307 and 308 detect the bit run length of the code word. When the bit run length of the code word exceeds 10, a detection signal (i.e., a control signal) is input to the control signal generator 306. For example, if it is assumed that a control signal is generated by hoax detector 307, the control signal of the Tmax detector 307 is input, by priority, to the recording signal decision unit 309 to affect the control signal thereof, but does not affect the control signal of the control signal generator 306.
Due to the above-mentioned matter, the recording signal decision unit 309 outputs a control signal in order for a code word having a shorter bit run length to be selected, and the head/switching unit 310 selects the code word of the 2T precoder 305 and records it on magnetic tape 311. In fact, the code word of the 2T precoder 305 stored in the delay unit 313 is selected and recorded.
The other Tmax detector 308 has the same operation as described above. Namely, when the Tmax detector 308 detects a bit run length longer than 10, the recording signal decision unit 309 blocks the control signal of the control signal generator 306 and selects the code word of the delay unit 312, which stores the output of the 2T precoder 304 and records it on the magnetic tape.
FIG. 6 shows one example of the control signal generator 306 which receives the code word data input from one of the 2T precoders. The code word data is then integrated by the adder 601 and the memory 602. The resulting integrated value is subtracted by the desired DSV f1 626 and the subtractor 603, and input to the summing unit 605 through the squaring unit 604.
The code word data input from one of the 2T precoder is also multiplied by sine wave signal sin w2 by the multiplier 606 and is then subject to band-pass-filtering. The result is integrated by the adder 607 and the memory 608. The value of this integration is input to the summing unit 605 through squaring unit 609.
The code word data input from one of the 2T precoder is multiplied by a cosine signal cos w2 by the multiplier 610, and is then subject to band-pass-filtering. It is then integrated by the adder 611 and the memory 612. The result of this integration is input to the summing unit 605 through the multiplier 613.
The code word data input from another 2T precoder is integrated by the adder 614 and the memory 615, and the resulting integrated value is subtracted by the desired DSV f1 626 and the subtractor 616.
The code word data input from another 2T precoder is multiplied by the sine wave signal sin w2 with multiplier 619, and then band-pass-filtered. It is then integrated by the adder 620 and the memory 621, and the result is input to the summing unit 618 through the squaring unit 617.
The code word data input from another 2T precoder is also multiplied by the sine wave signal sin w2 with multiplier 619 and is then band-pass-filtered. It is then integrated by the adder 620 and the memory 621, and the result is input to the summing unit 618 through the multiplier 622.
The code word data input from another 2T precoder is further multiplied by a cosine wave signal cos w2 by the multiplier 623 and is band-pass-filtered. It is then integrated by the adder 624 and the memory 625, and the result is input to the summing unit 618 through the multiplier 626.
The comparing unit 627 outputs a control signal CS in order for the code word to output the lowest value among the outputs of two summing units 605 and 618. Control signal CS is used for setting two register values of the 2T precoder and the value of the integrating unit of the control signal generator for every 25 bits. In this way, the pilot tone is generated at frequency f1, and the notch is made at frequency f2 and a DC frequency.
FIG. 7 shows a circuit diagram showing another embodiment of the conventional control signal generator 306, which uses a filtering circuit and generates a pilot tone using the square wave as a pilot tone.
This circuit has a predetermined element for processing the signal input from one of the 2T precoders of FIG. 3. The circuit includes a subtractor 701 for subtracting the input code word and the square wave fl 702. A multiplier 703 is also included for multiplying the output of the subtractor 701 by the sine wave sin w1. An additional multiplier 704 multiplies the output of the subtractor 701 by the cosine wave cos w1. A further multiplier 705 multiplies the output of the subtractor 701 by the sine wave sin w2.
Multiplier 706 multiplies the output of the subtractor 701 by a cosine wave cos w2, and an integrating unit 707 integrates the output of the subtractor 701. Also, integrating units 708 through 711 integrate the outputs of the multipliers 703 through 706, respectively, and squaring units 712 through 716 square the outputs of the integrating units. A summing unit 717 sums the outputs of the multipliers and outputs a control signal.
The control signal generator generates a pilot tone using the square wave signal as the pilot tone. It also subtracts the reference value by using the subtractor 701 before the code word is input from the control signal generator, and uses the pilot tone having the size "A" as a pilot tone. The code word value passed through the 2T precoder is subtracted as much as the reference value of the square wave signal and is input to the DC-free blocks 707 and 712, the f1 generating clocks 703, 704, 708, 709, 713, and 714, the f2 generating blocks 705, 706, 710, 715, and 716 and processed by each clock. The power is then computed by summing unit 717.
The conventional digital information recording apparatus as shown in FIGS. 3 through 7 has disadvantages in recording the data in real time. Namely, since the delay time is lengthy during the processing to select data to be recorded, it is difficult to process data in real time. For real time processing, four line blocks are required, causing the circuit to become complicated.
In addition, the register of the 2T precoder should be set with accurate values before a new code word is input to the 2T precoder, and this set value is decided in accordance with the control signal CS generated by the previous code word.
The last bit of the previous code word should pass through within 23nsec in order for the first bit of the code word of 25 bits to be input to the 2T precoder. However, it is difficult to obtain this speed using the commonly used operator, because it is very difficult to complete one data computation within one clock time (23 nsec) from the output of the 2T precoder to the output of the control block.
The path referring to the maximum delay time during the above-mentioned signal transfer process is to pass through the subtractor, the multiplexor, the integrating unit, the multiplier, the adder, the comparing unit, and the like. An effective method for resolving the above-mentioned problems is to expand the line block to four as shown in FIGS. 2 through 7, to arrange all possible situations, and to select a more accurate line block at every code word.
However, with the above-mentioned method, the amount of hardware required is disadvantageously increased.