1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device such as a MOS (Metal Oxide Semiconductor) capacitor, a MOS transistor and a semiconductor integrated circuit, and more particularly to a method of manufacturing a semiconductor device in which a conductor is formed on an insulating film.
2. Description of the Background Art
As an example of background-art semiconductor device, a MOS capacitor, a MOS transistor and a semiconductor integrated circuit will be taken for the following discussion. In the MOS capacitor and the MOS transistor, an electrode on a gate insulating film corresponds to a conductor formed on an insulating film. In the semiconductor integrated circuit, a wire on an interlayer insulating film corresponds to the conductor formed on the insulating film.
FIG. 61 is a schematic diagram showing an example of sectional structure of a background-art MOS capacitor. In the MOS capacitor of FIG. 61, a gate insulating film 202 is provided on an N-type impurity diffusion layer 201b existing on one of major surfaces of a semiconductor substrate 201a. On the gate insulating film 202, a polysilicon 203 doped with boron and a tungsten silicide 204 are layered in this order, constituting a gate electrode. On the tungsten silicide 204, an insulating film 205 is formed. Arrows 206 of FIG. 61 indicate that the boron in the polysilicon 203 reaches the N-type impurity diffusion layer 201b through the gate insulating film 202. Such a phenomenon as the boron in the polysilicon 203 goes through the gate insulating film 202 is caused by thermal diffusion of the boron in the gate insulating film 202, resulting from a heat treatment for electrically activating a dopant in the semiconductor substrate 201b. That results in disadvantageous variation of threshold voltage of the MOS structure. Further, the boron in the polysilicon 203 is sucked from the polysilicon 203 out into the tungsten silicide (WSix) 204 as indicated by arrows 207 during the above heat treatment. The character x of WSix represents composition ratio, usually taking a value in a range from 2 to 3.
When the temperature of the boron in the polysilicon 203 falls due to movement of the boron such as going through the gate insulating film 202 and being sucked out into the tungsten silicide 204, the polysilicon 203 is depleted in application of negative voltage with reference to the semiconductor substrate 201a to the tungsten silicide 204. With depletion of the polysilicon 203, gate capacitance decreases, as shown in FIG. 62, in a region in which a channel is to be inverted, i.e., a region to which a negative voltage is applied.
The same occurs in the MOS transistor as does in the MOS capacitor. FIG. 63 shows a sectional structure of a background-art MOS transistor which is a constituent of a memory cell of a DRAM. The structure of the MOS transistor of FIG. 63 will be first discussed. The MOS transistor of FIG. 63 is isolated from other elements (not shown) on a semiconductor 1a by a shallow trench isolation 20 formed of a silicon oxide film on one of major surfaces of the semiconductor substrate 1a. Hereinafter, the shallow trench isolation is referred to as STI. In the one major surface of the semiconductor substrate 1a surrounded by the STI 20, an N-type source/drain region 13 is formed, to be connected to a storage capacitor (not shown). In the one major surface of the semiconductor substrate 1a surrounded by the STI 20, an N-type source/drain region 14 is so formed as not to come into contact with the N-type source/drain region 13. The N-type source/drain region 14 is connected to a bit line (not shown). A region between the N-type source/drain regions 13 and 14 is defined as a channel region, and a gate insulating film 2 is formed on the channel region in the one major surface of the semiconductor substrate 1a. On the gate insulating film 2, a doped polysilicon 18 is formed in a layered manner, and a tungsten silicide 19 is formed in a layered manner thereon. The doped polysilicon 18 and the tungsten silicide 19 constitute a gate electrode. Further, on the one major surface of the semiconductor substrate 1a, a nitrided oxide film 10a is so formed as to cover the gate insulating film 2 and the gate electrode, and an insulating film 10b having a thickness of about 50 nm is formed thereon.
For the same reason as in the MOS capacitor, when the doped polysilicon 18 is depleted and the gate capacitance decreases, a drain current decreases in the MOS transistor, causing deterioration of circuit performance. For example, Japanese Patent Application Laid Open Gazette No. 5-243564 discloses a MOS transistor consisting of tungsten side walls and a polysilicon doped with phosphorus for control of threshold voltage, and this structure also has the problem of depletion of the gate electrode.
As a method of solving the above problem of gate depletion proposed is use of a metal gate electrode. FIG. 64 shows an example of structure of a MOS capacitor using a metal gate electrode. In the MOS capacitor of FIG. 64, a tungsten 209 is used instead of the polysilicon 203 and the tungsten silicide 204 of FIG. 61. The tungsten 209 is formed on the gate insulating film 202 with a thin tungsten nitride 208 (WNx) interposed therebetween. The tungsten nitride 208 is placed below the tungsten 209 in order to prevent diffusion of tungsten atoms into the gate insulating film 202 to form fixed charges. If the fixed charges are formed, the threshold voltage of the transistor disadvantageously varies more widely than expected in a designing stage. Further, in order to prevent diffusion of tungsten atoms into other regions, the insulating film 205 is provided on the tungsten 209. In the structure of the MOS capacitor of FIG. 64, no depletion of the gate electrode occurs. Therefore, no decrease of drain current due to the gate depletion occurs.
Having the above structure, even when the metal nitride such as a tungsten nitride is sandwiched between the metal gate electrode and the gate insulating film, the background semiconductor device has a problem that poor cohesiveness between the metal gate electrode such as tungsten and the gate insulating film makes the metal gate electrode easy to remove. The problem becomes more serious as the semiconductor device becomes smaller since an area of contact between the gate insulating film 202 and the tungsten 209 becomes smaller as the gate length 210 or the gate width becomes smaller.
The problem that the metal gate electrode is easy to remove arises not only in the case where the tungsten is used as the gate electrode but also in the case where the metal is used as the bit line of the DRAM. For example, FIG. 65 shows a sectional structure of a region where the memory cell of the DRAM is formed when cut by one section parallel to a word line and in this figure, a bit line 219 formed of metal such as tungsten is disadvantageously easy to remove.
Now, a structure of the DRAM shown in FIG. 65 will be discussed. On the one major surface of the semiconductor substrate 1a, the STI 20 is formed, isolating the MOS transistor whose one of constituents is an N-type impurity diffusion layer 220. Entirely on the semiconductor substrate 1a having this structure, an interlayer insulating film 212 is formed, and a nitride film 213 is formed further thereon. A storage node 215 is formed on the nitride film 213 and inside a through hole which penetrates the nitride film 213 and the interlayer insulating film 212 to reach the N-type impurity diffusion layer 220. A dielectric 216 is sandwiched between the storage node 215 and a cell plate 217 corresponding to the storage node 215. An interlayer insulating film 214 is so formed on the nitride film 213 as to cover the storage node 215 and the cell plate 217. On the interlayer insulating film 214, an insulating film 218 is formed, and the bit line 219 is placed thereon.
The bit line 219 is formed by depositing a tungsten film on the insulating film 218 and then etching needless part of the tungsten film with a patterned resist as a mask. It is expected that the integration of a memory cell should be improved as generations of DRAM advance, and presently the minimum width of the bit line 219 ranges from about 0.1 xcexcm to about 0.2 xcexcm. Also in the structure of FIG. 65, because of poor cohesiveness between the insulating film 218 and the tungsten wire 219, the wire 219 is removed from the insulating film 218 in some portion of the bit line on a wafer, to be broken, or the removed tungsten is -displaced to cause a short circuit with a neighboring bit line.
The present invention is directed to a method of manufacturing a semiconductor device. According to a first aspect of the present invention, the method comprises the steps of: (a) forming a first insulating film on one major surface of a semiconductor substrate; (b) forming an adhesive member on the first insulating film; (c) forming a barrier layer on the first insulating film and side surfaces of the adhesive member; and (d) forming a conductor on the barrier layer, and in the method of the first aspect, the barrier layer prevents a substance which is a constituent material of the conductor from diffusing.
Preferably, the step (b) includes the steps of (b-1) forming a second insulating film on the first insulating film, the second insulating film having a hole in a portion where the conductor and the adhesive member are to be formed, the hole reaching the first insulating film; (b-2) filling the hole with composition material of the adhesive member; and (b-3) etching the composition material of the adhesive member anisotropically to form the adhesive member in an inner wall of the hole.
Preferably, the second insulating film includes a silicon oxide film and a silicon nitride film, and the step (b-1) includes the steps of (b-1-1) forming the silicon nitride film on the first insulating film; (b-1-2) forming the silicon oxide film on the silicon nitride film; and (b-1-3) forming the hole in the silicon oxide film and the silicon nitride film in this order.
Preferably, the step;(d) includes the steps of (d-1) filling the hole in which the adhesive member is formed with composition material of the conductor; (d-2) planarizing the composition material of the conductor with the second insulating film as a stopper; and (d-3) removing the second insulating film.
Preferably, the step (d-2) includes the step of (d-2-1) reducing difference in level of the conductor existing on the second insulating film.
Preferably, the hole is also provided in other portion than the portion where the conductor and the adhesive member are formed so that the composition material of the conductor is formed uniformly in the step (d-1).
According to a second aspect of the present invention, in the method of the first aspect, the adhesive member includes an adhesive member made of a material that can adhere to the first insulating film and the barrier layer with adhesive strength higher than that between the conductor and the barrier layer.
According to a third aspect of the present invention, the method comprises the steps of: (a) forming a first insulating film on one major surface of a semiconductor substrate; (b) forming an adhesive member on the first insulating film; and (c) forming a conductor on the first insulating film while being in contact with side surfaces of the adhesive member, and in the method of the third aspect, the adhesive member is made of a material that can adhere to the first insulating film and the conductor with adhesive strength higher than that between the conductor and the first insulating film.
According to a fourth aspect of the present invention, in the method of any one of the first to third aspects, the step (b) includes the steps of (b-1) forming a second insulating film on the first insulating film, the second insulating film having a hole in a portion where the conductor and the adhesive member are to be formed, the hole reaching the first insulating film; (b-2) filling the hole with composition material of the adhesive member; and (b-3) etching the composition material of the adhesive member anisotropically to form the adhesive member in an inner wall of the hole.
According to a fifth aspect of the present invention, in the method of the fourth aspect, the second insulating film includes a silicon oxide film and a silicon nitride film, and the step (b-1) includes the steps of (b-1-1) forming the silicon nitride film on the first insulating film; (b-1-2) forming the silicon oxide film on the silicon nitride film; and (b-1-3) forming the hole in the silicon oxide film and the silicon nitride film in this order.
According to a sixth aspect of the present invention, in the method of the first aspect, the step (c) includes the steps of (c-1) filling the hole in which the adhesive member is formed with composition material of the conductor; (c-2) planarizing the composition material of the conductor with the second insulating film as a stopper; and (c-3) removing the second insulating film.
According to a seventh aspect of the present invention, in the method of the sixth aspect, the step (c-2) includes the step of (c-2-1) reducing difference in level of the conductor existing on the second insulating film.
According to an eighth aspect of the present invention, in the method of the sixth aspect, the hole is also provided in other portion than the portion where the conductor and the adhesive member are to be formed so that the composition material of the conductor is formed uniformly in the step (c-1).
The present invention is also directed to a semiconductor device. According to a ninth aspect of the present invention, the semiconductor device comprises: a semiconductor substrate having an insulating film on its one major surface where constituent elements are incorporated; a first conductor formed on the insulating film, being electrically associated with the constituent elements; and an adhesive member formed on the insulating film while being in contact with the side surfaces of the first conductor, adhering to the insulating film and the first conductor with adhesive strength higher than that between the first conductor and the insulating film.
Preferably, the first;conductor has a trapezoidal section whose lower base on a side of the insulating film is shorter than its upper base, and the widest portion in a section of a gate electrode consisting of the first conductor and the adhesive member is defined by the upper base of the first conductor.
Preferably, the first conductor includes a gate electrode of a MOS transistor, and the insulating film includes a gate insulating film of the MOS transistor.
Preferably, the gate insulating film has a surface layer made of silicon oxide or titanium nitride in an interface with the adhesive member; and a dielectric layer provided below the surface layer, having permittivity higher than that of the surface layer.
Preferably, the adhesive member includes a silicon or a silicon germanium with impurity undoped in an interface with the insulating film.
Preferably, the adhesive member includes a silicon or a silicon germanium as a degenerate semiconductor having a conductivity type different from that of a channel of the MOS transistor in an interface with the insulating film.
Preferably, the adhesive member includes a silicon or a silicon germanium as a degenerate semiconductor having the same conductivity type as that of a channel of the MOS transistor in an interface with the insulating film.
Preferably, the first conductor includes interconnection of a semiconductor integrated circuit for being connected to the constituent elements incorporated in the semiconductor substrate.
Preferably, the semiconductor substrate further comprises an isolation insulating film for isolating a plurality of semiconductor devices formed in the semiconductor substrate; and a second conductor formed on the isolation insulating film, not being electrically associated with the constituent elements of the semiconductor device, and the adhesive member assists adhesion between the isolation insulating film and the second conductor.
According to a tenth aspect of the present invention, in the semiconductor device of the ninth aspect, the first conductor includes at least one of a metal and superconductor, the adhesive member includes a silicon, a silicon germanium, a metal oxide or a metal nitride, and the insulating film has a silicon oxide, a silicon nitride oxide or a titanium nitride in an interface with the adhesive member.
According to an eleventh aspect of the present invention, the semiconductor device comprises: a semiconductor substrate having an insulating film on its one major surface where constituent elements are incorporated; an adhesive member formed on the insulating film; a barrier layer formed on the insulating film and side surfaces of the adhesive member; and a first conductor formed on the barrier layer, being electrically associated with the constituent elements, and in the semiconductor device of the eleventh aspect, the barrier layer prevents a substance which is a constituent material of the first conductor from diffusing.
According to a twelfth aspect of the present invention, in the semiconductor device of the eleventh aspect, adhesive strength between the insulating film and the adhesive member and that between the adhesive member and the barrier layer are each higher than that between the first conductor and the barrier layer.
According to a thirteenth aspect of the present invention, in the semiconductor device of the eleventh or twelfth aspect, the barrier layer is made of tungsten nitride, tantalum nitride or titanium nitride, the first conductor includes at least one of a metal and a superconductor, the adhesive member includes a silicon, a silicon germanium, a metal oxide or a metal nitride, and the insulating film has a silicon oxide, a silicon nitride oxide or a titanium nitride in an interface with the adhesive member.
According to a fourteenth aspect of the present invention, in the semiconductor device of any one of the ninth to thirteenth aspects, the first conductor has a trapezoidal section whose lower base on a side of the insulating film is shorter than its upper base, and the widest portion in a section of a gate electrode consisting of the first conductor and the adhesive member is defined by the upper base of the first conductor.
According to a fifteenth aspect of the present invention, in the semiconductor device of any one of the ninth to fourteenth aspects, the first conductor includes a gate electrode of a MOS transistor, and the insulating film includes a gate insulating film of the MOS transistor.
According to a sixteenth aspect of the present invention, in the semiconductor device of the fifteenth aspect, the gate insulating film has a surface layer made of silicon oxide or titanium nitride in an interface with the adhesive member; and a dielectric layer provided below the surface layer, having permittivity higher than that of the surface layer.
According to a seventeenth aspect of the present invention, in the semiconductor device of the fourteenth or fifteenth aspect, the adhesive member includes a silicon or a silicon germanium with impurity undoped in an interface with the insulating film.
According to an eighteenth aspect of the present invention, in the semiconductor device of the fourteenth or fifteenth aspect, the adhesive member includes a silicon or a silicon germanium as a degenerate semiconductor having a conductivity type different from that of a channel of the MOS transistor in an interface with the insulating film.
According to a nineteenth aspect of the present invention, in the semiconductor device of the fifteenth or sixteenth aspect, the adhesive member includes a silicon or a silicon germanium as a degenerate semiconductor having the same conductivity type as that of a channel of the MOS transistor in an interface with the insulating film.
According to a twentieth aspect of the present invention, in the semiconductor device of any one of the ninth to fourteenth aspects, the first conductor includes interconnection of a semiconductor integrated circuit for being connected to the constituent elements incorporated in the semiconductor substrate.
According to a twenty-first aspect of the present invention, in the semiconductor device of any one of the ninth to twentieth aspects, the semiconductor substrate further comprises an isolation insulating film for isolating a plurality of semiconductor devices formed in the semiconductor substrate; and a second conductor formed on the isolation insulating film, not being electrically associated with the constituent elements of the semiconductor device, and the adhesive member assists adhesion between the isolation insulating film and the second conductor.
In the method of manufacturing a semiconductor device of the first aspect, since a contact area increases by an area where the barrier layer comes into contact with a side surface of the conductor, the conductor becomes hard to remove from the semiconductor substrate.
In the method of the second aspect, since the barrier layer on the side surface of the adhesive member is hard to remove, the adhesive strength between the conductor and the insulating film is effectively improved.
In the method of the third aspect, since the adhesive strength between the conductor and the semiconductor substrate is improved by the adhesive strength between the adhesive member and the conductor, the conductor becomes hard to remove from the semiconductor substrate.
In the method of the fourth aspect, by forming the hole at a position where the adhesive member is to be formed, the adhesive member can be easily formed at a desired position in a desired planar shape.
In the method of the fifth aspect, the damage such as etching from which the first insulating film suffers can be reduced in forming the hole.
In the method of the sixth aspect, the adhesive member can be easily formed on the side surface of the conductor through a simple operation of filling the adhesive member and the conductor together into the hole.
In the method of the seventh aspect, defects due to the difference in level of the conductor such as remainders of the conductor on the second insulating film and overetcing of the conductor in the hole can be reduced after planarization.
In the method of the eighth aspect, the hole is so disposed as to uniformly form the constituent material of the conductor to reduce the difference in level of the conductor existing on the second insulating film, and thereby defects due to the difference in level of the conductor such as remainders of the conductor on the second insulating film and overetcing of the conductor in the hole can be reduced after planarization.
In the semiconductor device of the ninth aspect, since the adhesive strength between the conductor and the semiconductor substrate is improved by the adhesive strength between the adhesive member and the conductor, the conductor becomes hard to remove from the semiconductor substrate.
In the semiconductor device of the tenth aspect, a relation of adhesive strength among the first conductor, the insulating film and the adhesive member can be easily achieved.
In the semiconductor device of the eleventh aspect, since a contact area increases by an area where the barrier layer comes into contact with a side surface of the first conductor, the first conductor becomes hard to remove from the semiconductor substrate.
In the semiconductor device of the twelfth aspect, since the barrier layer on the side surface of the adhesive member is hard to remove, the adhesive strength between the conductor and the insulating film is effectively improved.
In the semiconductor device of the thirteenth aspect, the function of the barrier layer and a relation among the adhesive strength between the insulating film and a lower-layer portion, that between the lower layer portion and the barrier layer and that between the first conductor and the barrier layer can be easily achieved.
In the semiconductor device of the fourteenth aspect the width of the gate electrode made of the first conductor and the adhesive member is not larger than the width of the upper base, for example, the mask when the first conductor is formed through photolithography, a structure suitable for improving integration can be provided.
In the semiconductor device of the fifteenth aspect, since removal of the gate electrode in the MOS transistor is prevented, it is possible to prevent the MOS transistor from not performing functions in accordance with design because of clearance between the gate electrode and the gate insulating film.
In the semiconductor device of the sixteenth aspect, the adhesive strength of the first conductor to the semiconductor substrate can be improved while the gate insulating film has high permittivity.
In the semiconductor device of the seventeenth aspect, silicon or silicon germanium is depleted to relieve an electric field strength at the gate end.
In the semiconductor device of the eighteenth aspect, a MOS transistor in which the gate electrode is not depleted can be easily provided.
In the semiconductor device of the nineteenth aspect, a MOS transistor in which a roll-off of a threshold voltage is relieved can be easily provided.
In the semiconductor device of the twentieth aspect, many wires existing in the integrated circuit are hard to remove, and a semiconductor device which is tough and manageable can be provided.
In the semiconductor device of the twenty-first aspect, removal of the second conductor is prevented and, for example, a break in a wire and a short circuit due to the removal of the second conductor can be prevented.
An object of the present invention is to improve the adhesive strength between a conductor and an insulating film on which the conductor is formed. Another object of the present invention is to provide a MOS transistor in which a gate electrode is made of a material having conductivity as high as or higher than metal has to prevent depletion of the gate electrode.