1. Field of the Invention
The present invention relates to a method for simulating deposition film shape and a method for manufacturing electronic device, and particularly, to a method for simulating deposition film shape with high accuracy and a method for manufacturing electronic device using the simulation method.
2. Background Art
Thin-film forming process such as LPCVD (Low Pressure Chemical Vapor Deposition) method is often used in electronic device manufacturing. For example, such thin-film forming technique is often used for the filling of deep trenches and contact holes. However, with the advance of finer design rules, it has been getting more difficult to form a film with good side coverage (side film thickness/top film thickness). In film forming for filling fine holes, changes in a sticking coefficient and growth rate depending on film forming conditions and film forming stages are significant factor in hampering better film formation. Especially, a decrease of the thickness of formed films due to the finer design rules in conjunction with the film forming mechanism makes it further difficult to form a film with good side coverage.
Optimization has been performed by conducting film formation several times varying a film-forming parameter. However since the experiments take a lot of time and efforts, deposition film shape simulations have been conducted for the deposition process in the past. However, in conventional CVD models the whole deposition process are expressed with single model parameter regardless of whether it is at early stage or middle stage of the deposition process. Since they do not take account of changes in a sticking coefficient and growth rate, they cannot simulate side coverage properly. As an example, Japanese patent laid-open publication JP-A 9-246189(Kokai) discloses a simulation for film forming on trenches.