1. Field of the Invention
The present invention relates to manufacturing of integrated circuits and, more particularly, to forming openings on a semiconductor wafer.
2. Description of Related Art
In typical integrated circuit silicon wafer manufacturing, creation and integration of circuit patterns and openings or like features includes using a photolithography process or technique. Photolithography techniques are preferably used to form fine resist patterns to define circuits, openings and like features on the silicon wafer. In general, the process includes a light sensitive polymer film for a photoresist being applied to a wafer at a predetermined thickness. Light from a light source passes through a photomask having a predetermined mask (circuit) pattern thereon. The light passing through the photomask forms an aerial image which is projected onto the photoresist on the wafer forming the mask pattern on the photoresist. The photoresists (also known as xe2x80x9cresistsxe2x80x9d) are exposed to light and subsequently processed by a development process to leave a patterned resist layer on the wafer. The resists are usually positive resists (the areas exposed to the light are removed by the subsequent development process) or negative resists (the areas not exposed to light are removed by the subsequent development process). The patterned resist layer then acts as an in-situ stencil for further processing, which can include Reactive Ion Etch (RIE), Ion Implant (II), Wet Etch (WE), and other processing steps. There are many variations on the technique of printing images in a photoresist film using light projected through a mask. The xe2x80x9cstandardxe2x80x9d technique would be to print all the images at a given process level at one time through a single mask. After printing the images on the substrate, subsequent etching and/or depositions (or combinations thereof) are done to form the desired structures.
More specifically, existing methods or processes start with a silicon (or other kind of) semiconductor substrate or wafer with various films and possibly prior level patterns on it. This substrate can then be spin coated with a layer of photoresist. Sometimes a layer of anti-reflective coating is put onto the substrate before applying the photoresist. The substrate is then processed in some type of light exposure system. The areas of the photoresist where light strikes react with the light. The reaction varies depending on the type of photoresist used, the exposure wavelength used, the subsequent processing conditions, and other variables. The substrate is illuminated using a mask of some sort that intentionally illuminates some areas and intentionally prevents illumination in other areas. The substrate is subsequently processed to remove the photoresist in either the illuminated regions or the unilluminated regions depending on the photoresist type, the temperature and time of baking, and the type of chemical used to dissolve the designated areas of either reacted or unreacted photoresist (the chemical used for this dissolution is commonly known as xe2x80x9cdeveloperxe2x80x9d). The remaining photoresist forms an in situ xe2x80x9cstencilxe2x80x9d or xe2x80x9cmaskxe2x80x9d on the substrate. The next step in the process includes processing the substrate to form the desired feature type. In the case where the substrate has a dielectric level, and the desired features are small metal lines or small metal studs, the substrate is typically subjected to a reactive ion etch (RIE) process that would selectively etch the dielectric from areas of the substrate where the photoresist had been removed previously. The remaining photoresist is typically removed by an oxygen plasma strip process. Finally, a blanket metal may be deposited (either by evaporation or plating or some other suitable technique), and then the excess metal is removed by a chemical-mechanical polish operation.
In the fabrication of integrated circuit devices, high integration is desirable. To achieve this goal the various components in the integrated circuit are made with the smallest possible dimensions. Current semiconductor fabrication technologies available are able to fabricate integrated circuits down to and below 0.13 xcexcm image size. The photolithography process is instrumental in the fabrication of semiconductors and related semiconductor structures such as, doped areas, and contact openings. In submicron integration, the photolithographic transfer of a pattern from a mask is highly critical. Various methods such as Optical Proximity Correction (OPC), and Phase Shift Masking (PSM), have been proposed to achieve high definition for the pattern transfer from a mask through photolithography onto a photoresist layer. Although existing methods (such as PSM) enhance the pattern definition in fabrication of integrated circuits they are complex and costly.
Typical integrated circuit manufacturing processes often involve the creation of openings in various materials by selective etching. For example, openings or trenches can be made in a substrate to provide isolation between individual devices or to provide capacitive charge storage. Other openings, such as vias, or windows, can be made in dielectric layers to facilitate connection between two layers of metallization or between a metallization layer and an active region of a transistor. Commonly, these openings are created by etching a material deposited on a semiconductor wafer to create openings. The openings may be subsequently filled with appropriate materials. For example, a trench may be filled with insulative material to facilitate inter-device isolation. The trench may also be used for capacitive storage, in which case the trench may be lined with one or more layers of insulator films and filled with conductive material. Vias may be subsequently filled with a conductive material, for example a metal providing a conductive link between two layers of metallization.
Another method uses computer software to compute the dimensions and positional deviations between the resulting patterns on the photoresist layer and the predefined patterns on the mask, and then, uses the data for correction of the size and position of the patterns on the mask. However, a disadvantage of this method is that it requires complex computing to obtain the needed corrections to the mask patterns, and can therefore be difficult or expensive to implement.
The manufacturing cost of a given integrated circuit is largely dependent upon the chip area required to implement desired functions. The chip area is defined by the geometries and sizes of the active components such as gate electrodes in metal oxide semiconductor (MOS) and diffused regions such as source and drain regions and bipolar emitters and base regions. These geometries and sizes are often dependent upon the current photolithographic equipment and materials available in the industry.
Conventional technology used in forming contacts and vias has been done primarily through improvements in photolithography capability. The dependency on the photolithography to achieve adequate projections of images or patterns onto the wafer surface is limited by the photolithography equipments"" capability, especially as feature sizes continue to decrease.
In fabricating an integrated circuit, apertures, windows or vias are often formed in a layer of insulator material in order to provide a contact to a second layer to electrically connect the second layer to a third layer that is on an opposite side of the insulator layer. The functional area on a semiconductor device is valuable, and the dimensions of these apertures are often made as small as fabrication limitations allow. Therefore, it is necessary to precisely control the diameter of any aperture that is formed in a layer.
Current methods of photolithography in computer microchip miniaturization produce chips containing in the hundreds of thousands or more transistors. Fabrication of these features is dependent on the resolution or the optical system""s ability to distinguish closely spaced objects. The resolution of the system is an important limitation in achieving minimum device sizes required. In establishing the horizontal dimensions of the various devices and circuits, a pattern must be created which meets design requirements and be correctly aligned to the circuit pattern on the surface of the wafer. As line widths shrink smaller in submicron photolithography, the process of printing lines and contact holes in photoresist becomes increasingly more difficult. Some improvements in photolithography capability have enabled reduction in size of contacts, vias, metal lines and other features. The dependency on photolithography to achieve adequate projection of images of patterns onto the wafer surfaces is limited by the photolithography equipment""s capability, especially as feature sizes continue to decrease.
A conventional technique for forming an aperture through an insulator layer to provide access to a lower level conductive layer is to apply or spin a photoresist to the insulator layer and to pattern the photoresist using a photolithographic mask to expose regions of the insulator layer. Plasma etching or reactive ion etching then removes material from the insulator layer, forming apertures at the exposed regions. After removal of the photoresist, a conductive material is deposited within the apertures to electrically connect with the lower level conductive layer. Various factors limit the minimum horizontal dimension of an aperture formed in this manner. For example, aperture size is limited by the resolution of the lithography. In addition to problems involving the size of the aperture, there can be problems with misalignment to the lower conductive layer.
A typical prior art method of forming a conductive pattern may include forming a first insulating film over a semiconductor substrate, then forming a contact hole by selectively etching a portion of the first insulating film, and successively etching a recess portion of the semiconductor substrate corresponding to the contact hole. A second insulating film is then formed over the entire surface of the first insulating film including the inner surface of the contact hole, and then etching the second insulating film using an anisotropic etching process so that the bottom surface of the recess is exposed and a side wall coating remains in the contact hole. The side wall coating is formed of the second insulating film, extends below the lower surface of the first insulating film and into the recess portion of the substrate.
Current lithography equipment cannot print images in photoresist below a certain dimension. Normal processing would require that some sort of pattern transfer technique (such as reactive ion etching) would be used to transfer an image into a dielectric material. This etched image in the dielectric would them be filled with a conducting material (such as a metal or appropriately doped polysilicon). The lower limit on the size of these etched images is limited by multiple factors including, the imaging capability of the lithography equipment being used, the performance of the photoresist (or other photo imaged) material, and the pattern transfer equipment/process capability.
A shortcoming in existing methods is that the density and lower size limit of the images that can be printed are restricted. Using existing methods, the image size that can be printed through a mask has a lower limit typically given by the formula
Resolution=(k1*wavelength)/(NA) 
Where xe2x80x9cwavelengthxe2x80x9d is the wavelength of the exposing light, xe2x80x9cNAxe2x80x9d is the effective numerical aperture of the exposure lens being used, and k1 is a constant that depends on the type of mask, the photoresist properties, and other physical parameters. NA has an upper limit value of 1 (it is the sine of an angle). For a given wavelength, it is generally accepted that the physical lower limit on k1 for conventional optical transmission lenses is approximately 0.25. In practice, however, a k1 value of 0.25 is difficult to achieve and k1 values of 0.5 to 0.8 are typical for industry manufacturing processes. The density of the images that can be achieved are directly related to the resolution. If the minimum image that can be resolved is given as xe2x80x9cQxe2x80x9d, and the minimum space between images of size xe2x80x9cQxe2x80x9d that can be achieved is xe2x80x9cRxe2x80x9d, then it is as follows:
The maximum density of images would be given as 1/((Q+R)*(Q+R)). There would be one image of dimensions Q by Q in an area (Q+R)*(Q+R).
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method for achieving device sizes below the current photolithography capability.
It is another object of the present invention to provide a method for increasing circuit component density on a wafer in an integrated circuit.
It is yet another object of the present invention to provide a method for simultaneously achieving device size below the current photolithography capability and increase component density on a wafer on an integrated circuit.
A further object of the invention is to provide an efficient and effective method for increasing circuit component density on a wafer in an integrated circuit.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
The above and other objects and advantages, which will be apparent to one of skill in the art, are achieved in the present invention which is directed to, in a first aspect, a method of forming openings on a semiconductor wafer. An initial film layer is deposited over the semiconductor wafer, then a first photoresist layer is deposited over a surface of the initial film layer. Preferably, the initial film layer includes a dielectric. An initial image is provided including a first opening in the first photoresist layer using a photolithographic technique. A first opening is created in the initial film layer by transferring the image of the first opening into the initial film layer using an etching procedure. The first photoresist layer is removed, and a second photoresist layer is deposited on the initial film layer.
Another image is provided including a second opening in the second photoresist layer using the photolithographic technique. The second opening is created in the initial film layer by transferring the image including the second opening into the initial film layer using the etching procedure. The second opening is positioned adjacent to and having a predetermined distance from the first opening. The predetermined distance between the first and second openings is less than a distance achieved by the photolithographic technique using a single photoresist exposure. Preferably, the first and second openings include vias. The second photoresist layer is removed and a final film layer is deposited over the initial film layer and the first and second openings such that the final film layer covers a horizontal surface of the initial film layer and covers horizontal and vertical surfaces of the first and second openings. Preferably, the final film layer includes a dielectric. The final film layer is anisotropically etched from the horizontal surfaces of the first and second openings and the horizontal surface of the initial film layer. Additionally, the first and second openings may include interconnecting lines.
In a related aspect, the present invention further comprises depositing a layer of conductive material on the surface of the initial film layer filling the first and second openings, and also removing the conductive material from the horizontal surface of the initial film layer.
Another aspect of the present invention relates to a method of forming openings on a semiconductor wafer which comprises depositing an initial film layer over the semiconductor wafer. A first photoresist layer is deposited over a horizontal surface of the initial film layer, then a first opening in the first photoresist layer is provided using a photolithographic technique having a first image. The first opening in the initial film layer is created by transferring the first opening into the initial film layer using an etching procedure. The first opening includes a horizontal surface and a vertical surface, and further includes a first width dimension and a first height dimension. The first photoresist layer is removed from the initial film layer, and a second film layer is deposited over the horizontal surface of the initial film layer and over the vertical and horizontal surfaces of the first opening such that the first opening includes a second width dimension and a second height dimension being less than the first width and height dimensions. The second film layer is anisotropically etched from the horizontal surface of the initial film layer and from the horizontal surfaces of the first opening such that the first opening includes the first height dimension and the second width dimension. A second photoresist layer is deposited over the horizontal surface of the initial film layer.
A second opening in the second photoresist layer is provided using the photolithographic technique having a second image. The second opening in the initial film layer is created by transferring the second opening in the second photoresist layer into the initial film layer using the etching procedure. The second opening is positioned adjacent to and having a predetermined distance from the first opening. Preferably, the predetermined distance between the first and second openings is less than a distance achieved by the photolithographic technique using a single photoresist exposure. The second opening includes horizontal and vertical surfaces, and the second opening further includes a first width dimension and a first height dimension. Moreover, the first and second openings may include vias. Then, the second photoresist layer is removed. A third film layer is deposited over the initial film layer and the horizontal and vertical surfaces of the first and second openings such that the second opening includes a second width dimension and a second height dimension being less than the first width and height dimensions of the second opening. Further, the first opening includes a third width dimension and a third height dimension where the third width dimension is less than the second width dimension. Preferably, the initial, the second, and the third film layers include a dielectric. Further, the first and second openings may include interconnecting lines. The third film layer is anisotropically etched from the horizontal surface of the initial film layer, and the horizontal surfaces of the first and second openings such that the second opening includes the first height dimension and the second width dimension, and the first opening includes the first height dimension and the third width dimension.
In a related aspect of the present invention, a conductive material film layer is deposited over the initial film layer which fills the first and second openings. Then, the conductive material film layer is removed from the horizontal surface of the initial film layer.
Yet another aspect of the present invention provides a method of forming openings on a semiconductor wafer comprising an initial step of providing a first film layer on a horizontal surface of the semiconductor wafer. The semiconductor wafer preferably comprises silicon. A layer of antireflective coating may be applied onto a top surface of the wafer before providing a photoresist layer and an image. Next, an image is provided of a first opening on a photoresist layer using a photolithographic technique, the photoresist layer is positioned on a horizontal surface area of the first film layer. The first opening in the first film layer is created by transferring the image of the first opening on the photoresist layer into the first film layer using an etching procedure. The opening includes horizontal and vertical surfaces and further defines first width and height dimensions. The photoresist layer is then removed. The steps of providing the image, creating the first opening, and removing the photoresist layer are repeated to provide a second opening in the first film layer. The second opening is adjacent to and has a predetermined distance from the first opening. The predetermined distance between the first and second openings is less than a distance achieved by a photolithographic technique using a single photoresist exposure. Preferably, the first and second film layers include a dielectric.
A second film layer is deposited over the first film layer and the horizontal and vertical surfaces of the openings such that the openings have a second width and a second height dimension being less than the first width and height dimensions. The second film layer is anisotropically etched from the horizontal surface area of the first film layer and from the horizontal surfaces of the openings such that the openings include the first height dimension and the second width dimension. A conductive material film layer is deposited over the first film layer which fills the openings. Then, the conductive material film layer is removed from the horizontal surface area of the first film layer.
A further aspect of the present invention provides a method of forming openings on a semiconductor wafer comprising an initial step of providing a first film layer over the semiconductor wafer. The semiconductor wafer preferably comprises silicon. A layer of antireflective coating deposited onto a top surface of the wafer may be applied before providing an image on a photoresist layer. An image of a first opening on a photoresist layer using a photolithographic technique is provided where the photoresist layer is positioned over a horizontal surface of the first film layer. The first opening in the first film layer is created by transferring the image of the first opening on the photoresist layer into the first film layer using an etching procedure. The first opening includes horizontal and vertical surfaces and has first width and height dimensions. The photoresist layer is then removed. A second film layer is deposited over the first film layer and the opening such that the opening has a second width and height dimension which is less than the first width and height dimension. The second film layer is then anisotropically etched from the horizontal surface of the opening such that the opening includes the first height dimension and the second width dimension. Further, the second film layer is anisotropically etched from the horizontal surface of the first film layer. The first and second film layers may preferably include a dielectric.
The steps of providing the image, creating the first opening, removing the photoresist layer, depositing the second film layer, and anisotropically etching are repeated to provide a second opening in the first film layer. The second opening is adjacent to and a predetermined distance from the first opening, and the first and second openings have different width dimensions. A conductive material film layer is deposited over the first film layer which fills the openings. Then the conductive material film layer is removed from the horizontal surface of the first film layer.
Another aspect of the present invention provides a method of forming openings on a semiconductor wafer comprising depositing an initial film layer over the semiconductor wafer. Then, a photoresist layer is deposited over a horizontal surface of the initial film layer. An opening in the photoresist layer is provided using a photolithographic technique which has an image. The opening in the initial film layer is created by transferring the opening in the photoresist layer into the initial film layer using an etching procedure. The opening includes horizontal and vertical surfaces. The photoresist layer is then removed.
The steps of depositing the photoresist layer, providing the opening, creating the opening, and removing the photoresist layer are repeated to provide additional openings being adjacent to and a predetermined distance from each other. An additional film layer is deposited over the initial film layer and the horizontal and vertical surfaces of the openings. Next, the additional film layer is etched from the horizontal surfaces of the openings, and the horizontal surface of the initial film layer. In a preferred embodiment, the steps are performed in the sequence provided.
In a related aspect of the present invention the step which includes repeating the steps of depositing the photoresist layer, is performed after the steps of depositing an additional film layer, and anisotropically etching. Further, the step of repeating the steps of depositing the photoresist layer includes repeating the steps of depositing the additional film layer, and anisotropically etching.
A further related aspect of the present invention provides depositing a conductive material film layer over the horizontal surface of the initial film layer which fills the openings, and removing the conductive material film layer from the horizontal surface of the initial film layer.