A current bias source providing a temperature-insensitive output current has many uses. For example, a current bias source may be used to charge a capacitor in a pulse generator. The pulse width from such a pulse generator is highly dependent on the accuracy and stability of the output current from the current bias source. To provide a temperature-insensitive current bias source, it is conventional to use either a bandgap circuit or a beta (β) multiplier circuit to control the current through a resistor. But low power operation of the current bias source is desirable, particularly in battery-operated applications such as smartphones and tablets. In a bandgap-based current bias source, a bandgap voltage of 1.2 V requires relatively large resistances such as 1.2 MΩ to keep the current through the resistor lower than 1 μA. Such a large resistance leads to correspondingly large area demands for the resistor implementation on a semiconductor die. It is thus conventional in low-power applications to implement a bias current source using a beta multiplier having an active resistor implemented by controlling the gate voltage on a metal-oxide semiconductor field-effect transistor (MOSFET).
An example current bias circuit 100 having a β multiplier architecture with an active resistor formed by an n-type MOSFET (NMOS) active resistor transistor MN3 is shown in FIG. 1. The source for active resistor transistor MN3 is connected to ground whereas its drain is connected to the source of an NMOS transistor MN2 that forms a current mirror with a diode-connected NMOS transistor MN1. Depending upon the gate voltage for active resistor transistor MN3, it will pass a corresponding amount of current that is also conducted by transistor MN1 and mirrored through diode-connected transistor MN1. The drain of diode-connected transistor MN1 connects to the drain of a p-type MOSFET (PMOS) transistor MP1 having its source tied to a power supply node for a power supply voltage VDD. Similarly, the drain of transistor MN2 connects to a drain of a PMOS transistor MP2 having its source tied to the power supply node.
An operational amplifier 105 controls the gate voltages for transistors MP1 and MP2 responsive to a comparison of the drain voltages for transistors MN1 and MN2. Operational amplifier 105 also controls the gate voltages for a PMOS transistor MP3 and a PMOS transistor MP4, which both have their sources tied to the power supply node. The drain of transistor MP3 connects to the drain of a diode-connected transistor MN4 having its gate tied to the gate of active resistor transistor MN3 and its source tied to ground. Feedback through operational amplifier 105 will thus control the resistance of active resistor transistor MN3. Similarly, feedback through operational amplifier 105 controls the reference current sourced at the drain of transistor MP4. But low-power operation for current bias circuit 100 requires that active resistor transistor MN3 be biased in the sub-threshold operating region, which leads to stability issues for the feedback control through operational amplifier 105. Operational amplifier 105 also requires considerable die space.
Accordingly, there is a need the art for low-power temperature-insensitive current bias circuits with improved stability and density.