1. Field of the Invention
This invention is related to the field of virtual memory systems.
2. Description of the Related Art
Virtual memory systems are implemented in computing systems for a variety of reasons. For example, virtual memory can be used to make a larger virtual memory space available to a software process while implementing a smaller physical memory. Non-volatile storage such as a disk drive may store data from the virtual memory space that is not currently in use. Virtual memory can be used to isolate different software processes executing on the same system, so that one process cannot access data that belongs to another process. Virtual memory can also be used to permit controlling software (such as an operating system, a virtual machine monitor (VMM) such as a hypervisor, or other privileged software) to relocate data in the physical memory while appearing to the process to be contiguous memory addressed in the virtual memory space. Thus, the data can be allocated to available memory anywhere in the physical memory space. Since the physical memory is shared among the processes, the ability to relocate data in the physical memory eases the burden on the controlling software.
Typically, the controlling software prepares translations from virtual addresses to the physical addresses of memory locations allocated for the virtual addresses. The translation information is stored in one or more page tables in memory, and translation hardware in the system caches the translation information to translate virtual addresses to physical addresses. The translations are performed on a page granularity. That is, a block of virtual addresses aligned to a page boundary in the virtual memory system are all translated by the same translation to a physical page in memory. The page size can vary (e.g. 4 kilobytes, 8 kilobytes, or even larger into megabytes in some cases). Some systems support a variable page size, either programmably selectable such that all pages are the selected size at a given point in time or variable on a page-by-page basis such that different page sizes are supported concurrently. The translation information that specifies a physical page address for a given virtual page is referred to as the translation for that virtual page. The translation includes a physical page number identifying the physical page, and may include various attribute bits such as a valid bit, cache attributes, etc. The virtual page is a page-aligned, page-sized block in the virtual address space, and similarly the physical page is a page-aligned, page-sized block in the physical address space.
The caching of translations speeds the process of accessing memory using a virtual address (translated to the physical address through the cached translations). However, the caches are finite and thus there are occasionally misses that require the translation to be fetched from memory into the translation hardware. Hardware may read the missing translation from memory, or software may load the translation into the hardware, in various implementations. In either case, the latency of the memory access is increased when a translation miss occurs.