The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly, to a nonvolatile memory device and a method of fabricating the same.
Nonvolatile semiconductor memory devices have the property that stored data is maintained even when an external power supply is removed. Flash memory devices are a type of nonvolatile semiconductor memory device. The flash memory device generally has a floating gate and a control gate electrode. The flash memory device can store logic ‘1’ or logic “0” by injecting/emitting charges into/from the floating gate.
A flash memory device having a split gate structure is disclosed in U.S. Pat. No. 5,045,488. According to the flash memory device disclosed in U.S. Pat. No. 5,045,488, an upper surface of a floating gate is formed into a convex shape using a thermal oxide layer to form a peak at the floating gate.
FIG. 1A is a plan view of a conventional nonvolatile memory device and FIG. 1B is a sectional view taken along a line I-I′ of FIG. 1A.
Referring to FIGS. 1A and 1B, in the conventional nonvolatile memory device, device isolation layers 12 are formed on a semiconductor substrate 10 to define an active region, and control gate electrodes 16 are formed such that they cross over the active region. Floating gates 14 are formed between the control gate electrodes 16 and the active region, and the floating gates 14 partially overlap the control gate electrodes 16.
The floating gates 14 and the control gate electrodes 16 are disposed mirror-symmetrically. The device isolation layers 12 define a first active region intersecting the control gate electrodes 16 and second active regions parallel to the control gate electrodes 16. A drain region 18d is formed in the first active region between the control gate electrodes 16, and source regions 18s are formed in the second active regions adjacent to the control gate electrodes 16.
In the conventional nonvolatile memory device, a capping insulating layer interposed between the floating gates 14 and the control gate electrodes 16 is formed using thermal oxidation. However, the bird's beak due to the oxidation makes the high integration of a device difficult. Also, the control gate electrode 16 located above the floating gate 14 is different in shape from the control gate electrode 16 located above the active region, which leads to a thickness difference of the control gate electrode 16. In addition, the source region 18s should be spaced a predetermined distance from the drain region 18d, which makes the high integration of a device difficult.