Semiconductor dies are routinely connected to larger circuit boards such as motherboards and other types of printed circuit boards (PCBs). Connection is made by use of a circuit substrate that has two sets of connection points, a set for connection to the die and a less densely-packed for connection to the PCB. The circuit substrate generally consists of an alternating sequence of a plurality of organic insulation layers and a plurality of patterned electrically conductive layers forming traces between the insulation layers. Electrically conductive vias—e.g., plated vias having organic cores—extending through the insulation layers electrically interconnect the conductive layers. A substrate core having thicker insulation and conductive layers is typically provided to provide sufficient rigidity to the substrate. Similar, yet simpler, structures known as die spacers are used to interconnect stacked semiconductor dies.
Continued advancements in integrated circuit technology have resulted in the need for substrates having higher electrical performance, higher routing density and greater heat spreading capability. The existing substrate architecture has several drawbacks, the primary problem being the mechanical and thermal characteristics of the organic insulation layers. For example, reduction of substrate z-height is hindered by the relative flexibility of the organic layers that require the use of a thick core structure. In addition, the low thermal conductivity of the organic insulation layers combined with the low metal density of the substrate limit the substrate's heat spreading capability. Moreover, the large mismatch between the thermal expansion coefficients (CTE) of the organic insulation and conductive layers induce stresses within the substrate that can cause warping and/or circuit fractures.