1. Field of the Invention
The present invention relates to a negative voltage detection circuit provided with a negative voltage boost circuit, and also relates to a semiconductor integrated circuit provided with the negative voltage detection circuit.
2. Description of the Related Art
In conventional types of negative voltage detection circuits, a negative voltage to be detected is applied to one end of a resistive divider, and a constant current is fed to the other end of the resistive divider to generate a detected voltage with a positive polarity. Then, the negative voltage is detected by comparing the detected voltage thus generated, with a reference voltage using a comparator. A mirror current may also be used as the constant current to be fed to the other end of the resistive divider. This mirror current is generated such that a current from a constant current source passes through a current mirror circuit. In addition, the reference voltage compared in the comparator is generated by a reference voltage generation circuit, such as a band gap reference (BGR) circuit which generates a reference voltage of approximately 1.25 V and depends on a temperature and power supply voltage only to a small extent. The reference voltage is then applied to an inverting input terminal of a comparator, and the output of the comparator is connected to the gate electrode of a MOS transistor. In the MOS transistor, one end of a current path is coupled to a power supply node, and a current is fed from the other end of the current path to a resistance, thereby generating a voltage. This voltage is then fed back to the non-inverting input terminal of the comparator, and a reference current is thereby generated by controlling the gate electrode of the MOS transistor. This reference current then passes through the current mirror circuit to generate a mirror current, which is then applied to the other end of the resistive divider.
A current mirror circuit consists of a pair of P channel MOS transistors whose gate electrodes are commonly coupled to each other. In general, the drain current Ids of a MOS transistor decreases when the power supply voltage decreases. Additionally, the threshold value Vth and the drain current Ids also decrease when the temperature rises. Considering the possible variation between a pair of MOS transistors due to the manufacturing process, it is preferable to increase a voltage Vgs between the gate and the source of the P channel MOS transistor constituting the current mirror circuit.
However, in the conventional negative voltage detection circuit, the operating point of the P channel MOS transistor is fixed. Therefore, in the case where a variation exists between a pair of transistors, a change in temperature or power supply voltage can cause the mirror current to deviate, thereby causing a fluctuation in the detection level of a negative voltage. As such, the precision of conventional negative voltage detection circuits is influenced by either a fluctuation in power supply voltage or temperature.