The testing of semiconductor die on a wafer is becoming increasingly difficult. Testing is complicated by factors such as increases in transistor density, increases in signal input/output (I/O) demands, decreases in semiconductor the size, and more limited I/O access. These limitations become particularly apparent when testing die with high speed or high bandwidth interfaces, such as die having Gigahertz (GHz) range radio frequency (RF), Bluetooth, 3G, 4G, Global Systems Mobile (GSM), analog, analog mixed signal (AMS), Digital Television (DTV), 5.1 Audio, digital, test access port (TAP), High Definition Multimedia Interface (HDMI), Peripheral Component Interconnect (PCI)e, Universal Serial Bus (USB)x, Digital Visual Interface (DVI), high speed input/output (HSIO) interfaces, WiFi, Wireless Local Area Network (WLAN), and clock distribution circuits.
Probing solutions using micro electro-mechanical systems (MEMS), needles, and non-contact probes have limitations when used to probe the afore-mentioned types of interfaces. Also, additional costs are incurred as a result of the unique signal mappings that are required to map the pins of a probing solution to the pin layout of an I/O interface that has been adapted for use in a particular application.
Improved methods, apparatus and systems for testing semiconductor die with the above and other types of interfaces would be useful.