Semiconductor packages are known and are generally assembled onto a carrier structure along with several other semiconductor packages in close proximity. The carrier provides electrical interconnections and is generally manufactured from a lead frame formed using an etching process. As an example, flip chip (FC) quad flat no lead (QFN) packages can be assembled on carriers based on lead frames formed using an etching process. In such packages, routing capability from the chip to the carrier is not available and the inner lead pitch is limited by etching techniques.
FIGS. 1 to 3 illustrate a known method of assembling conventional flip chip quad flat no lead packages. FIGS. 1A and 1B illustrate a metal lead frame 50 having a lead structure for receiving a flip chip. As shown in FIGS. 2A and 2B, a flip chip 55 can be mounted on the lead frame 50 using solder 60 to connect contacts on the flip chip 55 with the lead frame 50. The flip chip 55 and the lead frame 50 are then encapsulated using a molding compound 65 as shown in FIGS. 3A and 3B. Since the lead frame 50 must make contact with the flip chip 55, the limitations of this package arise from the pitch of the lead frame 50 and the ability to fabricate a sufficiently small lead frame 50 while maintaining sufficient structural strength to avoid deformation and damage.