Q:

Can Latch be used to store voltages?

What if we put S=5v , R=0v and then detach the latch IC  from the circuit what will happen at Q end ?

A:

A digital latch of any type can only store its logic 1 or 0 voltage.
If it is 5 volt logic that is what will be stored at Q for CMOS logic '1'. If it is 3.3 volt logic that is what will be stored at Q for CMOS logic '1'. Obviously a logic '0' will be zero volts, or millivolts at most.
Did you think a digital latch could store arbitrary analog values?
A sample-and-hold will briefly store a analog value, but the value will drop to zero volts in a (short) finite time. An ADC will latch in an analog value as a digital value of 4/6/8/12/16/18/24 or 32 bits.
The SR latch you mentioned will retain its 'state' if it is positive logic and 'S' is a logic '1' and R is logic '0' long enough to be valid. You mentioned 5 volts so I assume it is 5 volt CMOS logic, as TTL is seriously outdated, except some tech schools may use them. Your CMOS latch will retain its state, thus about 5 volts will remain on the Q pin.

