1. Field of the Invention
The present invention relates to a method of manufacturing memory with nano dots. More particularly, the present invention relates to a method of manufacturing memory with nano dots using self-alignment.
2. Description of the Related Art
Currently, much attention and effort are being placed on the development of nano-scale devices to be included in apparatuses such as memory, laser diodes (LDs), photo diodes, transistors, far-ultraviolet detectors, solar batteries, and optical modulators. A number of electrons that are captured in a nanodevice depends on the size of nano dots. Nanodevices may be driven with a smaller amount of electrons than conventional devices, thereby lowering a threshold current. Therefore, a nanodevice can be driven by a low voltage and still produce a high output.
Conventionally, nano dots are made by forming an atomic nucleus with Si or Si3N4 using a general deposition method such as low-pressure chemical vapor deposition (LPCVD), or by spraying nano particles over a substrate. However, this method is disadvantageous in that it is difficult to appropriately adjust sizes of the nano particles and, even if same-sized nano particles are selected and sprayed onto the substrate, it is difficult to obtain a uniform distribution of nano dots.
The information communication technology of today requires techniques of storing, processing, and transmitting large capacities of tera-class information at high speeds. In particular, nano dots should be reduced in size to several nanometers each in order to store a large capacity of information. Also, a technique of forming a uniform distribution of nano dots is required to realize high-performance memory.