1. Field of the Invention
The present invention relates to a system for generating test vectors which test the computational and operational functionality of a processor and, more particularly, to a system that generates floating point arithmetic test vectors.
2. Description of the Related Art
Many microprocessors have a floating point hardware capability. This capability is furnished by an implementation of various numerical algorithms that act on numbers configured in various floating point formats. Floating point processors attempt to approximate, as accurately as possible, the system of real numbers which is conceptually infinite and continuous. There is no upper limit or lower limit to the magnitude of real numbers. For any two real numbers a real number exists that has a magnitude intermediate to the two numbers.
A perfect computer would be able to operate on the entire real number system. However, this is not possible. Computers, regardless of size or power, ultimately operate on fixed-size data elements that limit the system of numbers that can be accommodated. Computer arithmetic on real numbers is inherently approximate. The floating point formats, numerical algorithms and implementations of floating point algorithms of different computer systems vary greatly so that the results of floating point operations also deviate, sometimes in a surprising fashion. In many instances, floating point algorithms and implementations for computer systems have been selected on the basis of speed performance, rather than accuracy.
A standard, known as IEEE/ANSI Standard 754/1985, and a later generalized IEEE Standard 854, have been established to define a floating point arithmetic implementation. These are important standards as nearly all microprocessor implementations of floating point arithmetic claim compatibility. The IEEE standard specifies the detailed binary formats of floating point numbers and defines the exact results to be obtained as a result of arithmetic operations. However, a floating point arithmetic implementation cannot possibly give the mathematically correct results in all cases because some numbers cannot be represented with infinite precision. Thus, although the IEEE floating point arithmetic standard cannot guarantee that the results of a calculation are precisely correct, it does expect that the results will be the same for different microprocessor floating point arithmetic implementations.
Software developers, users of software programs and others find it advantageous that the IEEE standard is established. However, computer designers are now faced with the task of verifying their arithmetic implementations for all operations performed on all numbers. The quantity of true real numbers is infinite. The quantity of different floating point numbers that can be represented in a processor is virtually infinite. Every test of every number and combination of numbers which is performed in the verification of an arithmetic implementation requires a discrete amount of time. Therefore, it is impossible to test an arithmetic implementation for every operation of every combination of numbers.
This task is commonly addressed by testing the results generated by a floating point implementation of a microprocessor against the results of a benchmark test suite of floating point operations and operand data. One such test suite is furnished in "A Compact Test Suite for P754 Arithmetic--Version 2.0" University of California at Berkeley, College of Engineering, Department of Electrical Engineering and Computer Sciences, Industrial Liaison Program.
In many instances a microprocessor is included in a family of microprocessors which have evolved over time to incorporate technological advances. It is commonly intended that arithmetic operations of the family of microprocessors maintain compatibility so that software that runs on one microprocessor in the family will function precisely the same when run on another microprocessor. Thus is raised a further problem of devising a test of a floating point arithmetic implementation that checks for precise duplication of the results of an existing microprocessor. This duplication of results applies not only to numerical results of calculations but also pertains to condition codes and exception and trap signals that are generated under various conditions.