1. Field of the Invention
This invention generally relates to integrated circuits and more specifically to devices for the storage and transport of such integrated circuits.
2. Description of Related Art
The storage and transportation of semiconductor components have become important considerations in the production of electronic assemblies, especially as semiconductor components have matured from inexpensive, elementary circuit elements into expensive, sophisticated, complex circuit components. As these components have grown in complexity, they have become more susceptible to damage from a number of external influences, such as mechanical shock and discharges of accumulated electrostatic charge. Consequently, there have been many changes in the transportation, assembly and testing procedures that electronic assembly production facilities utilize. Such procedures, when properly implemented, now contribute significantly to the success of such electronic assembly facilities.
For example, in certain circumstances it is important to transport a component, such as an integrated circuit, pretest it, and provide ready access to the component for delivery to or insertion into a printed circuit board. "Chip carriers" now provide such functions for individual components. A "chip carrier" is a special fixture that houses and protects an individual component, such as an integrated circuit, from damage due to mechanical shock or electrostatic discharge during processing, production, testing and assembly operations. It also can orient an integrated circuit during the production process, assure proper placement and alignment of terminals for testing and for insertion into a printed circuit board.
In other circumstances, there may only be a requirement for the storage and shipment of large numbers of integrated circuits and like components without testing. For example, integrated circuit manufacturers ship such components to customers in bulk quantities. Some customers may desire to move such components in groups or sets directly to a printed circuit board. Other customers may desire to transport or store such components and then transfer the components to chip carriers or the like for further transportation and testing. When this limited requirement exists, it is difficult to justify the costs of purchasing and handling individual chip carriers.
There are a number of devices that store or carry semiconductor components and the like in a plurality of pockets. Examples of such devices are illustrated in the following U.S. Pat. Nos.:
3,469,686 (1969) Gutsche et al PA0 3,482,682 (1969) Cronkhite PA0 3,361,253 (1972) Cronkhite PA0 3,946,864 (1976) Hutson PA0 4,057,142 (1977) Lechner et al PA0 4,210,243 (1980) McDowell PA0 4,725,918 (1988) Bakker PA0 4,792,042 (1988) Koehn et al
The Gutsche and both Cronkhite patents disclose a series of marginally registrable plastic trays. Each tray has a plurality of wells characterized by tapered walls that support a single semiconductor wafer within each well. The tapered walls prevent a polished face of a wafer from contacting any surface of the tray. It is possible to nest or stack individual trays for shipment as a unit. Thus, these trays provide a means for the bulk storage and transportation of semiconductor wafers. The Cronkhite patents provide a removable cap member that is disposed upon a rim-forming element of each well. Each cap member has a recessed portion that engages an upwardly presented surface of a semiconductor wafer to hold the wafer in a substantially immobile position in the well.
The Hutson patent discloses a package for semiconductor chips with first and second transparent plastic sheets that each contain an array of discrete and spaced depressions. When the sheets are stacked, the depressions in adjacent sheets nest and form a plurality of discrete compartments for containing the semiconductor chips. The sheets attach to each other about their peripheries to form a package for transmitting the chips in bulk. Apertures through each plastic sheet in the region of the compartments are smaller than the chips and allow access for physical testing and visual inspection while the chips remain constrained within the compartments.
The Lechner et al patent discloses a plastic pallet with plural circular depressions formed for containing semiconductor disks on an individual basis. When individual pallets are stacked on top of one another in opposite directions, they position part sector surfaces so they slope alternatively upward and downward. The upward sloping surface in one pallet is immediately above a downward sloping surface in an adjacent pallet. These counterfacing surfaces clamp the edges of the semiconductor disk so the disk can be transported with substantially no abrasion between the semiconductor disks and the pallets.
Although the foregoing references generally disclose devices for storing semiconductor wafers, such wafers do not have terminal pins that are normally encountered in finished integrated circuits. These trays are not readily adapted to devices with terminal pins. The following U.S. Pat. Nos. do disclose devices for the shipment and transportation of integrated circuit components or for circuits utilizing such integrated circuit components:
The McDowell patent discloses a tray for holding integrated circuit packages of the transistor outline type. Such packages have cylindrical cases with preformed leads that flair radially outward from the bottom of the package. Flat portions of the free ends of the leads lie in a common plane. A tray for transporting a plurality of such packages has a top plate with a plurality of funnel-shaped openings each having a cylindrical bottom portion for receiving a case. The top and bottom edges of the trays are dimensioned so that the top of a first tray nests inside the bottom of a second tray. When the nested trays are turned over, packages and openings in the first tray sit with the flat portions of their leads on the bottom of the second tray. A rim limits transverse movement of the packages set on the plate when the tray is shaken to cause them to fall into associated openings.
The Koehn et al patent discloses a chip carrier for individual electronic circuits. The chip carriers adapt for stacking for shipment. This enables a number of integrated circuit components to be shipped in bulk in a single package.
The Bakker patent discloses a box for storing electronic devices apparently including integrated circuits. The box includes a material that minimizes electrostatic accumulation and resultant discharges that could otherwise damage the electronic device.
Each of the foregoing references describes a device for use with a component of a single size or limited range of sizes. For example, semiconductor wafer and integrated circuit manufacturers use wafers of a given size or limited number of sizes. There are a limited number of transistor outline package sizes. As a result there is justification for the effort of designing specially formed trays or other devices according to the foregoing references.
However, these approaches do not adapt readily for the transportation and storage of pin grid array integrated circuit components. A pin grid array (PGA) integrated circuit component typically has a thin planar housing of a ceramic or other material for containing a semiconductor substrate and related circuitry. Terminal pins extend perpendicularly to one planar surface of the housing. The terminal pins define an array or matrix of columns and rows with an industry-standard spacing. Currently the spacing is 0.1 inch. PGA integrated circuit components come in myriad sizes that are defined alternatively by the size of the housing (from a 1 inch square to a 2.5 inch square) or by the size of the matrix (from a 9.times.9 terminal pin matrix to a 25.times.25 terminal pin matrix). Thus the adaption of a prior art design for accommodating PGA integrated circuit components would require a facility to inventory large number of specially sized trays.
A device for transporting and storing PGA integrated circuit components must also accommodate other characteristics inherent in such components. As previously indicated, many electronic assembly facilities now utilize robotic devices to retrieve a component from a storage device, orient that component accurately and position and insert the component with respect to a printed circuit board or a chip carrier. It is critical for the robotic device to "know" the position of the pins. If the robotic device only "sees" the housing, placement errors can result. Although tight tolerances exist with respect to the relative positions of the terminal pins, only relaxed tolerances exist as to the position of the terminal pin array with respect to the housing. The prior art trays and devices rely on the engagement of a housing or wafer edge. If such devices were adapted to PGA components, there would be no direct repeatable correlation between the tray and the terminal pins.
It also is desirable that any device for transporting and storing PGA integrated circuit components provide other desirable benefits. For example, it is possible for any number of external forces to transfer to the terminal pins with force components directed along and transversely to the terminal pins. To some degree, the device should protect the terminal pins from damage due to such mechanical shock during transport. The device also should prevent the accumulation of an electrostatic charge on the PGA integrated circuit component to avoid a potential discharge and damage.
U.S. Pat. No. 5,103,976 issued Apr. 14, 1992, discloses a tray for storage and transportation of multiple pin grid array (PGA) integrated circuit components. The tray has a lattice framework that defines discrete storage pocket areas. Each storage pocket area comprises a base support that spans portions of the framework and includes upstanding ribs that engage the integrated circuit component. The locus of the upstanding ribs of a given set constitutes a rectangle or square that is concentric with and spaced from the locus of other sets of upstanding ribs. Depending terminal pins from the housing lie between individual ones of the upstanding ribs. The trays are stackable.
These trays have a standard peripheral outline. It is highly desirable to maintain that outline for a wide variety of integrated circuits in order to standardize the storage trays. However, recent integrated circuit components have appeared that have a height that is greater than the height of the pocket storage areas so that portions of the integrated circuit protrude beyond the boundaries of the tray. Direct stacking of storage trays is not possible with such integrated circuits. One possible approach is to make trays of different depths to accommodate these differently sized integrated circuits. However, this eliminates the standardization of tray sizes that is highly desirable for use in automated assembly techniques.