Computer storage systems (such as optical, magnetic, and the like) record digital data onto the surface of a storage medium, which is typically in the form of a rotating magnetic or optical disk, by altering a surface characteristic of the disk. The digital data serves to modulate the operation of a write transducer (write head) which records binary sequences onto the disk in radially concentric or spiral tracks. In magnetic recording systems, for example, the digital data modulates the current in a write coil in order to record a series of magnetic flux transitions onto the surface of a magnetizable disk. And in optical recording systems, for example, the digital data may modulate the intensity of a laser beam in order to record a series of "pits" onto the surface of an optical disk. When reading this recorded data, a read transducer (read head), positioned in close proximity to the rotating disk, detects the alterations on the medium and generates a sequence of corresponding pulses in an analog read signal. These pulses are then detected and decoded by read channel circuitry in order to reproduce the digital sequence.
Detecting and decoding the pulses into a digital sequence can be performed by a simple peak detector in a conventional analog read channel or, as in more recent designs, by a discrete-time sequence detector in a sampled amplitude read channel. Discrete-time sequence detectors are preferred over simple analog pulse detectors because they compensate for intersymbol interference (ISI) and are less susceptible to channel noise. Consequently, discrete-time sequence detectors increase the capacity and reliability of the storage system. There are several well known discrete-time sequence detection methods including discrete-time pulse detection (DPD), partial response (PR) with Viterbi detection, maximum likelihood sequence detection (MLSD), decision-feedback equalization (DFE), enhanced decision-feedback equalization (EDFE), and fixed-delay tree-search with decision-feedback (FDTS/DF).
Unlike conventional peak detection systems, sampled amplitude recording detects digital data by interpreting, at discrete-time instances, the actual value of the pulse data. To this end, the read channel comprises a sampling device for sampling the analog read signal, and a timing recovery circuit for synchronizing the samples to the baud rate (code bit rate). Before sampling the pulses, a variable gain amplifier adjusts the read signal's amplitude to a nominal value, and a low pass analog filter filters the read signal to attenuate channel and aliasing noise. After sampling, a digital equalizer equalizes the sample values according to a desired partial response, and a discrete-time sequence detector, such as a Viterbi detector, interprets the equalized sample values in context to determine a most likely sequence for the digital data (i.e., maximum likelihood sequence detection (MLSD)). MLSD takes into account the effect of ISI and channel noise in the detection algorithm, thereby decreasing the probability of a detection error. This increases the effective signal to noise ratio and, for a given (d,k) constraint, allows for significantly higher data density as compared to conventional analog peak detection read channels.
The application of sampled amplitude techniques to digital communication channels is well documented. See Y. Kabal and S. Pasupathy, "Partial Response Signaling", IEEE Trans. Commun. Tech., Vol. COM-23, pp.921-934, September 1975; and Edward A. Lee and David G. Messerschmitt, "Digital Communication", Kluwer Academic Publishers, Boston, 1990; and G. D. Forney, Jr., "The Viterbi Algorithm", Proc. IEEE, Vol. 61, pp. 268-278, March 1973.
Applying sampled amplitude techniques to magnetic storage systems is also well documented. See Roy D. Cideciyan, Francois Dolivo, Walter Hirt, and Wolfgang Schott, "A PRML System for Digital Magnetic Recording", IEEE Journal on Selected Areas in Communications, Vol. 10 No. 1, January 1992, pp.38-56; and Wood et al, "Viterbi Detection of Class IV Partial Response on a Magnetic Recording Channel", IEEE Trans. Commun., Vol. Com-34, No. 5, pp. 454-461, May 1986; and Coker Et al, "Implementation of PRML in a Rigid Disk Drive", IEEE Trans. on Magnetics, Vol. 27, No. 6, November 1991; and Carley et al, "Adaptive Continous-Time Equalization Followed By FDTS/DF Sequence Detection", Digest of The Magnetic Recording Conference, Aug. 15-17, 1994, pp. C3; and Moon et al, "Constrained-Complexity Equalizer Design for Fixed Delay Tree Search with Decision Feedback", IEEE Trans. on Magnetics, Vol. 30, No. 5, September 1994; and Abbott et al, "Timing Recovery For Adaptive Decision Feedback Equalization of The Magnetic Storage Channel", Globecom'90 IEEE Global Telecommunications Conference 1990, San Diego, Calif., November 1990, pp.1794-1799; and Abbott et al, "Performance of Digital Magnetic Recording with Equalization and Offtrack Interference", IEEE Transactions on Magnetics, Vol. 27, No. 1, January 1991; and Cioffi et al, "Adaptive Equalization in Magnetic-Disk Storage Channels", IEEE Communication Magazine, February 1990; and Roger Wood, "Enhanced Decision Feedback Equalization", Intermag'90.
It is a general perception in the prior art that higher order read channels provide an increase in performance because less equalization is required to match the read signal to the desired partial response, and because higher order read channels tend to perform better at higher data densities. However, the trade-off in higher order read channels is the increase in complexity. For example, a Partial Response Class-IV (PR4) read channel, which has a transfer function of 1-D.sup.2, can be implemented simply as a pair of two-state sliding threshold detectors (see the above referenced paper entitled "A PRML System for Digital Magnetic Recording"), but it exhibits a loss in performance due to the amount of equalization required to match the read signal to the PR4 response. An Extended Partial Response Class-IV (EPR4) read channel, which has a transfer function of (1-D)(1+D).sup.2, requires less equalization which results in performance gain over the PR4 read channel. However, a full EPR4 detector requires a significantly more complex add-compare-select (ACS) state machine that operates according to an eight-state trellis.
A recent development in sampled amplitude read channels reaches a compromise between the opposing design criteria of performance versus complexity. This new technique, referred to as remod/demod sequence detection, typically employs: a conventional trellis type maximum likelihood sequence detector, such as a Viterbi detector, for detecting a preliminary binary sequence from the channel sample values; a remodulator for remodulating the detected binary sequence into a sequence of estimated ideal sample values; a sample error generator for subtracting the channel samples from the estimated samples to generate a sample error sequence; an error pattern detector for detecting potential error events in the sample error sequence; and an error corrector for correcting the preliminary binary sequence when an error event exceeds a predetermined threshold. Examples of a remod/demod sequence detector are disclosed in the above referenced co-pending U.S. patent application entitled "A Sampled Amplitude Read Channel Employing Interpolated Timing Recovery and a Remod/Demod Sequence Detector," and in a paper by Roger Wood entitled "Turbo-PRML: A Compromise EPRML Detector," IEEE Transaction on Magnetics, Vol. 29, No. 6, pp. 4018, November 1993.
The error pattern detector in a remod/demod sequence detector is typically implemented as a number of finite-impulse-response (FIR) filters matched to the dominant error events of the Viterbi sequence detector. In this manner, when the Viterbi sequence detector makes an error, the probability is high that the error pattern detector will "catch" the error so it can be corrected. A general perception in the prior art is that the error pattern detector should detect the error events in a partial response domain higher in order than the Viterbi sequence detector, which is consistent with the general perception that higher order read channels outperform lower order read channels as described above. For example, in the two aforementioned remod/demod sequence detectors, the Viterbi sequence detector operates in the PR4 domain, while the error pattern detector searches for error events in the EPR4 domain. This particular implementation approaches the performance gain provided by a full eight-state EPR4 Viterbi sequence detector, but with a significant reduction in hardware. The PR4 Viterbi detector can be implemented as a pair of sliding threshold detectors, and the error pattern detector as a bank of FIR filters.
Although the prior art PR4 remod/demod sequence detectors provide a performance gain that approaches that of EPR4 with a significant reduction in hardware, the prior art does not suggest the optimum implementation for an EPR4 remod/demod sequence detector. At best, the prior art would suggest to detect the preliminary binary sequence in the EPR4 domain, and to detect the error events in the EEPR4 domain (which has the transfer function (1-D)(1+D).sup.3). Another drawback of prior art remod/demod sequence detectors is the potential to make miscorrections when an error is falsely detected, or when the location of an error is misdetected. For example, the aforementioned remod/demod sequence detector disclosed by Roger Wood can misdetect an error because it detects the first error event to exceed a predetermined threshold, rather than detecting when the maximum error event occurs. The above-referenced co-pending patent application overcomes this drawback by detecting peaks in the error events; however, a miscorrection can still occur if the error event points to a non-error.
There is, therefore, a need for a remod/demod sequence detector in a sampled amplitude read channel for disk storage systems that provides a performance gain over a conventional EPR4 sequence detector. Another object of the present invention is to modify conventional remod/demod sequence detectors, including the aforementioned prior art PR4 remod/demod sequence detectors, to reduce the probability of miscorrections.