An active matrix display conventionally comprises a matrix of rows and columns of pixels, each pixel comprising a liquid crystal between an individual pixel electrode separated from the electrodes of the other pixels and a counter-electrode common to all the pixels. The voltage applied between the pixel electrode and the common electrode produces an electric field which orients the molecules of the liquid crystal as according to the modulus of the field. This orientation acts on the polarization of the light which passes through the crystal in such a manner as to define, in combination with the use of polarizers, a level of transmission of light which depends on the applied electric field. A control transistor (the active element of the pixel) connects the pixel electrode of all the pixels of the same column to a respective column conductor. The column conductor receives, at a given moment, an analog voltage defining a grey level to be applied to the pixel; if the transistor is conducting, this voltage is applied to the pixel electrode; otherwise, the pixel behaves as an isolated capacitor and conserves the voltage level previously received. The control transistors of the same row of pixels are controlled via a respective row conductor; thus, during the writing of an image frame, the various rows of the matrix are successively addressed for writing, at a given moment, into the pixels of the row addressed the information applied at this moment by the column conductors.
FIG. 1 shows the general structure of such a matrix, where CL denotes a liquid crystal cell and Q denotes the transistor associated with this cell, the whole assembly of the cell and the transistor forming the pixel. The common counter-electrode of the cell is denoted by CE, the individual electrode of the pixel, not electrically connected to the individual electrodes of the other pixels, is denoted by Ep. The row control conductors are denoted by L1 to Ln for a matrix with n rows. The column conductors are C1 to Cm for a matrix with m columns. A row decoder DEC successively addresses the various rows. When a row is addressed, a digital-analog conversion circuit DAC applies a set of analog voltages to the column conductors representing the image to be displayed by this row. The conversion circuit establishes these analog voltages based on a digital signal. A sequencing circuit SEQ ensures the synchronized operation of the row decoder and of the conversion circuit DAC.
The micro-display can operate in reflection mode (which is the most common in LCOS technologies) or in transmission mode.
In the fabrication of very small active matrix displays, the dimensions of the pixels can go as low as a few micrometers on a side. For example, the pitch of the pixels is 5 micrometers, which is very small. Within the surface area reserved for a pixel, room must be provided for the addressing row, for the signal column, and for the control transistor. These elements occupy a surface area which is not usable for the transmission of light through the liquid crystal since they are opaque, for example if the conductors are made of copper or aluminum. Moreover, even if it is not naturally opaque, the transistor must be protected from the light by an opaque layer, without which its operation could be affected by the light source illuminating the matrix.
As a consequence, the transmission of light through the pixel only takes place over a limited part of the overall surface area allocated to the pixel. By way of example, if the pitch is 5 micrometers in a row and in a column, the surface area reserved for a pixel is 25 square micrometers; the rows and columns can each occupy around 1 to 2 square micrometers over the length of the pixel, and the transistor around 5 square micrometers. The opaque surface then occupies between 7 and 9 square micrometers in this example. Generally speaking, the aperture of the pixel, in other words the ratio between the surface area which allows the light to pass and the total surface area of the pixel, is in the range between around 65% and 70%.
FIG. 2 shows symbolically the opaque and transparent regions of a pixel of such a matrix. The opaque row and column conductors are situated on the edges of the pixel and frame a region comprising, on the one hand, a transparent portion covered by an individual transparent electrode and, on the other hand, a transistor, also opaque, connected to the pixel electrode. For simplicity, the row L and column C conductors are considered as rigorously rectilinear, of constant width I; the transistor T is considered as being a square with a side a, but it could have another shape; the pitch of the pixel is considered as being equal to a value p both along a row and along a column. The transistor is placed in the bottom left corner in the hypothesis where its gate is connected to the row conductor situated just underneath the transistor and its drain is connected to the column conductor situated just to its left. The transparent electrode used to control the liquid crystal of the pixel is not shown. It occupies at least the surface area of the aperture left free between the row, column, and transistor opaque regions, but it can occupy almost the whole surface of the pixel.
With a simple geometric configuration such as that in FIG. 2, it has been observed that the very small size of the pixels, and hence of the patterns existing in the pixel would lead to optical defects mainly due to the fact that the size of the patterns is not very far from the wavelengths of the light which passes through the matrix. The diffraction of the light which results from this is an issue. When the display is used for observing or projecting images, this issue affects the quality of the images. When the display is used for correcting wavefronts in high quality optics, this issue has an even bigger effect since the level of interference due to the diffraction can be greater than the correction to be applied.