The present technology relates to an analog-digital (AD) converter and a signal processing system configured to convert analog signals into digital signals.
In related art, a pipeline type has been widely used for an AD converter having sampling frequency in the vicinity of 100 MS/s and resolution being from 8 bits to 14 bits.
It is because a pipeline-type AD converter has merits described below compared to a parallel-type AD converter configured to perform N-bit processing with comparators of n-th power of 2 within 1 clock cycle at once.
That is, a pipeline-type AD converter is more widely used than a parallel-type AD converter, because of its merits such as a smaller number of comparators, no necessity of a comparator with high accuracy, and N-bit processing performed by dividing into several clock cycles.
Here, operation explanation of a pipeline AD converter will be provided with an example where a 10-bit AD converter is realized by using MDACs configured to perform 1-bit processing per one stage. An input signal is shown as Vin, and reference voltage as Vr (0<Vin<Vr).
Firstly, a first-stage MDAC samples an input signal Vin in a first clock cycle and a comparator determines whether to be Vin<Vr/2 or Vin>Vr/2.
In the case of Vin>Vr/2, subtraction is performed by the first-stage MDAC to generate a signal of (Vin−Vr/2), and an amplifier doubles the signal to output an analog residual signal (2Vin−Vr). In parallel, a digital signal 1 (MSB) is output.
In a next clock cycle, a second-stage MDAC samples the analog residual signal output (2Vin−Vr) of the first-stage MDAC and a comparator compares it with Vr/2. At this time, the first-stage MDAC samples a next analog input signal and repeats processing performed in the first clock cycle.
In the case of (2Vin−Vr>Vr/2) in the second-stage MDAC, subtraction processing of {(2Vin−Vr)−Vr/2} is performed, and an amplifier doubles it to output an analog residual signal (4Vin−3Vr). In parallel, a digital signal 1 is output.
Similar operation is repeated by serially connected MDACs to output a 10-bit digital signal in 10 clock cycles.