1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for an in-plane switching (IPS) liquid crystal display device having high brightness and a method of fabricating the same.
2. Discussion of the Related Art
A liquid crystal display device uses the optical anisotropy and polarization properties of liquid crystal molecules to produce an image. Liquid crystal molecules have a definite alignment as a result of their long, thin shapes. That alignment direction can be controlled by applying an electric field. Specifically, variations in an applied electric field, influence the alignment of the liquid crystal molecules. Due to the optical anisotropy, the refraction of incident light depends on the alignment direction of the liquid crystal molecules. Thus, by properly controlling the applied electric field, an image which has a desired brightness can be produced.
Of the different types of known liquid crystal displays (LCDs), active matrix LCDs (AM-LCDs), which have thin film transistors (TFTs) and pixel electrodes arranged in a matrix form, are the subject of significant research and development because of their high resolution and superior ability in displaying moving images. Further, LCD devices have wide application in office automation (OA) equipment and video units because they are light and thin and consume low power.
A typical liquid crystal display panel has an upper substrate, a lower substrate and a liquid crystal layer interposed therebetween. The upper substrate is commonly referred to as a color filter substrate. The upper substrate usually includes a common electrode and color filters. The lower substrate is commonly referred to as an array substrate. The lower substrate includes switching elements, such as thin film transistors, and pixel electrodes.
As previously described, LCD device operation is based on the principle that the alignment direction of the liquid crystal molecules is dependent upon an electric field applied between the common electrode and the pixel electrode. The electric field applied to the liquid crystal layer controls the alignment direction of the liquid crystal molecules. When the alignment direction of the liquid crystal molecules is properly adjusted, incident light is refracted along the alignment direction to display image data. The liquid crystal molecules function as an optical modulation element having variable optical characteristics that depend upon a polarity of the applied voltage.
In an LCD device according to the related art, the pixel and common electrodes are positioned on the lower and upper substrates, respectively. The electric field induced between the pixel and common electrodes is perpendicular to the lower and upper substrates. However, the related art LCD devices have a narrow viewing angle because of the longitudinal electric field.
In order to solve the problem of narrow viewing angle, in-plane switching liquid crystal display (IPS-LCD) devices have been proposed. An IPS-LCD device includes a lower substrate, an upper substrate and a liquid crystal. A pixel electrode and a common electrode are disposed on the lower substrate. The upper substrate has no electrode. The liquid crystal is interposed between the upper and lower substrates.
FIG. 1 is a cross-sectional view of an IPS-LCD device according to the related art. As shown in FIG. 1, first and second substrates 10 and 50 are spaced apart from each other. A liquid crystal layer 90 is interposed the first and second substrates. The first and second substrates 10 and 30 are often referred to as an array substrate and a color filter substrate, respectively.
A thin film transistor T, a common electrode 34c and a pixel electrode 32 are formed on an inner surface of the first substrate 10 in each pixel P1 and P2. The thin film transistor T includes a gate electrode 12, a semiconductor layer 18, a source electrode 20 and a drain electrode 22. A gate insulating layer G1 is formed between the gate electrode 12 and the semiconductor layer 18. The source electrode 20 and the drain electrode 22 are spaced apart over the semiconductor layer 18.
The common electrode 34c and the pixel electrode 32 are aligned parallel to and spaced apart from each other over the first substrate 10. Generally, the common electrode 34c is formed of the same material as the gate electrode 12. Similarly, the pixel electrode 32 is formed of the same material as the source and drain electrodes 20 and 22. However, to improve an aperture ratio, the pixel electrode 32 may be formed of a transparent conductive material as shown.
Although not shown in the figure, a gate line, a data line and a common line are formed. The gate line extends along a side of the pixels P1 and P2. The data line is formed along a direction crossing the gate line. The common line is connected to the common electrode 34c and parallel to the gate line.
A black matrix 52 is formed on an inner surface of the second substrate 50. The black matrix 52 corresponds to the gate line, the data line and the thin film transistor T.
A color filter layer 54a and 54b is formed on the inner surface of the second substrate 50. The color filter layer 54a and 54b includes three sub-color filters of red, green and blue colors. Each sub-color filter 54a and 54b corresponds to each pixel P1 and P2.
Liquid crystal molecules of the liquid crystal layer 90 are aligned by an electric field 95. The electric field 95 is induced between the common electrode 34c and the pixel electrode 32 parallel to the substrates 10 and 50.
FIG. 2 is a plan view of an array substrate of an IPS-LCD device according to the related art. As shown in FIG. 2, a plurality of gate lines 14 are formed on a substrate 10. A common line 16 is formed between adjacent gate lines 14 parallel to the gate lines 14. A plurality of data lines 24 are extended in a direction perpendicular to the gate lines 14 and the common line 16 and are spaced apart from each other. The data lines 24 define sub-pixels P by crossing the gate lines 14 and the common line 16.
A thin film transistor T is formed at one side of the sub-pixel P. The thin film transistor T includes a gate electrode 12, an active layer 18, a source electrode 20 and a drain electrode 22. The drain electrode 22 has an extension part 26, which is extended over the common line 16.
A common electrode 34a, 34b, 34c and 36 and a pixel electrode 30 and 32 are formed in the sub-pixel P. The pixel electrode includes a horizontal portion 30. The horizontal portion 30 is connected to the extension part 26 through a first contact hole CH1 and a plurality of vertical portions 32. The vertical portions 32 are vertically extended from the horizontal portion 30. The extension part 26 and a part of the common line 16 overlapping each other constitute a storage capacitor CST. The extension part 26 represents a first electrode and the part of the common line 16 represents a second electrode of the storage capacitor CST.
The common electrode 34a, 34b, 34c and 36 includes a first vertical part 34a, a second vertical part 34b, a plurality of third vertical parts 34c and a horizontal part 36. The first and second vertical parts 34a and 34b are disposed along both sides of the sub-pixel P and are connected to the common line 16 through second and third contact holes CH2 and CH3, respectively. The first and second vertical parts 34a and 34b are extended over two sub-pixels P that are vertically adjacent. The plurality of third vertical parts 34c are alternatively arranged with the vertical portions 32 of the pixel electrode. The horizontal part 36 is connected to the plurality of third vertical parts 34c and the second vertical part 34b. Here, the second vertical part 34b vertically contacts both the horizontal parts 36 of the adjacent sub-pixels P.
In the above-mentioned array substrate, 6 blocks D1, D2, D3, D4, D5, and D6 are formed in one sub-pixel P. The 6 blocks D1, D2, D3, D4, D5, and D6 are defined as spaces between the vertical parts 34a, 34b and 34c of the common electrode and the vertical portions 32 of the pixel electrode.
Meanwhile, as shown in FIG. 2, in the case of a quad type device, which includes red, green, blue and white sub-pixels, one pixel includes four sub-pixels, which are mutually adjacent vertically or horizontally.
In the IPS-LCD device, to cover influences from the data line 24, the common electrode 34a and 34b should be close to the data line 24. Accordingly, the number of blocks between the common electrode 34a, 34b and 34c and the pixel electrode 32 may be an even number.
Table 1 shows widths of elements in designing an array substrate for a related art IPS-LCD device including a sub-pixel of 6 blocks.
TABLE 1Blocks6Width of gate line16 μmWidth of data line20 μmWidth of pixel electrode4.5 μm Distance between data line and common4.5 μm electrodeWidth of outer common electrode9.0 μm Space between electrodes12.0 μm  Aperture ratio31.90
The IPS-LCD device having the conditions of Table 1 corresponds to a 15 inch XGA (extended graphics array) model. Here, the data line having a width of about 20 μm reduces an aperture area. Thus, the data line may have a maximum effective width of about 10 μm.
An aperture area is expanded as the number of blocks increases. However, although the width of the data line decreases, the number of blocks does not increase. Moreover, widths of the common electrode 34c and the pixel electrode 32 may decrease. Spaces between the electrodes may also decrease. Accordingly, the maximum efficiency cannot be obtained. Specifically, if the widths of the common electrode 34c and the pixel electrode 32 decrease sharply while the spaces between the electrodes have an effective value, it is likely that the electrodes are down during the manufacturing processes. If the spaces between the electrodes decrease, the increase in number of blocks is offset by the narrowing of the spaces. Accordingly, the aperture area is not increased.
To increase the aperture area, more blocks, such as 7 blocks, may be formed. However, since the common electrode should be near by the data line, the sub-pixel that includes 7 blocks cannot be formed. Thus, the sub-pixel should include an even number of blocks.
Therefore, although the above-structure array substrate can have a wider aperture area, the lines and the electrodes may have somewhat broad widths due to even blocks. Accordingly, a higher aperture ratio cannot be obtained.