In a computer system, a processor and a storage (including a memory) are two indispensable components. As a data processing amount of an application program (such as a big data type application) continuously increases, a requirement of the computer system on a capacity, a bandwidth, and the like of a storage system (including a memory system) accordingly increases. In a conventional computer system, a memory and a processor are integrated on a same node, and this manner limits scalability of a capacity and a bandwidth of a memory system. Therefore, in an existing computer system, a memory node exists as a standalone node. In this specification, it is defined as follows: A computation node is similar to a conventional node and mainly provides a processor resource, and a memory node is a node that specifically provides a memory resource. The computation node and the memory node are interconnected by using a network (which may be an electrical network, or an optical network), to form a complete computer system.
An all-optical switching network in a computer system means that an optical fiber or a waveguide is used as a medium for transmitting a signal between a computation node (such as a processor) and a memory node (such as a storage). In the all-optical switching network, data transmission is performed all by using an optical signal instead of an electrical signal. In the computer system set up by using the all-optical switching network, a fiber interconnection between the computation node and the memory node is implemented by using an optical switch chip, to provide the computation node with a large-capacity memory system and a data channel having an ultra-high bandwidth.
FIG. 1 shows a typical computer system set up by using an all-optical switching network. The computer system mainly includes a computation node, a memory node, and an optical switch chip. The computation node mainly includes a processor and a cache. The computation node may run an application program, and read data in the memory node according to an access requirement of the application program. The memory node mainly includes a memory module and control logic, and the control logic is used to implement a read/write operation on data in the memory module according to an access request of the computation node.
Data transmission is performed on different data transmission links in the network by using a switch chip or a switching chip, and mainly includes two manners: circuit switching and packet switching. Circuit switching means that the switch chip establishes a physical channel between two ports: an egress and an ingress that are corresponding to a communication-required computation node and/or a memory node. Packet switching means that a data request of a computation node or a memory node is sent to a buffer of the switching chip in a form of a packet, and the switching chip sends the packet from a corresponding egress to a corresponding memory node or computation node according to specified control logic and a specified policy. Because an optical signal cannot be buffered, the optical signal needs to be converted into an electrical signal for buffering in an optical switching network, that is, optical-to-electrical signal conversion and electrical-to-optical signal conversion need to be introduced.
To implement all-optical switching, the optical switch chip in FIG. 1 uses the circuit switching manner. When a memory node communicating with a computation node (such as a computation node A) is changed (for example, an original memory node is a memory node A, and a changed memory node is a memory node B), that is, when a communications link between the computation node and the memory node is switched (that is, is switched from a link between the computation node A and the memory node A to a link between the computation node A and the memory node B), the optical switch chip needs to disables a physical channel of a related optical link (that is, disables a physical channel between the computation node A and the memory node A), re-allocate a physical channel to a corresponding computation node and memory node, and establish a new optical link between the computation node and the memory node (that is, re-allocate a physical channel between the computation node A and the memory node B).
Due to limitation of an existing optical module, optical link re-establishment introduces a large quantity of time overheads. The time overheads mainly include three parts: a link re-arrangement time, an optical receiver lock time, and a data link switching and recovery time. The link re-arrangement time is defined as a time required for disconnecting an original optical link and establishing a new optical link. The optical receiver lock time is defined as a required time from establishment of the new optical link to a time point at which an optical receiver can stably receive an optical signal. The data link switching and recovery time is defined as a verification code sending and receiving time required for ensuring that data can be correctly received on the new optical link. For an optical link whose bandwidth is 25 Gbit/second (b/s), an optical link re-establishment time requires several milliseconds. However, generally, a delay of accessing a memory node by a computation node is only hundreds of nanoseconds approximately. Consequently, the optical link re-establishment time greatly deteriorates access performance, and further deteriorates application running performance of the computation node.
It can be learned that, how to reduce impact on access performance by time overheads of optical link switching is extremely important for a computer system using all-optical circuit switching.
Currently, a time delay of optical link re-establishment is mainly reduced by optimizing optical link hardware. First, an optical switch in an optical link, a drive circuit of the optical switch, and the like are optimized, to reduce the link re-arrangement time. Second, a clock and data recovery (CDR) component, a transimpedance amplifier (TIA) component, a limiting amplifier (LA) component, and the like in an optical link receiving module are improved, to reduce a signal lock time of each component after establishment of a new link. However, due to limitation of a process and a technology, reducing the time delay of optical link re-establishment by optimizing the optical link hardware has a limited effect, and is difficult to achieve a relatively great progress within a short period of time.