1. Field
Example embodiments relate to semiconductor fabrication technology, and more particularly, to a process of fabricating a semiconductor device having a silicon layer in contact with a metal layer.
2. Description of Related Art
Due to smaller and highly-integrated semiconductor devices, contacts in DRAMs have decreased in size. The decrease in contact size can lead to a decrease in contact area, and thus can increase contact resistance. A product of the reaction occurring between an interfacial surface and a layer to be in contact therewith may show an abnormal characteristic value. Specifically, the contact between the silicon layer and the metal layer can cause an increase in contact resistance caused by heterojunction.
To address this issue, technology of forming a silicide layer having an interfacial property between the silicon layer and the metal layer can be used.