The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component that can be created using a fabrication process) has decreased. As geometry size gets smaller, the packaging process of ICs becomes more challenging. One of the current packaging processes employs a “flip chip” technology, where an IC is flipped and bonded with an external substrate. However, temperature fluctuations in existing flip chip bonding processes may result in excessive thermal stress, which may then lead to delamination or cracking of the IC.
Therefore, while existing methods of semiconductor packaging have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.