A sequencer is a component in a computer which tells the computer what is the address of the next instruction to be performed in a program. The sequencer can step through programs via an interleaved control store which contains the sequence and control for branching and subroutines. With modern random access memory (RAM) technology and fast CPU times, the time it takes to get the next address takes two CPU cycles. However, it is desirable to have a control store look-up every CPU cycle in order to achieve increased performance. Therefore, a microcode program is often "interleaved", so that during the performance of the first instruction, a second instruction is begun. The first instruction will point to the address of the next (the third) instruction which is begun during the performance of the second instruction. Similarly, the second instruction points to the address of the next (fourth) instruction which is begun during the performance of the third instruction. A program in which one instruction points to the next instruction is commonly known as a linked listing.
As should be evident from the above, the first and third instructions know nothing of the second and fourth instructions and vice versa. It is therefore conceivable to have two distinct program flows going their separate ways, neither one having anything to do with each other. However, in practice, the two flows should stay together as part of one program so that coding for the programmer does not become overly convoluted.
One of the functions of the sequencer is to respond to changes in the state of the machine. The sequencer can respond to a specified state by microbranching to another address to get the next microinstruction. If the sequencer does a microbranch, without doing anything more, then the two interleaved flows will become separated because one flow has microbranched and the other flow will know nothing about this microbranch. This would make microcoding extremely difficult. The prior art solution to this problem has been to change the address of the instruction in the non-branching flow based on the instruction from which the program branched in the branching flow so that the previously non-branching flow will now follow the branching flow. That solution cuts in half the available addresses for the allocator, as will be explained in more detail later.