Silicon carbide has been an attractive potential material for use in electronic devices for many years. Because silicon carbide has no low temperature phase changes, a comparatively wide energy bandgap, a high breakdown field strength, a high saturated electron drift velocity, and chemical resistance to most species commonly found in the environment of electronic device processing, silicon carbide has been an enticing, though largely unrealized candidate material for applications involving rigorous mechanical and thermal shock, as well as high operating temperatures, high power, high frequency, and intense radiation.
Many types of silicon carbide made by a variety of processes have been tried as candidate substrate materials. Previous efforts include the use of substrates made from the consolidation of finely divided ceramic powders (sintering), substrates made by various reactions of silicon metal, carbon, and other additives (sometimes referred to as the "Carborundum Process"), and substrates made by seeded sublimation (single crystal).
A silicon carbide ceramic monolith made by consolidation of finely divided particles, for example by "sintering", is too porous to support circuit lines measuring less than 0.25 microns wide. Though significant portions of the monolith may exhibit pores no larger than 1 or 2 microns, occasional larger pores measuring 75 microns across will occur which cannot be reduced in size or number by controlling the manufacturing process and therefore must be detected at great cost by measuring each part after the cost of manufacturing has been incurred.
Silicon carbide made by consolidating or reacting finely divided particles produces the wrong crystallographic form to support an electronic device. Randomly oriented hexagonal or rhombohedral or a combination thereof in crystal shape, commonly referred to as "alpha SiC", randomly oriented wafers confer random orientation to thinfilms, resulting in epilayers with non-uniform electrical properties. Device quality is limited. Researchers have shown, however, that by coating a monocrystalline alpha SiC wafer or substrate with a very thin barrier layer of silicon carbide containing a dopant such as aluminum, gallium, or phosphorus to fill vacant lattice positions, the "crystal shape memory" that would otherwise be imparted by the alpha SiC to a subsequent beta SiC epilayer can be blurred so a device quality layer of oriented beta SiC can be formed. Since .beta.SiC has only one crystalline form, namely {111} Face Centered Cubic, oriented epilayers of .beta.SiC have uniform electrical properties.
Large single crystal silicon carbide is made by a very slow, capital intensive process entailing the sublimation of silicon carbide onto a small single crystal seed. The process for making large single crystal silicon carbide has to date been unable to produce the standard, large diameter wafers currently preferred by device manufacturers to minimize fabrication costs. U.S. Pat. No. 4,866,005, incorporated herein in its entirety by reference, describes one such method of growing large single crystals. The largest single crystal silicon carbide substrates commercially available measure only 50 mm diameter compared to the 200 mm or 300 mm diameter substrates normally used in industry. A 50 mm substrate has only 1,962.5 mm.sup.2 of potentially useable surface area on one side compared to 31,400 mm of potential surface area for a 200 mm substrate. Since it costs about the same for a device manufacturer to process a 200 mm wafer as to process a 50 mm wafer, devices made using a 200 mm wafer cost only 6.25 percent as much as devices made using 50 mm wafers. Because 50 mm substrates are only available in small quantities costing more than $2,000 per wafer, using a 200 mm substrate would represent significant savings to a device manufacturer even if the 200 mm substrate sold for $2,000.
Other issues arise from the use of large single crystal silicon carbide. Many of these issues are described by U.S. Pat. Nos. 4,912,063 and 5,200,022, incorporated entirely herein by reference. Single crystal silicon carbide is made at temperatures favoring the formation of the .alpha.SiC polytype. The "alpha" silicon carbide (.alpha.SiC) polytype is a collective reference to some 170 types of hexagonal and rhombohedral crystal shape classifications. The most common is the 6H hexagonal polytype. Most .alpha.SiC polytypes are separated by small thermodynamic differences that are difficult to control in a temperature dependent manufacturing process like that used to make large single crystals.
Beta SiC (.beta.SiC) is the only cubic crystalline polytype of silicon carbide. Theoretically an excellent semiconductor material, deposition of .beta.SiC with oriented crystals (also referred to as epitaxy, epilayers, or "thin films") on various ceramic or silicon metal substrates has been attempted on various occasions over many years. The difficulty of producing consistently high quality, low carrier concentration .beta.SiC epitaxial layers on substrates or wafers other than small .alpha.SiC single crystal wafers with numerous defects has prevented any meaningful penetration of the potential market for devices in silicon carbide.
Difficulty and defects notwithstanding, electronic devices of commercial significance have been demonstrated in single crystal .alpha.SiC wafers, but never in polycrystalline or .beta.SiC wafers. Discrete devices demonstrated in and on .alpha.SiC include Schottky diodes, PIN diodes, various types of metal oxide semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETS), metal semiconductor field effect transistors (MESFETs), gate turn-off thryristors (GTOs), integrated gate bipolar transistors (IGBTs), and static induction transistors (IGBTs). Non-volatile random access memory (NVRAM) is an example of an integrated circuit that has been done in single crystal .alpha.SiC wafers. Opto-electronic devices that either emit light or detect the emission of light have been made in .alpha.SiC single crystal wafers with either silicon carbide as an epilayer or compositions of gallium nitride, indium nitride, or aluminum nitride as epilayers. In fact, wide band gap devices have been made using GaN doped with silicon or magnesium active epilayers on .alpha.SiC single crystal wafers.
In order to provide a hospitable surface on large .alpha.SiC single crystal wafers to support epitaxial .beta.SiC layers, .alpha.SiC substrates are sawn from crystal boules at 2 to 8 degree angles to the {0001} surface plane. Wafers are then lapped and polished to a smooth surface. Cutting the wafer from a boule at an angle to the {0001} basal plane exposes a multitude of high energy faces to nucleate growth of a SiC epilayer. The (0001) surface of 6H-SiC provides a surface that matches the Coefficient of Thermal Expansion (CTE) and lattice parameter of the (111) basal plane of .beta.SiC very closely. Low defect PSiC epilayers have thus been applied to single crystal .alpha.SiC.
The process of lapping and polishing single crystal .alpha.SiC substrates cuts through a multitude of surfaces to expose surface features associated with higher surface energy than a broad, flat single surface. A surface intersecting multiple crystalline lattice planes creates a series of physical "steps". Multiple steps transmit three dimensional lattice information to an epitaxial layer usually causing formation of a mixture of alpha and beta polyforms in the epitaxial layer, thereby making the subject layer unsuitable for high quality devices. Applying a buffer layer containing a dopant reduces the tendency of the epilayer to form multiple polytypes, as previously mentioned.
Substrates used to support magnetic media in hard disk drives (U.S. Pat. No. 5,623,386) have demonstrated many of the attributes of chip substrates useful for making discrete and integrated circuit electronic devices. The mechanical requirements for disk drive substrates rotating at up to 10,000 rotations per minute with heads gliding less than 0.025 microns above the substrate surfaces surpass the mechanical requirements of chip substrates. Magnetic media, in turn, needs a substrate without surface defects such as pits that cause "dead spots" in the media or surface features exposing different lattice planes that cause variations in the magnetic media, commonly referred to as "noise".
The size of surface pits or defects on disk drive substrates which can be tolerated, however, is considerably larger than the size of surface defects which can be tolerated for high quality electronic devices (approximately 2 microns for disk drive substrates versus &lt;0.1 microns for high areal density integrated circuits for example). Apart from the issue of exposing higher energy lattice positions that might cause undesirable crystalline forms, media used for disk drives is much thicker than epitaxial thinfilms used in conjunction with wafers and media can more easily "bridge" surface discontinuities. Magnetic media is also different than epitaxial thinfilms in the way it functions. Magnetic media does not require electrical continuity. Data bits in magnetic media are magnetic media are magnetic domains, the polarity of which determines whether an individual bit is either a 0 or a 1 binary code.
It has nevertheless been generally accepted that polycrystalline SiC monoliths will not support epitaxial SiC thin films of the purely beta polyform required for some high quality electrical devices. It has furthermore been generally accepted that polycrystalline silicon carbide would not have the electron mobility needed for electronic devices because the surfaces of individual crystals within a polycrystalline mass would resist the flow of electrons beyond acceptable limits.