1. Field of the Invention
This invention relates to a processor and more particularly to a processor which subdivides each word it receives into a plurality of multibit bytes and then performs logical and arithmetical operation on each word on a byte-by-byte basis.
2. Description of the Prior Art
The function of a processor in a system environment is to receive information such as instructions, commands, and data from the system, process the received information, and then transmit the processed results back to the system in the form of new, altered, or changed information words. The typical processor internally operates upon information words of the same bit size as those received from and transmitted to the system. Thus, if words in a 16-bit parallel format are received from the system of which the processor is a part, the processor internally manipulates and performs logical and arithmetic operations on the words in the same 16-bit format.
This mode of operating a processor is satisfactory and even desirable in systems in which high speed operation (high processor throughput) is required and in which the lowest possible processor cost is not of paramount importance. Such is the case in large systems wherein the cost of the processor is only a small portion of the overall system cost. There are many systems however, such as small line size PBXs, in which the design of the processor significantly determines the overall system cost and wherein satisfactory results may be obtained from a processor having only a moderate or even a relatively low throughput. In other words, there are many systems that can provide satisfactory service with a low speed processor.
Considerable economics can currently be achieved in processor design by using relatively inexpensive and readily available 4-bit slice medium scale integrated circuits. With these chips, it is known to construct a processor that receives data words and information from an I/O system in a 16-bit parallel format, breaks down every received word into a plurality of multibit bytes, performs logical and arithmetical operations by manipulating the bytes one at a time, and then reconstitutes the manipulated bytes into 16-bit words which are transmitted back to the I/O system.
The Data General Corporation of Southboro, Massachusetts manufactures computers which operate in a 4-bit byte-by-byte manner. However, these computers are designed primarily for commercial minicomputer applications, and they are somewhat limited in their internal structure as well as in the type of operations they can perform with a given amount of memory. Although they are adequate for the mass application commercial market, they are not ideally suitable for use in applications, such as PBX system controllers, where a maximum level of operational sophistication must be achieved with a minimum of memory. It might possible for the currently available byte-by-byte machines to perform more sophisticated operations. However, this could only be done with an increased amount of bulk memory which, in turn, would increase the cost of the machines and render them economically unsuitable for certain applications.
It is therefore a problem to provide a processor that requires less memory to perform sophisticated operations than do the currently available machines.