HfOx/AlOy Superlattice‐Like Memristive Synapse

Abstract The adjustable conductance of a two‐terminal memristor in a crossbar array can facilitate vector‐matrix multiplication in one step, making the memristor a promising synapse for efficiently implementing neuromorphic computing. To achieve controllable and gradual switching of multi‐level conductance, important for neuromorphic computing, a theoretical design of a superlattice‐like (SLL) structure switching layer for the multi‐level memristor is proposed and validated, refining the growth of conductive filaments (CFs) and preventing CFs from the abrupt formation and rupture. Ti/(HfOx/AlOy)SLL/TiN memristors are shown with transmission electron microscopy , X‐ray photoelectron spectroscopy , and ab initio calculation findings corroborate the SLL structure of HfOx/AlOy film. The optimized SLL memristor achieves outstanding conductance modulation performance with linearly synaptic weight update (nonlinear factor α = 1.06), and the convolutional neural network based on the SLL memristive synapse improves the handwritten digit recognition accuracy to 94.95%. Meanwhile, this improved synaptic device has a fast operating speed (30 ns), a long data retention time (≥ 104 s at 85 ℃), scalability, and CMOS process compatibility. Finally, its physical nature is explored and the CF evolution process is characterized using nudged elastic band calculations and the conduction mechanism fitting. In this work, as an example the HfOx/AlOy SLL memristor provides a design viewpoint and optimization strategy for neuromorphic computing.


The binary switching behavior of HfOx-based memristor
. Long-term synaptic plasticity of Ti/HfOx/TiN memristor. The device was programmed by 50 depression pulses of -1.3V (100ns) for the LTD process and 50 potentiation pulses of 1.4V (100ns) for the LTP process. An abrupt switch occurred during the LTD process.
2 Figure S2. Schematic illustration of the dynamic evolution of VO CFs for Ti/HfOx/TiN memristor under the continuous programming pulses. a) Post-Forming state, there is a robust CF formed during the forming process. b) There is a large gap formed between the top electrode (TE) and CF after the application of the first RESET pulse, which is corresponding to the abrupt decrease of conductance with the first RESET pulse applied as shown in Figure S1. c) d) Once the large gap formed, the following RESET pulses are hard to enlarge it and the decrease of conductance will be slower. Thus, the linearity of LTD for the Ti/HfOx/TiN memristor is nonideal. For the LTP process, e) after the first SET pulse is applied, a weak CF will form between the residual robust CF and TE and the conductance will increase gradually. f) g) h) With the subsequent series of SET pulses applied, the width of the weak CF will increase until becomes a strong CF again and the conductance will increase gradually at the same time.  To screen out the suitable combination of materials for SLL switching layer, the VO formation energies of 6 common binary metal oxide memristive materials were calculated, including m-HfO2, m-ZrO2, TiO2, ZnO, Al2O3, and γ-phase Ta2O5, as described in Figure S3.
The VO formation energy represented the difficulty of generating VO in the oxide materials, which can partly reflect the difficulty of VO migration. The VO formation energy was calculated by the Vienna Ab initio Simulation Package (VASP), where the generalized gradient approximation (GGA) was used for the exchange-correlation energy, within the Perdew-Burke-Ernzerhof (PBE) functional. For each structure, a supercell of at least 10Å×10Å×10Å was established for the calculation of VO formation energy. A constant 500 eV plane-wave kinetic energy cutoff was used throughout the calculations. The valence electron configurations are 5p, 5d and 6s for Hf and Ta, 3s and 3p for Al, 3p, 3d and 4s for Ti, 3p and 3d for Zn, 4s, 4p, 5d and 5s for Zr, 2s and 2p for O. In the self-consistent calculation, the convergence precision of the total system energy is less than 10 -6 eV/Å. The VO formation energy is calculated from equation S1: where Ef represents the formation energy of VO, Ev is the energy of a supercell with an VO, Ep is the energy of a supercell without VO, and µO is the chemical potential of oxygen atom (-4.96 eV). [1] The calculated results are presented in Figure  S4, where Ef(Al2O3)>Ef(HfO2)>Ef(ZrO2)>Ef(Ta2O5)>Ef(TiO2)>Ef(ZnO), consistent with the previous reports. [2,3] Hence, if we choose HfO2 as the basic resistive switching material, only Al2O3 can be used as the barrier layer. According to the calculated results, Al2O3 is suitable to be used as a barrier layer for its highest Ef, and the blocking effect would be more significant when combined with the materials with lower Ef such as TiO2 or ZnO. Figure S5. Forming process comparison of thick SLL memristor (4 cycles of 15 atomic layers of HfOx and 5 atomic layers AlOy) and thin SLL memristor (13 cycles of 3 atomic layers of HfOx and 1 atomic layer AlOy). a) Post-forming state of two memristors, the thick SLL memristor is prone to thermal breakdown during the forming process. b) Forming process comparison, the initial resistance of thick SLL memristor is 6 orders of magnitude higher than that of thin SLL memristor, in addition, the forming voltage of thick SLL memristor is about 4.8V and that of thin SLL memristor is 1.25V. According to the optimization results, when the thickness of AlOy barrier layers is thick, the initial resistance and forming voltage (VF) of the SLL memristor will become too high, the VF close to 5V is adverse for the integration of transistors. Meanwhile, the high VF also increases the possibility of thermal breakdown during the forming process, as shown in Figure   S3. When the thickness of AlOy layers decreases to only one atomic layer, the forming voltage will be reduced to 1.25 V and the device is less prone to thermal breakdown. In addition, reducing the thickness of AlOy layers can decrease the VF, and increasing the number of cycles can improve the number of conductance states, which are consistent with our design expectation.

Composition Optimization of HfOx/AlOy SLL film
As illustrated in Figure S4 there are trip points for the SLL memristors with thick HfOx layers and thin AlOy layers. When the composition of HfOx is much higher than that of AlOy and each AlOy layer ais just one or two atomic layers, the ability of AlOy barrier layers to regulate the CFs will be weakened leading to the abrupt switching behavior. X-ray photoelectron spectroscopy (XPS) spectra were obtained with AXIS-ULTRA DLD-600W equipment to determine chemical binding states and atomic ratio of different elements in HfOx/AlOy SLL film and HfOx film. The binding energy was calibrated with the position of the C1s peak at 285 eV. As shown in Table S1, the atomic ratio of Hf and Al is about 5:3 in HfOx/AlOy SLL film, and both these two films are non-stoichiometric which means there are numbers of VO formed in the as-deposited film. Figure S7. The element profile along the thickness direction of (30HfOx/10AlOy)×5 layer by EDX analysis. By applying a series of voltage pulses with increasing amplitude or width, we further investigated the response of HfOx/AlOy SLL memristor to V pulse. Figure S7a, b show the response of resistance to increasing amplitude Vpulse with a fixed pulse width of 10ns, which means that the operating speed of the memristor is ≤10ns. Figure S7c, d show the response of resistance to increasing width Vpulse with a fixed pulse amplitude of 2.5V, which means that the operating power consumption of the memristor is <0.25nJ.  Figure S10. Differential charge density at the interface of the HfOx layer and AlOy layer.

Atomic concentration of HfOx/AlOy SLL film and HfOx film
To investigate the bonding situation at the interface of the HfOx layer and AlOy layer, we established an interface model between HfOx layer and AlOy layer and calculated the differential charge density at the interface. Figure S8 shows When it comes to HRS, the device follows Schottky emission conduction mechanism, which illustrates the drastic rupture of CF during the RESET process. Comparing these two SLL models, the migration energy of the film with 1 AlOy cycle is lower than that of the film with 3 AlOy cycles, especially for the energy to cross the AlOy layer.
The reduction in migration energy is mainly due to the reduction in the thickness of AlOy layer, The abnormally tiny DOS for the "conduction band" at the AlOy layer actually reflects the impact of adjacent HfOx states, while the hide band gap of AlOy serves as a barrier for electron conduction. Figure S16. Resistance statistical results of 15 independent HfOx/AlOy SLL memristor samples, and each cell was operated for 10 cycles. The mean value of LRS is 2.6 kΩ and of HRS is 59.2 kΩ, the standard deviation of LRS (σLRS) is 1.1 kΩ and σHRS is 7.8 kΩ. Due to the analog switching behavior, the distribution of resistance state is uneven. Figure S17. DC characteristics of 5 HfOx/AlOy SLL memristor samples operated for 10 cycles, all the cells exhibited bidirectional analog switching behavior. Figure S18. The device-to-device variation of HfOx/AlOy SLL memristor's conductance update, where the data of LTD and LTP process were acquired from 5 samples with the 30ns operating pulse. The mean coefficient of variation of LTD (CVLTD) is 8.38% and the mean CVLTP is 12.08%, which were from calculating the CV of conductance corresponding to each pulse and averaging.