Recent advances in inorganic oxides-based resistive random-access memory devices

Memory has always been a building block element for information technology. Emerging technologies such as artificial intelligence, big data, the internet of things, etc., require a novel kind of memory technology that can be energy efficient and have an exception data retention period. Among several existing memory technologies, resistive random-access memory (RRAM) is an answer to the above question as it is necessary to possess the combination of speed of RAM and nonvolatility, thus proving to be one of the most promising candidates to replace flash memory in next-generation non-volatile RAM applications. This review discusses the existing challenges and technological advancements made with RRAM, including switching mechanism, device structure, endurance, fatigue resistance, data retention period, and mechanism of resistive switching in inorganic oxides material used as a dielectric layer. Finally, a summary and a perspective on future research are presented.


Introduction
Our modern-day life demands high-speed data storage, low-voltage operation, continuation access, and low-cost electronic devices. Thus, the ability to store information at a faster timescale is essential for advanced innovative purposes such as cloud computing, data mining, machine learning, the internet of things, and artificial intelligence (AI), to mention a few. For the successful operation of an electronic device, a system needs both temporary as well as permanent memory components, and these requirements are usually accomplished by using semiconductor-based memory devices such as dynamic random-access memory (DRAM), static random access memory (SRAM), and flash memory [1]. SRAMs are considered as one of the high-speed memory devices which are capable of storing information as long as the power is supplied which makes SRM volatile. It utilizes six transistors per bit (6Ts/bit) as shown in Fig. 1(a), and works perfectly for small embedded systems, thus making it unsuitable for the desktop memory system.
The DRAM uses the presence or absence of charge to store data and needs continuous refresh cycles to prevent its contents from vanishing. Unlike SRAM, the DRAM also uses only one capacitor and transistor per bit (Fig. 1 b) to store charge thus, differentiating between "0" and "1" states. Flash memory or flash storage is a class of memory devices used to transfer and store data between a computer and digital devices.
It holds information for a longer period, irrespective of whether either flash device is powered ON or OFF.
A flash memory employs the metal oxide semiconductor field-effect transistor (MOSFET) technique to store data by switching the electronic signals shown in Fig. 1 c. However, the SRAM is too expensive as its bit cell comprises six transistors, which occupy a large area and consume more power than other technology. Along with the volatility, SRAM is also vulnerable to exposure to radiation [2][3][4][5][6]. The DRAM is slow and requires an enormous amount of power to perform its function. DRAM has a strong chance of data leakage, which means the cell is refreshed constantly and displays an added complexity in the memory device. Flash memory is limited as it requires a high electric field to accomplish erase and rewrite operations [7][8][9]. Therefore, researchers have been effectively probing the charge-independent memory devices to revolutionize the existing memory hierarchy. The classification of memory devices is shown in Fig. 2. These evolving information storage technologies target to combine the non-volatility behavior of flash drives along with the storage density of DRAM and the Erase-Rewriting speed of SRAM, which will make them a fascinating replacement for future memory technology. The ideal memory device should possess necessary features such as excellent data retention time, superior scalability, low operating power, and less energy consumption. However, it is challenging to find any memory devices with all these ultimate features.

Fig.2 Classification of memory technology
Recently researchers have come up with novel resistance-based memory technology which can meet a part of these ideal qualities. In place of a charge storage mechanism, these class of memory devices store information in response to changes in the arrangement of atomic positions of the ferromagnetic layer, this change in the orientation leads to a change of resistance of the system and is termed resistive memory devices, occasionally the resistive memory devices are also known as memristive devices, due to their association with the idea of the memristive system. A few notable examples of this class of memory devices are spin-transfer torque magnetoresistive random access memory (STT-MRAM), Phase change memory (PCM), and Ferroelectric random-access memory (FeRAM), and resistive random-access memory (RRAM) [10,11]. A brief idea of the same is provided in the next paragraph.
Spin-transfer torque magnetoresistive random access memory (ST-MRAM) is a category of nonvolatile solidstate information storage device, where the magnetic tunnel junction (MTJ) plays a decisive role in the storage of information/data. The MTJ comprises two ferromagnetic layers, one has a free magnetic alignment, and the other has a fixed alignment. The two ferromagnetic layers have been separated by an insulating dielectric tunnel barrier of the thickness of 4 to 6 nm shown in Fig. 3a. If the direction of magnetization is identical in the reference layer as well as in the free layer, then the MTJ cell is known to be in a low resistance state (LRS), and when the direction of magnetization is antiparallel, then it is in high resistance state (HRS), respectively. The data recording in STTMRAM is executed by changing the magnetic alignment of the insulating layer by using spin-polarized current, and subsequent difference in the resistance of the MTJ cell is used for information storage. STT-MRAM is a more appropriate technology for upcoming high-end memory devices due to its unique features such as simple architecture, low energy consumption, high scalability, and high-speed operation. ST-MRAM displays much better endurance compare to that flash drives with excellent data preservation properties. Irrespective of all these outstanding properties, the ST-TMRAM also faces some severe issues in small tunneling magnetoresistance ratio, lack of suitable material for fabrication, critical size, thermal instability, etc [12][13][14][15][16][17]. Phase change memory (PCM), also known as chalcogenide RAM (CRAM), is a nonvolatile memory device that stores information at a nanometer scale. The essential feature of any memory device is that it should allow the storage and fetching of the data. PCM memory device comprised of a phase change material sandwiched between two conducting electrodes. PCM device writes data by recording the change in electrical resistance of phase change material when it switches from the ordered crystalline phase (low resistance state "1") to the strongly disordered amorphous phase (high resistance state "0") and vice versa, shown in Fig. 3b. The data retention duration of PCM is very high as it can store information for 8-10 years at a room temperature of 25 o C, which could make PCM be effectively used as Flash memory whose operating speed is almost fast as compared to volatile memory devices like DRAM [6][7][8][9]18]. Irrespective of many valuable properties and applications, PCM also possesses a few challenges which need to be addressed. The first one is the need for high programming current density (10 7 A/cm 2 ) to match the level of a diode. Unarguably the major concern associated with PCM is its threshold voltage drift and long-term resistance [11,[18][19][20][21][22][23][24][25]. By obeying the power law, resistance of the amorphous phase increases slowly with the applied voltage, thus restricting it from the multilevel operation and hindering the regular twostate operation if the threshold voltage is raised above the designed operating value. Apart from PCM and MRAM, researchers have also explored another class of nonvolatile memory devices known as resistive random-access memory (RRAM) devices. RRAM possesses many significant advantages over other memory storage devices such as RRAM can be easily scalable, easy fabrication technique, high-speed operation, very high erase/write cycle, low power utilization, ultra-fast speed, and long data retention duration. This forces the researchers to carry out an extensive amount of research on eliminating the flaws and enhancing the properties of RRAMs so that they can offer an economical solution to future memory devices. The comparisons of properties and configuration of different types of RAMs are depicted in Table.1. Multibit capacity To fabricate high-performance RRAMs, numerous kinds of materials have been extensively explored, starting from quantum dots, hybrid composite, layered material, 2D material, ferromagnetic material, and organic and inorganic materials. In this review work, we will be focusing on inorganic metal oxides compositions for RRAMs application, as these materials possess lots of advantages like fast switching cycle, less fabrication cost, low power consumption, long term stability, and many more [26]. Here we briefly discuss their operational mechanisms.

Fundamentals of RRAM devices
Over the years, resistive random access memory (RRAM) has been extensively studied owing to its unique properties and easy fabrication process, which proves to be the perfect replacement for transistor-based flash memory devices [5,6,[27][28][29]. The RRAM is a kind of memory device that operates on change in resistance of the material under the application of electric potential. This phenomenon has been widely studied in numerous oxide materials due to their adaptability to the complementary metal-oxide-semiconductor (CMOS) nanofabrications [4]. RRAM possesses a considerable advantage over other exiting technology in terms of high fatigue resistance, high polarization switching (10 12 cycles), low operating voltage (~ ±1 V), ultrafast processing speed (< 1 ns), and can be further scaled down to compact size, thus can be utilized as the next generation Nonvolatile memory technologies [25,[30][31][32][33]. The structural configuration of resistive RAM is based on capacitor type metal insulator metal (MIM) structure shown in fig.4(a). The insulator layer used in the RRAM device is usually made up of oxide elements like Tantalum (Ta), Titanium (Ti), etc.; some of the 2D materials and chalcogenide have also been reported to be used for the same [6,27,32,[34][35][36][37][38][39][40]. Stacking of the RRAM devices can be available in the form of a single layer and as well in the form of multilayered stacking depicted in Fig. 4b.

Operating principle of RRAMs
RRAMs usually operate by exploiting the reversible alteration in the electrical resistance of the insulating oxide layer. Usually, the conductive path plays a vital aspect in the operation of resistive RAM. The conducting path usually consists of conducting filaments, which form in the insulator usually due to defects, strain, and mobile oxygen vacancies, and its process of formation is discussed here.
Initially, the RRAM used to be in a high resistance state (HRS), and an externally applied voltage transforms it into a low resistance state (LRS) usually happens due to the formation of conductive filaments in the switching layer. These conducting filaments reduce the device's net resistance, thus providing an easy pathway for the flow of current across the device which eventually led to the soft breakdown of metal/insulator/metal (MIM) structure, usually known as a process of electroforming and the voltage at which electroforming occur is known as forming voltage (Vf). Forming voltage strongly depends upon the thickness of the oxide layer and the area of the cell. The mechanism of switching resistance from LRS to HRS is known as SET, and the device is known to be in an ON state, however when the device is switched back to LRS from HRS, known as RESET operation, the resistance of the device drastically increases due to breaking of the conductive filaments, which results in blocking of supply of current, and eventually, the device turned to be in OFF state. Depending on this SET and RESET state, the memory device reads a bit "1" or bit "0" thus, responsible for the resistive switching phenomena in RRAM shown in Fig. 5 [27,32,34,36,[41][42][43][44][45][46][47][48].

Fig.5 Depiction of SET and RESET states of the RRAM device
Sometimes many SET/RESET (S/R) operations can damage the electrical component of the device, which usually comes into the picture due to the construction of uncontrolled conductive filaments; this can be checked by the current limit known as compliance current which protects the device from the further damage. For RRAM to function appropriately, a forming process is needed to be done during electrical measurements. Generally, in the virgin device, the conduction of current is hindered due to the presence of an adequate number of defects in the insulator layer, which can be corrected by the soft breakdown of the insulator layer by applying a high forming voltage. This applied voltage increases the concentration of defects in the dielectric layer, which eventually helps to trigger the high current during routine operation. However, some RRAM devices are forming free as they don't have to go through the high voltage forming process because the defects can be introduced in the insulator layer of these devices at the time of fabrication only, thus allowing an easy pathway for the conduction of current during regular SET/RESET operation.
On basis of the polarity of externally applied voltage, the resistive RAM is further categorized into three different types of switching modes: unipolar, bipolar, and single resistive type switching mode. In unipolar switching, the SET and RESET phenomena of the data storing device are sovereign of the polarity of applied voltage bias, and switching of the resistance states occurs by providing a voltage of the identical polarity but with a contrasting amplitude. The current-voltage relation of the same is shown in Fig 6. In unipolar switching, joule heating plays a crucial role in breaking the conducting filaments during the RESET process. Moreover, in bipolar switching, the SET and RESET mechanism usually depends on the polarity of the applied voltage; switching from HRS to LSR is taken care of by the same polarity, whereas the opposite polarity shifts the RRAM cell back to its HRS.

Types of switching mechanisms in RRAMs
Based on the fabrication process, numerous switching mechanism can be exploited in RRAMs few of them is Ag2 Thermochemical switching: In this switching mechanism, the redox reactions are thermally induced, thus leading to the variation of local conductivity and resistivity of the material and known as thermochemical RRAMs (TCM RRAMs). Due to the thermal behavior of the fundamental process, the switching mechanism between different resistive states is unipolar. The SET and RESET operation is carried out by heat-driven formation rupture of the conductive filament in the non-conducting layer of the MIM structure [1,35].
Valence change switching: This type of switching mechanism is dominant in the devices based on mobile donor type defects (like oxygen ions). In presence of applied voltage, the oxygen atom is released from the insulating layer and migrates towards the electrode leaving behind oxygen defects, depicted in Fig. 7c which eventually lead to the formation of defect-induced conducting filaments. Usually, in the VCM device, the transition metal oxide (TMO) with inert metal like Pt is utilized as an electrode to obstruct the drift of ions from the electrode. A VCM system can be can further distinguished into two groups filamentary switching followed by interface switching.
In filamentary VCM devices, the RS behavior occurs due to the creation of vacancy-based filament, whereas in interface type VCM, the switching is carried out through the thickness modulated tunnel barrier mechanism. The interface type VCM displays a stable switching mechanism compared to filamentary type VCM devices [35,58,60].

Performance index of RRAMs
The switching mechanism of the RRAMs strongly depends on some figure of merits such as endurance, speed, data preservation, power consumption, switching time, operating voltage, variability, etc. This section will discuss these factors in detail and highlight some best work reported on RRAMs.

Endurance:
Operating of RRAMs involves multiple switching from HRS to LSR and vice versa; each switching process introduces some kind of permanent damage to the RRAMs, which eventually degrades their performance, this degradation is known as endurance. The endurance of any memory device is known by executing a series of current-voltage sweeps in a resistive switching cell and extracting the value of resistance for both LSR and HRS by applying a small amount of read voltage, normally at 0.1 V. Generally, the endurance of around 10 12 has been reported in RRAMs device comprise of Ta/TaOx/TiO2/Ti stacks and Pt/Ta2O5−x/TaO2−x/Pt. Many groups have observed that if the resistive layer of the memory device is made up of oxygen-rich Tantalum, it will display high endurance value [1,58,61]. Several aspects influence the total endurance of the memory device. The first one in this list is temperature; it has been observed that the endurance value of the RRAMs is drastically decreased with the increasing temperature, second factor is the choice of the writing mode, as the endurance value is very high in writing a single byte compared to page write. In page write, the charge pump is distributed over multiple bytes, whereas in programming a single bit, the pumping of charge is very much focused on a single byte, thus leading to the cell's wear and tear. The third and final point is the designing issue of the device, the researcher should explore numerous ways to design a memory device of excellent endurance for better performance.

Data retention:
Data retention of RRAMs is defined as the period over which the HRS and LRS of the memory device remain stable after undergoing SET and RESET switching, irrespective the device is electrically powered ON or OFF.
The state retention of RRAMs is known by measuring the Current vs. time curve by applying constant voltage stress for both HRS and LRS. The data retention time in LRS is usually low, and the reason behind this is the set voltage induced atomic rearrangement. In contrast, in HRS, the retention time is generally in the natural state of the MIM structure, and RRAMs will persist in the same state if no external voltage bias is applied. Data retention bank on temperature, usually decreases with the increasing temperature, possibly due to the repeated change in the atomic positions. The average data retention period of RRAMs-based on inorganic heterostructures is approximately 10 to 15 years.

Homogeneity:
For the successful operation of the RRAMs device in day-to-day life, it should execute a stable resistive switching.
One of the primary reasons that prevent it from the further application is the poor homogeneity issue. Few factors responsible for the same are switching voltage, fabrication process, and the resistance of RRAMs in its LRS and HRS, thus creating a high degree of variability. Among all, the material used during the switching process plays a crucial role in variability in RRAMs devices. As we know, the formation of conductive filaments usually creates the LSR, and the conduction of current in LRS generally displays ohmic behavior. Still, in some cases, the nonohmic or tunneling type behavior is also observed. Whereas HRS is formed by rupturing of the conductive filament of MIM structure, and the conduction mechanism is usually governed by Schottky type, pool Frenkel type, and space-charge limited current (SCLC), makes it challenging to forecast the mechanism of conduction in HRS, eventually make it relatively challenging to portray the variability of HRS compare to LRS. Device variability along with the conduction mechanism in HRS depends on several factors including processing condition, dielectric nature and strength of the insulating layer, defects mobility, and interfacial properties of the electrode. There are a couple of well-established materials, such as Ta2O5, Al2O3, TiO2, HfO2, etc., which are successfully used for resistive switching in RRAMs devices [58,61].

Speed:
A switching time between two states plays an important factor that defines the efficiency of the RRAMs device.
The extensively used NAND Flash can display a switching time of 100 µs. In contrast, the newly emerged technology such as PCRAM and ST-TRAM has been reported to achieve operation speeds of 2.4 ns and 10 ns, respectively. Among different types of RRAM, the conductive filament type RRAMs is reported to exhibit the switching speed of 300 ps, thus making them one of the fastest and most efficient memory devices. Several reports suggest that the switching in the sub-nanosecond region is infrequent and very difficult to achieve. The switching speed of more than 120 ps was claimed in Ta2O5 based RRAM devices in 2011 is by Torrezan et al. [49,62]. A couple of other researchers have also observed the SET and RESET switching time less than 500 ps in Pt/SiO2based memory devices, an impressive switching speed under 85 ps has been achieved in nitride-based memory devices [60,[62][63][64][65]. All this research concludes that the switching rate strongly banks on the current-voltage (I-V) measurement setup of the memory devices.

Power utilization:
The process is around 10 10 µW and 0.65 µW, thus displaying low power consumption during operation [33]. The I-V plot and resistive switching mechanism of the device during SET and RESET are shown in Fig 8 and Fig 9.  So far, the RS behavior has been explored in numerous classes of inorganic as well as organic material starting right from oxides, halides, chalcogenides, heterostructure, 2D material, 1D material, etc. [66]. In this review, we will be putting an insight into inorganic material potentially used for RRAMs and its derivative application purposes [67].

Resistive switching in metal oxides:
Among all available materials, the metal oxide enjoys a simple structure with many advantageous features such as wide bandgap, low preparation cost, well precise electrical behavior, electrically and thermally stable, electrochemically stable broad morphology, and safe for the environment. These fascinating properties make them an ideal candidate to be used for diverse application purposes such as sensors, optical waveguides, spintronics, transparent conducting oxides (TCO), photovoltaics, memory devices, and resistive switching. The first investigation of resistive switching behavior in binary oxide was studied by Hickmott in 1962 on Al/Al2O3/Al device configuration by [68][69][70]. Since then, this phenomenon has been largely explored in numerous binary metal oxides such as ZnO, NiO, CuO, MgO, HfO2, TiO2, Al2O3, Nb2O5, Fe2O3, Ta2O5, and many more. Among all ZnO gets an edge for the same due to its fabrication-friendly nature [71]. Over the year, the researcher has studied ZnO widely for RRAM application purposes by employing expensive electrodes such as Ag, Au, and Pt, but Lin et al.
has investigated the RRAM properties using inexpensive Aluminum electrode at different Argon/Oxygen concentration (Ar/O2 ratio of 2 and 3). Ar/O2 gas flow ratio of 2 displays an excellent switching cycle up to 221 times and a high HRS/LRS ratio, which reaches 10 9 shown in Fig.10 [72].

Figure 10 I-V cure and switching cycle of (need to take permission from S12)
The effect of doping on ZnO has been studied by numerous authors, [73][74][75][76][77][78][79][80][81]   cycles, displaying its excellent endurance behavior, which can be a decisive factor in fabricating 5G memory device with artificial intelligence (AI) [83]. TiO2 has also been extensively investigated by the researcher for memory application due to its easy fabrication process, high dielectric constant, stable crystal structure, and high reversible capacity [84][85][86][87]. Chen et al. has utilized TiO2 as an active layer interceding between two conducting electrodes (ITO/TiO2/Pt) for RRAM application. The Electrical measurement of the prepared RRAM memory device displays a notable low operational parameter with the SET and RESET voltage of 0.6 V and -0.5V, respectively. The TiO2 based RRAM device displays a bipolar RS behavior with an HR to LRS resistance ratio of greater than one order of magnitude and a data retention period of something over 10 4 seconds. The I-V curve on the log-scale reveals the conduction mechanism of the RRAM, mostly dominated by the ohmic conduction in SET as well as in RESET states [84]. Ismile et al. displayed a meliorate resistive switching behavior in a bilayer TiO2 based memory device by inserting a switching layer of non-stoichiometric CeO2-X between the top TaN electrode and the TiO2 layer in TaN/CeO2-x/TiO2/Pt RRAM device, deposited through radio frequency (RF) sputtering technique at 25 o C. In contrast to single-layer switching devices, the fabricated bilayer device displays a significant improvement in DC over the switching cycle (>1.2x10 4 ), retention period (>10 4 s), switching voltage, reliability, and endurance. The enhanced switching uniformity in the TiO2 based bilayer RS device is also achieved, the primary reason responsible for the same is oxygen vacancy assisted formation and destruction of conducting filaments [88]. A similar kind of enhanced resistive switching behavior was performed by Trapatseli et al. by depositing a very thin Al2O3-y buffer layer between TiO2 film and top contact. The inclusion of a buffer layer has two roles, first to increase the oxygen vacancy in the system and the other one was to provide a stable formation and eruption of conductive filament, which eventually increases the endurance and other device performance (switching speed, adaptability of switching, and low operational power, etc.). The application of this type of bilayer device is not just limited to NVRAMs application but has also proved to be an excellent candidate to be used for neuromorphic computing (detailed discussion is provided in the next section) [ have been used in this work. The temperature-dependent I-V measurement in a non-switching regime reveals a bias-induced interfacial resistive switching mechanism, which is well supported by the steady-state SET and RESET process. A typical bipolar switching behavior was displayed by the device having top contact with Ni, Pt, and Au [91]. Ebenhoch et al. has explored the memristive behavior in hydrothermally synthesized TiO2 nanorods array placed between FTO acting as a bottom electrode and Au as a top electrode (FTO/TiO2/Au). A significant decrease in resistance of the bulk nanorods was observed, mainly arising due to the accumulation of mobile oxygen vacancies at the interface of FTO and grain boundaries. A relaxation behavior in the fabricated device was probed by the I-V measurement. However, the fabricated TiO2 NRs based memristor device displays a hysteresis behavior but does not supervene the typical unipolar, bipolar or complementary switching path. Instead, it displays a time-dependent current-voltage relation. Further, the effect of defect reaching grain boundary on the I-V behavior was studied by coupling the electronic measurement with SEM and STM [91]. TiO2 NRs can be prepared by numerous methods, among all the low-cost hydrothermal method was incorporated by Huang et al.
to synthesize TiO2 NRs and explored the RS behavior in it. Electrical measurement was performed on FTO/TiO2 NRs/Pt RRAM device, revealing the nonlinearity up to 10, which eventually decreases the leakage current up to 10 -4 Acm -2 , thus endorsing the self-selecting RS behavior. the resistance of HRS and LRS are predicted using I-V measurement, and it is of the order of 10 5 and 10 4 at the read voltage of 6V, and the Ratio of RHRS/RLRS of approximately 10 to 10 2 respectively. The obtained results offer a great opportunity to utilize the self-selecting RS behavior in a binary metal oxide, which is much needed to overcome the sneak path issue in the RRAM element to attain large passive crossbar arrays [92].
Recently, HfO2 has also been vigorously studied for the RS application due to its low operation power, high nonlinearity, and high speed [93]. Luo  can create a boom in the field of wearable electronics [96]. While resistive switching behavior has been observed in a ample range of transition metal oxides (TMOs), among them, the Niobium pentoxide (Nb2O5) displays metalinsulator-metal (MIM) type two-terminal memristor application in both crystalline and as well as in amorphous phases exhibiting unipolar, bipolar and non-polar RS mode. The primary reason behind this is its simple structure, wide bandgap (> 3.5eV), high permittivity (40), higher capacitance density (17 fF/µm 2 ), and assorted switching characteristics. However, its low SET/RESET ratio and forming process somehow limits its practical applications [97][98][99][100][101][102][103][104][105]. The RS behavior in Pt/Nb2O5/Al device was shown by Deswal et al., synthesized through the reactive sputtering method. The fabricated device displays a nonvolatile unipolar resistive switching behavior with the SET/RESET resistance ratio greater than 10 3 . I-V measurement reveals the Ohmic and SCLC type conduction mechanism in LRS and HRS, respectively. The author incorporated the oxygen ion vacancy model to study the formation and rupturing of the conductive filament during the ON and OFF state, which will eventually help in the fabrication of a highly competent RS device [106]. Deposition temperature also plays an important role in the RS mechanism. Its effect on the PLD deposited Nb2O5 films on Silicon substrate was studied by Xu  on the switching characteristics and synaptic behavior. Device with Ti as the top electrode needs an electroforming process to start the switching process, whereas the device with Ag as the top electrode doesn't require a forming process to do the same in RESET process, primary reason behind this is the difference in the composition of the conductive filament of both devices. Similarly, the device with Ti as a top electrode displays a VCM type switching mechanism, on the other hand, the Ag as a top electrode displays both VCM and ECM type dual-mode switching mechanism. This type of study enhances the level of understanding of the complex switching mechanism of the RRAM device, which will further fill the technical void currently faced by the researcher working in the field of memory devices [111]. Song [112].

Perovskite material for memory device application
For the last couple of decades, the perovskite material known to be the most probable candidate for industrial application owing to its unique features such as widbandgapap, high curie temperature, chemically stable, stable crystal structure, and high tolerance ratio, and susceptibility to doping, etc. Additionally, the strongly coupled electrons in these systems offer various electronic phases and display multifunctionality in behavior such as electroresistance, colossal magnetoresistance, superconductivity, ferroelectricity, and ferroelasticity, multiferroicity, etc. [113][114][115][116][117][118][119][120][121][122][123]. Also, the metal-insulator transition displays a substantial amount of variation in resistance to applying even a minute electrical stimulus, making them an eligible candidate to be used for RRAM application [122]. Among all, BaTiO3 is the most common perovskite material explored for resistance switching A deterioration in switching property was observed when the thickness of the ferroelectric layer was 7 and 70 nm. Detailed investigation of energy band structure and I-V curve states that the RS behavior strongly depends upon hustling between the tunability of the width of a depletion layer and the capability of ferroelectric filed effect, thus providing an efficient way to tune the RS behavior of multilayer heterostructure device by inserting a ferroelectric buffer layer [125]. lee et al. have explored the RS phenomena in ALD prepared SrTiO3 perovskite material sandwiched between Pt-based electrodes. The fabricated device was susceptible to the electroforming process only when a negative bias voltage was applied, whereas it displays a bipolar RS behavior with set and reset in positive as well as in negative biases, respectively [125]. Khalid et al. explored the RRAM application in hybrid nanocomposite devices comprised of SrTiO3 and PVA, sandwiched between conducting Silver electrodes.
The fabricated device displays a bipolar RS behavior with low operating voltage, outstanding data retention period of 8.6x10 4 , switching ratio of 30 at the read voltage of 1V, and electrical endurance of 500 operating cycles.
Along with the switching behavior, the mechanical robustness of the device was also tried and tested and revealed the mechanical endurance of 500 bend cycles at the bending diameter of 15 mm, which makes them a potential candidate to be used as a flexible device [125]. Apart from BaTiO3 another perovskite material that has been explored for a similar application purpose is BiFeO3 as it displays an excellent magnetodielectric property; Kumari et al. has fabricated a RRAM device using sol-gel prepared BiFeO3 thin film sandwiched between Ag and FTO conducting electrode (Ag/BiFeO3/FTO). The fabricated device displays a stable bipolar RS behavior with the ON/OFF ratio of 450, low operating voltage of 1.1 V for SET and -1.5 for RESET state, respectively and large data retention period upto 10 4 sec. The possible conduction mechanism in LRS and HRS is governed by the ohmic and trap assisted space charge limited current (SCLC) in both positive and negative bias [126]. Same group has shown the forming free switching in BiFeO3 based RRAM device grown on glass coated FTO as a bottom electrode and Aluminum as a top electrode. The fabricated device displays a nonvolatile bipolar switching behaviour with DC and AC endurance of more than 250 and 7100 cycles, respectively. The data retention period is similar to the previous one (10 4 sec.). The switching mechanism was governed by the rupture and formation of oxygen vacancy intermediated conducting filaments, endorsed by the AlOx layer formation [127]. Yan et al. has shown the capacitance and resistance-based memory device by utilizing the multilayer stacking of DyMnO3 and Nb: SrTiO3 perovskite oxide stacked between conducting Au electrode and staking will look like Au/DyMnO3/ Nb: SrTiO3/Au. The device shows a very high retention time of 10 5 sec with a ratio of RLHS/RHRS is greater than 100 over the 10 8 switching cycles. The serial connected Au/DyMnO3/Nb: SrTiO3 heterostructure acts as a high nonlinear resistor paralleling with a capacitor and improves the stability of the memory device [127].

Conclusion and outlook
From the discovery of the first primordial computer in the 1970s to the modern day's supercomputers, smartphones, laptops, and automated vehicles, the most critical and common part that control its operation is its nonvolatile memory. This review deals with a concise introduction to the growth and development of memory architecture, the operating mechanism, and the limitations while keeping a valuable insight into the area of evolving memory technologies. The nonvolatile memory has been differentiated into PCM, STTRAM, SRAM, DRAM, FLASH memory, and RRAM, among all the RRAM, proves to be the most promising one due to its unique properties such as high fatigue resistance high polarization switching (10 12 cycles), low operating voltage (within 1V), ultrafast processing speed (less than one ns), and can be further scaled down to compact size, thus can be effectively used as the next generation Nonvolatile memory technologies. This review extensively deals with the eligible oxide-based compositions such as ZnO, TiO2, HfO2, Ta2O5, Nb2O5, and many more for the RRAM applications and the effect of doping, defect engineering, varying the oxygen content, and impact of different electrode material on the performance of the RRAM device has also been discussed in detail. The low power and efficient way to integrate a large number of the incoming signal of RRAM makes them eligible for bio-inspired based artificial synaptic applications such as neuromorphic computing, artificial intelligence, internet of things, etc. discussed in this review. Although a substantial amount of success has been attained in RRAM technology; but still much work is needed as RRAM still mimicking from numerous challenges in form of higher operation current, reduced resistance ratios, variability problems, reliability at cell-level, and device-level, and, highly smooth structure designs which must be encountered for its better and smooth application in diverse field.