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JP5101143B2 - Field effect transistor and manufacturing method thereof - Google Patents
Field effect transistor and manufacturing method thereof Download PDF
insulating film
drain electrode
gate electrode
孝 水谷
毅 田中
哲三 上田
国立大学法人名古屋大学
パナソニック株式会社
2007-03-26 Application filed by 国立大学法人名古屋大学, パナソニック株式会社 filed Critical 国立大学法人名古屋大学
The present invention relates to a normally-off type field effect transistor composed of a group III nitride semiconductor with reduced channel parasitic resistance, increased maximum drain current, and increased transconductance, and a method of manufacturing the same.
In recent years, field effect transistors using Group III nitride semiconductors are widely used because of their wide band gaps, enabling high breakdown voltage, high temperature operation, high frequency operation, high output, high voltage signal input / output, etc. Have been researched.
When a field effect transistor using a group III nitride semiconductor is used as a switching element for a high voltage, it is essential to realize a normally-off transistor. As this normally-off type MOSFET, a transistor described in Non-Patent Document 1 is known. In this transistor, a p-type GaN layer is formed on a sapphire substrate, a high electron concentration source region in which Si is diffused on the surface portion of the GaN layer, and Si at a position facing the source region. A diffused drain region having a high electron concentration is formed. Then, a SiO 2 film having a thickness of 100 nm is formed on the surface of the GaN layer between the source region and the drain region. However, this MOSFET has a problem that the parasitic resistance of the channel is large, the maximum drain current is small, and the mutual conductance is low.
A HEMT having an AlGaN / GaN structure is also an effective device for the above applications. In particular, in order to reduce gate leakage current, MIS-HEMT using an insulating film directly under the gate electrode is effective. In the following Patent Document 1, a normally-off transistor is realized by thinning only the barrier layer under the gate electrode and thickening the barrier layer under the source and drain electrodes in the MIS-HEMT.
Patent Document 2 below discloses a MOSFET made of a silicon semiconductor. In this MOSFET, a structure is disclosed in which the overlap capacitance between the gate electrode and the polysilicon film serving as a lead to the source diffusion region and the drain diffusion region is reduced to prevent the generation of parasitic resistance. In this structure, a polysilicon film doped with arsenic is formed, and this arsenic is thermally diffused into the silicon substrate to obtain a source diffusion region and a drain diffusion region. Then, the polysilicon film is thinned near the gate electrode, thickened where no gate electrode is present above, and the sidewall width of the insulating film existing between the gate electrode and the polysilicon film is gate-insulated. The first and second sidewalls are formed by narrowing on the side close to the film and increasing the thickness on the side far from the gate insulating film.
Further, in Patent Document 3, in a MOSFET using silicon, in order to reduce gate induced drain leakage current (GIDL), a source diffusion region and a drain diffusion region are formed instead of the LOCAS method to form a gate insulating film. The upper edge gate insulating film is composed of a plurality of layers and is thickened to reduce GIDL and improve the breakdown voltage.
W. Huang, T. Khan, and TPChow, "Enhancement-Mode n-Channel GaN MOSFETs on p and n-GaN / Sapphire Substrates," IEEE Electron Device Letters, Vol. 27, no. 10, pp. 796-798 , Oct. 2006. JP2006-222414 JP-A-8-335696 JP 2006-344957 A
However, in the case of realizing a normally-off type field effect transistor with the structure of Non-Patent Document 1, there are problems that the maximum drain current is small and the mutual conductance is low. In addition, in the MIS-HEMT of Patent Document 1, the thickness of the group III nitride semiconductor is accurately set because the barrier layer under the source and drain electrodes is thick and the barrier layer under the gate electrode is thin. It must be controlled and etched. However, it is difficult to wet-etch a group III nitride semiconductor, and as a practical problem, wet etching has not been put to practical use. In fact, a high-performance normally-off MIS-HEMT could not be realized because the group III nitride semiconductor could not be wet etched.
In the method of Patent Document 2, the source region and the drain region are formed by diffusion of arsenic doped in the polysilicon film. However, in the group III nitride semiconductor, depending on the diffusion, the low resistance source region and This method cannot be used because the drain region cannot be formed. In this method, after the polysilicon film and the oxide film are deposited, the polysilicon film and the oxide film are etched to form a thin region of the polysilin film, to form a wide first sidewall by self-alignment, Etching of the polysilicon film in the gate portion by self-alignment, formation of a narrow second sidewall by self-alignment, formation of a gate insulating film, formation of source and drain diffusion regions by thermal diffusion of arsenic, gate electrode This requires a number of steps of forming and the manufacturing process is complicated.
In Patent Document 3, phosphorus is ion-implanted into a silicon substrate to form a source diffusion region and a drain diffusion region. However, in group III nitride semiconductors, when impurities are ion-implanted, crystallinity is lowered, and it is difficult to form a low-resistance source diffusion region and drain diffusion region. It is difficult to form a large, high-performance element.
Thus, it is highly expected to realize a normally-off type field effect transistor using a group III nitride semiconductor having a high maximum drain current, a large mutual conductance, and an excellent withstand voltage.
In particular, realization of a normally-off field effect transistor that can be applied to a low-frequency switching element capable of controlling a high voltage is greatly expected.
The present invention has been made to solve the above-mentioned problems, and its purpose is to reduce the parasitic resistance of the channel to increase the maximum drain current and to have a large mutual conductance and excellent device characteristics. It is to realize a normally-off type field effect transistor easily.
In order to solve the above problems, the following means are effective.
That is, the first invention is a normally-off type field effect transistor made of a group III nitride semiconductor, in which a current flowing through a channel formed in the semiconductor layer is controlled by a voltage applied to the gate electrode, and made of a group III nitride semiconductor. A source electrode made of metal formed on the uppermost semiconductor layer, a drain electrode made of metal formed on the uppermost semiconductor layer and spaced apart from the source electrode, and a metal of the source electrode and at least the uppermost semiconductor layer A source region formed by alloying; a drain region formed by alloying the metal of the drain electrode and at least the uppermost semiconductor layer; an insulating film formed on the uppermost semiconductor layer, the source electrode, and the drain electrode; It is formed on the insulating film between the source and drain electrodes and extends at least to the edges of the source and drain electrodes facing each other. A field effect transistor comprising a gate electrode formed by.
Here, the field effect transistor of the present invention is a field effect transistor having a channel formed at the interface with the insulating film of the uppermost semiconductor layer, as in the tenth invention, or a heterojunction semiconductor layer, as in the eleventh invention. A high mobility transistor in which a channel is formed at the interface. In the case of the HEMT of the eleventh aspect, it is desirable that the source region and the drain region formed by alloying the metal and the semiconductor reach the heterojunction interface of the semiconductor layer in which the channel is formed.
The gate electrode is formed to extend to the edges of the source electrode and the drain electrode facing each other. Thereby, when a control voltage is applied to the gate electrode, electrons can be generated over the entire region of the channel. Thus, a normally-off field effect transistor with negligible parasitic resistance can be obtained.
The metal materials of the source electrode, the drain electrode, and the gate electrode are not limited in the first invention. However, as in the second invention, the source electrode and the drain electrode are sequentially arranged from the uppermost semiconductor layer side. In addition, it is preferable that titanium, aluminum, nickel and gold are stacked and the gate electrode is formed by stacking titanium, platinum and gold sequentially from the insulating film side. Note that these metal materials are not clearly divided in this order in the thickness direction after being alloyed with the semiconductor layer. By using these metal materials, the electron density of the source region and the drain region can be increased. A multi-layer structure of titanium, aluminum, platinum, and gold can be used for the source electrode and the drain electrode. By using titanium, platinum, or gold as the gate electrode, an electrode that is firmly bonded onto the gate insulating film can be formed.
In order to eliminate the parasitic resistance of the channel, the gate electrode only needs to be extended to at least the edges of the source electrode and the drain electrode. That is, a gate voltage may be applied over the entire channel formed between the source region and the drain region, and electrons may be induced over the entire length of the channel. Further, as in the third invention, the gate electrode may also be formed to extend on the insulating film above a part of the source electrode and the drain electrode. Thus, by making the gate electrode overlap above the source electrode and the drain electrode through the insulating film, it becomes easy to manufacture and the parasitic resistance of the channel can be surely eliminated.
Further, as in the fourth invention, the mutual conductance can be improved by configuring the insulating film by at least one of HfO 2 , HfO x , HfON, ZrO 2 , and ZrO x .
In the first invention, the insulating film may have a uniform thickness under the gate electrode, on the source electrode and the drain electrode. However, as in the fifth invention, the insulating film is formed between the drain electrode and the gate electrode. It is desirable that the insulating film located under the gate electrode is formed thicker at least between the drain electrode and the gate electrode among the source electrode and the gate electrode. In this case, the breakdown voltage can be improved. In addition, the overlap capacity of the gate electrode can be reduced, and the operation speed can be improved. Note that it is desirable to form a thick insulating film also between the source electrode and the gate electrode. As for the method of thickening the insulating film in these regions, if it is a single layer, it is only necessary to control the laminated thickness of the region, and as in the sixth and eighth inventions, the insulating films of different materials are laminated. Thus, the insulating film may have two or more layers.
In the first invention, the insulating film may be made of the same material in both the region under the gate electrode and the region over the source electrode and the drain electrode. However, the material of both regions may be different as in the seventh invention. Accordingly, the effective dielectric constant of the insulating film between the source electrode and the gate electrode and between the drain electrode and the gate electrode may be made smaller than the dielectric constant of the insulating film under the gate electrode. By doing so, the overlap capacity of the gate electrode can be reduced and the operation speed can be improved. In addition, at least the insulating film between the drain electrode and the gate electrode among the source electrode and the gate electrode and between the drain electrode and the gate electrode can be used to improve the withstand voltage of the transistor. .
In the method of reducing the effective dielectric constant of the insulating film on the source electrode and the drain electrode, as in the sixth and eighth inventions, the insulating film is constituted of two or more layers in those regions, and is formed under the gate electrode. This can be realized by further providing a material having a dielectric constant smaller than that of the insulating film. Alternatively, the insulating film may be formed of a single layer, and the insulating film may be formed of a material having a small dielectric constant on the source electrode and the drain electrode with respect to the insulating film below the gate electrode.
Further, as in the eighth invention, the insulating film has a uniform thickness on the first insulating film formed on the drain electrode and the source electrode, and on the first insulating film and the uppermost semiconductor layer. You may comprise with the 2nd insulating film formed by. That is, in the eighth invention, the first insulating film which is an insulating film other than the gate insulating film is formed on the source electrode and the drain electrode. The first insulating film is made of a material having a lower relative dielectric constant or a material having a higher breakdown voltage than the second insulating film, which is a gate insulating film, thereby reducing the gate overlap capacitance. The operating speed can be increased and the breakdown voltage can be increased.
As a material in this case, as in the ninth invention, the first insulating film is made of at least one of SiO 2 , Al 2 O 3 , SiO x , SiN x , AlO x , SiON, and AlN x. The second insulating film is preferably made of at least one of HfO 2 , HfO x , HfON, ZrO 2 , and ZrO x .
In the HEMT, as in the eleventh invention, the HEMT includes a barrier layer that is the uppermost semiconductor layer, and a channel layer that is heterojunction with the barrier layer and has a channel formed at an interface with the barrier layer. The thickness is uniform and uniform over the entire region under the electrode, the source electrode, and the drain electrode, and the source electrode and the drain electrode are made non-conductive when no voltage is applied to the gate electrode. With this configuration, a normally-off field effect transistor having a large maximum drain current and a large mutual conductance can be easily realized without etching a barrier layer made of a group III nitride semiconductor.
A twelfth aspect of the invention is a method for manufacturing a normally-off field effect transistor made of a group III nitride semiconductor, in which a current flowing through a channel formed in a semiconductor layer is controlled by a voltage applied to a gate electrode. On the uppermost semiconductor layer, a mask having a window is formed in a region for forming a source electrode and a drain electrode, a metal is deposited on the window and the mask, an insulating film is deposited on the metal, and the mask is formed. By removing the source and drain electrodes made of metal and the first insulating film formed on these electrodes, the metal and at least the uppermost semiconductor layer are alloyed to form the source and drain regions. A second insulating film is formed on the exposed surfaces of the first insulating film and the uppermost semiconductor layer, and at least the source is formed on the second insulating film between the source electrode and the drain electrode. It extends to the edge facing each other of the electrode and the drain electrode, a method of manufacturing a field effect transistor and forming a gate electrode.
Note that the step of forming the source region and the drain region by alloying the metal of the electrode and the semiconductor does not necessarily have to be performed after the lift-off step of removing the mask. After forming the first insulating film, the mask is removed. It may be before removal, after removing the mask, after forming the second insulating film, or after forming the gate electrode after forming the second insulating film. good.
The thirteenth invention is characterized in that the mask is made of a single-layer photoresist, and the fourteenth invention is a multi-layer structure of a resist, an insulating film made of oxide or nitride, and a photoresist. It is formed.
However, the insulating film may be composed of a plurality of layers. The lowermost resist may or may not be photosensitive, but a higher curing temperature is desirable.
The effects obtained by the above configuration of the present invention are as follows.
The present invention comprises a metal in which a source electrode and a drain electrode are stacked on an uppermost semiconductor layer, and a source region and a drain region are formed immediately below the metal by alloying the metal and a semiconductor, and the source An insulating film is formed on the surface of the uppermost semiconductor layer between the electrode and the drain electrode, and on the source electrode and the drain electrode, and at least a gate electrode formed on the insulating film is opposed to the source electrode and the drain electrode. It is characterized by being formed to extend to the edge. In the third invention, the gate electrode overlaps the upper part of the source electrode and the upper part of the drain electrode via the insulating film.
With this structure, a gate voltage can be applied over the entire channel connecting the source region and the drain region. Therefore, electrons can be induced over the entire channel when the gate voltage is applied, and the parasitic resistance can be reduced. In addition, since ion implantation is not used for the source region and the drain region, the crystallinity is not disturbed and the resistance of the region can be reduced. Further, the contact resistance between the alloyed region of these metals and the semiconductor and the semiconductor can be reduced, and the parasitic resistance of the channel can be reduced to a negligible level.
In the present invention, since the source electrode and the drain electrode made of a metal alloying with the semiconductor in the region are formed on the source region and the drain region, respectively, compared with the source region and the drain region formed by ion implantation. Thus, the total resistance of the source region and the drain region can be reduced. That is, in Patent Document 2, the current path includes a metal source electrode, a polysilicon film, a source diffusion region formed by diffusing arsenic, a channel, a drain diffusion region formed by diffusing arsenic, a polysilicon film, It becomes a metal drain electrode. Therefore, in the case of this Patent Document 2, the contact resistance between the metal source electrode and the polysilicon film, the contact resistance between the polysilicon film and the source diffusion region, the contact resistance between the drain diffusion region and the polysilicon film, the polysilicon film The contact resistance between the metal drain electrode and the metal drain electrode is added to the present invention.
On the other hand, in the present invention, the source region and the drain region are formed of an alloy of a metal and a semiconductor constituting the source electrode and the drain electrode, so to speak, the source region and the drain region are used as the metal electrode itself. Therefore, since there is no contact resistance as in Patent Document 2, parasitic resistance can be reduced to a negligible level. With respect to Patent Document 3, a region into which impurities are ion-implanted at a high concentration is further formed in a source diffusion region and a drain diffusion region into which impurities are ion-implanted, and a metal is brought into contact with these regions. Therefore, the contact resistance between these regions exists, and the resistance of the source diffusion region and the drain diffusion region is large, so that the parasitic resistance is increased.
As described above, the present invention results in the entire channel as a result of the synergistic effect of the overlapping structure of the source region and the drain region due to the alloy immediately below the source electrode and the alloy immediately below the drain electrode, the gate electrode, the source electrode and the drain electrode. Thus, it is possible to obtain a normally-off type field effect transistor in which the maximum drain current is increased. In addition, this normally-off type field effect transistor can be manufactured only by metal, insulating film, metal deposition, pattern etching of only the insulating film and metal, and alloying treatment. Etching or ion implantation of group III nitride semiconductor Manufacturing is extremely simple. Further, fine processing as in Patent Document 2 is not necessary.
In particular, since the present invention can manufacture a normally-off MIS-HEMT without etching a group III nitride semiconductor, its technical significance is great. In addition, the present invention can realize a normally-off MIS-HEMT and MOSFET having a high breakdown voltage, a high response speed, and a high current, and thus is extremely promising as a power switching element.
In the fifth invention, the region where the gate electrode overlaps the source electrode through the insulating film (hereinafter, the region of the insulating film is referred to as the "source electrode overlapping region", and the gate electrode is the drain The breakdown voltage can be improved by increasing at least the drain electrode overlap region in the region overlapping on the electrode (hereinafter, this insulating film region is referred to as "drain electrode overlap region"). In addition, by increasing the thickness of both overlap regions, the overlap capacitance of the gate electrode can be reduced and the responsiveness can be improved.
Furthermore, in the sixth and seventh inventions, at least in the drain electrode overlap region of the source electrode overlap region and the drain electrode overlap region, the insulating film has a structure of two or more layers and is thicker than the other regions. Alternatively, the effective dielectric constant can be reduced by configuring the gate insulating film and the insulating film having a dielectric constant smaller than that of the gate insulating film. In the case of two or more layers, the gate insulating film may be above or below the other insulating film. Thereby, the overlap capacitance of the gate electrode can be reduced and the response of the transistor can be improved. In addition, the breakdown voltage of the transistor can be improved by using a material having a high breakdown voltage as another material to be stacked at least in the drain electrode overlap region. In particular, as in the eighth invention, the first insulating film other than the gate insulating film is first formed on the source electrode and the drain electrode, so that the manufacturing is facilitated.
In the fourth invention, at least one of HfO 2 , HfO x , HfON, ZrO 2 , and ZrO x is used for the insulating film. Since these materials have a large relative dielectric constant of 21 to 24, the capacitance of the gate electrode can be increased and the mutual conductance can be increased.
In the twelfth manufacturing method, since the first insulating film is formed by the same photolithography process as the formation of the source electrode and the drain electrode, the manufacturing is simplified. In particular, according to the fourteenth method, the mask can be easily and reliably peeled off by using a multi-layer structure of an insulating film made of resist, oxide or nitride, and a photoresist. .
Hereinafter, the present invention will be described based on specific examples. The present invention is not limited to the following examples.
FIG. 1 is a cross-sectional view of the inverting MOSFET according to the first embodiment. An amorphous low-temperature formation buffer layer 12 made of AlN having a thickness of about 30 nm is formed on a substrate 10 made of sapphire, and a first GaN made of undoped 1 μm thick GaN is formed on the layer 12. Layer 14 is formed. A second layer 16 made of Mg-doped p-GaN having a thickness of 1 μm is formed on the first layer 14. A source electrode 22 and a drain electrode 24 having a thickness of 400 nm are formed on the second layer 16 by stacking Ti / Al / Ni / Au in this order. The source electrode 22 and the drain electrode 24 are alloyed with GaN of the second layer 16 so that the source region 18 and the drain region 20 having a high electron density of 10 19 / cm 3 are formed in the source electrode 18 and the drain electrode 24. It is formed immediately below.
An insulating film 26 made of HfO 2 and having a thickness of 100 nm is formed on the surface of the second layer 16 and on the source electrode 22 and the drain electrode 24, and Ti / Pt / Au is formed on the insulating film 26. A gate electrode 28 having a thickness of 400 nm is formed in this order. The channel Ch is an interface with the insulating film 26 and is formed on the second layer 16 side. Both ends 28a and 28b of the channel Ch in the length direction of the channel Ch of the gate electrode 28 extend beyond both opposing edges 22a and 24b of the source electrode 22 and the drain electrode 24 to an internal region in the plane of the source electrode 22 and the drain electrode 24. positioned. In other words, the gate electrode 28 overlaps the source electrode 22 and the drain electrode 24 with the insulating film 26 interposed therebetween.
The growth of each of the above layers was performed by organometallic compound vapor phase epitaxy (MOVPE). The gases used here are carrier gas (H 2 or N 2 ), ammonia gas (NH 3 ), trimethyl gallium (Ga (CH 3 ) 3 ) (hereinafter referred to as "TMG"), trimethyl aluminum ( Al (CH 3 ) 3 ) (hereinafter referred to as "TMA") and biscyclopentadienyl magnesium (Mg (C 5 H 5 ) 2 ) (hereinafter referred to as "Cp 2 Mg").
However, as a method for crystal growth of these semiconductor crystal layers, in addition to the above-mentioned metal organic compound vapor phase epitaxy (MOVPE), molecular beam vapor phase epitaxy (MBE), hydride vapor phase epitaxy (HVPE) Etc. are effective.
The MOSFET shown in FIG. 1 was manufactured as follows. An amorphous buffer layer is formed on the substrate 10 at 400 ° C. using hydrogen (H 2 ) gas as a carrier gas, TMA and NH 3 as source gases, and a total pressure in the growth reactor of 1000 [hPa]. 12 was formed to a thickness of 30 nm. Next, the crystal growth temperature is set to 1100 ° C., hydrogen gas is supplied at 10 L / min, ammonia is supplied at 12 L / min, and TMG is supplied at 2 × 10 −4 mol / min to grow the first layer 14 having a thickness of 1 μm. It was. The thicker the first layer 14, the better the crystallinity. Subsequently, TMG is supplied at 2 × 10 −4 mol / min with the same growth temperature and the same flow rate of the other source gases, and the Mg concentration is 2 × 10 17 / on the first layer 14. A 1 μm-thick second layer 16 made of cm 3 of p-GaN was formed. After that, annealing was performed at 700 ° C. in a nitrogen atmosphere to reduce the p-type resistance of the second layer 16.
Next, a resist was applied to the surface of the second layer 16, and only the regions where the source electrode 22 and the drain electrode 24 were formed were removed by photolithography. Thereafter, Ti / Al / Ni / Au was sequentially deposited so as to have a total thickness of 400 nm, and the resist was lifted off to form the source electrode 22 and the drain electrode 24. Next, by heating at 850 ° C. for 1 minute, the source electrode 22 and the drain electrode 24 and the GaN of the second layer 16 are alloyed, and the source region 18 and the drain region 20 are formed on the surface portion of the second layer 16. Formed. Thereafter, an insulating film 26 made of HfO 2 was deposited to a thickness of 100 nm on the surface of the second layer 16 and the surfaces of the source electrode 22 and the drain electrode 24 by laser ablation. Next, the resist is removed only in the formation region of the gate electrode 28 by applying photoresist and photolithography to form a predetermined resist pattern, and Ti / Pt / Au is formed in this order so that the total thickness becomes 400 nm. Laminated. Thereafter, the resist was lifted off to obtain a gate electrode 28 having a thickness of 400 nm.
The operating characteristics of the MOSFET thus formed were measured. The characteristics are shown in (a) to (d) of FIG. The channel length is 2.5 μm, and the channel width (gate width) is 20 μm. It will be appreciated that a normally-off field effect transistor has been obtained. FIG. 2A shows the gate-source voltage-drain current characteristic when the drain-source voltage is 8 V (saturation region). The drain current is in the range where the gate-source voltage is 8 V or less. It can be seen that a threshold voltage of 7 to 8 V is obtained. The reason why the drain current is not 0 in the region where the gate-source voltage is lower than the threshold voltage is that there is a leakage current that does not pass through the channel because the crystallinity of the semiconductor is insufficient. In FIG. 2B, even when the gate-source voltage is 0, a drain current proportional to the drain-source voltage flows. This is due to a leakage current. It is understood that a saturation region is formed by subtracting the leakage current characteristic proportional to the drain-source voltage. This leakage current is eliminated by strictly growing the semiconductor crystal and improving the crystallinity.
The mutual conductance is 25 mS / mm. This value corresponds to 10 times the transconductance of a conventional inverting MOSFET using GaN, and it is understood that the configuration of the present invention greatly contributes to an increase in the transconductance.
The present embodiment is a MOSFET configured as shown in FIG. In this embodiment, both ends 28a and 28b of the gate electrode 28 are extended to the edge 22a of the source electrode 22 (edge facing the drain electrode) and the edge 24b of the drain electrode 24 (edge facing the source electrode), respectively. Is. Both ends 28 a and 28 b of the gate electrode 22 only need to extend to at least the edges 22 a and 24 b of the source electrode 22 and the drain electrode 24. The manufacturing method is the same as in Example 1. This also allows the gate voltage to be applied uniformly over the entire length of the channel between the source region 18 and the drain region 20, thereby eliminating the channel parasitic resistance. Therefore, the maximum drain current can be improved. Note that only one of the gate electrode 28 on the source electrode 22 or the drain electrode 24 is overlapped as shown in FIG. 1, and the other is connected to the end of the gate electrode as shown in FIG. You may make it align with the edge of an electrode or a drain electrode.
The present embodiment is a MOSFET configured as shown in FIG. An amorphous buffer layer 52 and an undoped GaN layer 54 having a thickness of 3 μm are formed on the sapphire substrate 50. A source region 56 and a source electrode 60, a drain region 58 and a drain electrode 62, an insulating film 64, and a gate electrode 66 are formed on the surface of the i-GaN layer 54. In the first embodiment, the second layer 16 is made of p-GaN. However, this embodiment is different only in that the second layer 16 is made of i-GaN. The electrode material, thickness, and the positional relationship between the gate electrode 66, the source electrode 60, and the drain electrode 62 are the same as those in the first embodiment. Even with such a configuration, a normally-off field effect transistor having a large maximum drain current and a large mutual conductance can be realized. Of course, also in this embodiment, as shown in FIG. 3, both ends of the gate electrode 66 may be configured to be positioned at the opposing edges of the source electrode 60 and the drain electrode 62.
Further, the gate electrode 66 is configured such that only one of the source electrode 60 and the drain electrode 62 is overlapped as shown in FIG. 1, and the other is connected to the end of the gate electrode as shown in FIG. You may make it align with the edge of an electrode or a drain electrode.
This embodiment is a MIS-HEMT. The configuration is shown in FIG. On the substrate 30 made of sapphire, an amorphous low-temperature buffer layer 32 made of AlN having a thickness of about 30 nm is formed. On the layer 32, a channel layer made of undoped GaN having a thickness of 3 μm is formed. 34 is formed. On the channel layer 34, a barrier layer 36 made of undoped Al 0.2 Ga 0.8 N having a thickness of 12 nm is formed.
Is formed. On the barrier layer 36, a source electrode 42 and a drain electrode 44 having a thickness of 400 nm are formed by stacking Ti / Al / Ni / Au in this order. The source electrode 42 and the drain electrode 44 are alloyed with Al 0.2 Ga 0.8 N of the barrier layer 36 and a part of GaN of the channel layer 34, and have an electron density as high as 10 19 / cm 3. A source region 38 and a drain region 40 are formed immediately below the source electrode 42 and the drain electrode 44.
An insulating film 46 made of HfO 2 and having a thickness of 100 nm is formed on the surface of the barrier layer 36 and the source electrode 42 and the drain electrode 44, and Ti / Pt / Au is formed on the insulating film 46. A gate electrode 48 having a thickness of 400 nm is sequentially formed. The channel Ch is formed on the channel layer 34 side at the heterojunction interface with respect to the barrier layer 36. Both ends of this channel are connected to the source region 38 and the drain region 40. Both ends 48 a and 48 b of the channel Ch in the length direction of the channel Ch of the gate electrode 48 extend beyond both opposing edges 42 a and 44 b of the source electrode 42 and the drain electrode 44 to the inner region in the plane of the source electrode 42 and the drain electrode 44. positioned. That is, the gate electrode 48 overlaps the source electrode 42 and the drain electrode 44 with the insulating film 46 interposed therebetween.
The manufacturing method of the MIS-HEMT of this example is the same as that of Example 1. That is, when the barrier layer 36 is formed, the temperature is set to 1150 ° C. on the channel layer 34, hydrogen gas is 10 L / min, ammonia is 12 L / min, TMG is 2 × 10 −4 mol / min, and TMA is 6 ×. The only difference is that the barrier layer 36 made of Al 0.2 Ga 0.8 N is grown to a thickness of 12 nm by supplying at 10 −6 mol / min.
The characteristics of the MIS-HEMT formed in this way are shown in FIGS. The channel length is 2.5 μm, and the channel width (gate width) is 20 μm. It is understood that a normally-off type field effect transistor having a threshold voltage of 3 V is obtained. There is no leakage current. The mutual conductance is 185 mS / mm. This is 100 times that of a MOSFET using a conventional group III nitride semiconductor.
Also in this embodiment, the positional relationship between the gate electrode, the source electrode, and the drain electrode as shown in FIG. 3 may be adopted. That is, both ends 48 a and 48 b in the length direction of the channel Ch of the gate electrode 48 may be positioned at both opposing edges 42 a and 44 b of the source electrode 42 and the drain electrode 44. In addition, the gate electrode 48 overlaps only one of the source electrode 42 and the drain electrode 44 as shown in FIG. 5, and the other as shown in FIG. You may make it align with the edge of an electrode or a drain electrode.
The thickness of the barrier layer 36 is such that no current flows between the source electrode 42 and the drain electrode 44 when no gate voltage is applied to the gate electrode 48, that is, no carrier is induced in the channel Ch. It is a range. Although it depends on the Al composition ratio of the barrier layer 36, in the case of Al 0.2 Ga 0.8 N, a range of 1 nm to 15 nm is desirable. This range is generally applicable for AlGaN. Al 0.2 Ga 0.8 N is used for the barrier layer 36, but AlGaN having an arbitrary composition ratio can be used. Since the thickness of the barrier layer is reduced, the Al composition ratio of the barrier layer can be increased, and the breakdown voltage can be improved.
The barrier layer 36 may be composed of a plurality of layers, or may be composed of two or more layers such as n-AlGaN and i-AlGaN from the insulating film side. In this case, the concentration and thickness of n-AlGaN are such that no current flows between the source electrode 42 and the drain electrode 44 when no gate voltage is applied to the gate electrode 48, that is, carriers are induced in the channel Ch. The thickness range is not. Also,
Three layers such as i-AlGaN, n-AlGaN, and i-AlGaN from the insulating film side, or more layers may be used. Also in these cases, the thickness of the barrier layer is set to a thickness range in which no current flows between the source electrode 42 and the drain electrode 44 in a state where no gate voltage is applied to the gate electrode 48.
In this example, as shown in FIG. 7, in the MOSFET of Example 1, the insulating film has a two-layer structure. That is, the insulating film on the source electrode 22 and the drain electrode 24 has a two-layer structure of an insulating film 26 made of HfO 2 having a thickness of 100 nm and second insulating films 70 and 71 made of SiO 2 having a thickness of 200 nm. . The insulating film of SiO 2 may be formed by sputtering. The dielectric constant of SiO 2 and 3.9, less than HfO 2, since it is the relative dielectric constant 23.4 HfO 2, the source electrode overlapping region of the insulating film between the gate electrode 28 and the source electrode 22, a gate electrode The effective relative dielectric constant of the insulating film in the drain electrode overlap region between the drain electrode 24 and the drain electrode 24 can be reduced. Thereby, the overlap capacitance of the gate electrode can be reduced, and the response speed is improved.
In addition, the electric field between the drain electrode 24 and the gate electrode 28 is the largest, but the insulating film in the drain electrode overlap region where the electric field is increased is thickened, and SiO 2 having a high breakdown voltage is used. The voltage can be improved.
In this embodiment, the insulating film between the gate electrode 28 and the source electrode 22 and between the gate electrode 28 and the drain electrode 24 has a two-layer structure made of materials having different relative dielectric constants. Only the insulating film may have a two-layer structure. In addition to two layers, three or more layers may be used. Furthermore, it is preferable to use a material having a large band gap and therefore a high breakdown voltage for the insulating film between the gate electrode 28 and the drain electrode 24. Also in this embodiment, the positional relationship between the gate electrode, the source electrode, and the drain electrode may be the same as in FIG. In addition, the gate electrode 28 overlaps only one of the source electrode 22 and the drain electrode 24 as shown in FIG. 7 and the other as shown in FIG. You may make it align with the edge of an electrode or a drain electrode. In particular, the breakdown voltage can be improved by forming an insulating film having a two-layer structure using a material having a high breakdown voltage on the drain electrode 24 without overlapping the gate electrode on the drain electrode side.
In this example, the configuration of Example 5 is used for MIS-HEMT.
You may comprise as shown in FIG. That is, an insulating film 46 made of HfO 2 having a thickness of 100 nm is used as an insulating film in a source electrode overlap region between the gate electrode 48 and the source electrode 42 and a drain electrode overlap region between the gate electrode 48 and the drain electrode 44. This is a two-layer structure of second insulating films 70 and 71 made of SiO 2 having a thickness of 200 nm. This example also has the same effect as the fifth embodiment. Of course, also in this embodiment, as shown in FIG. 3, both ends of the gate electrode 48 may be configured to be positioned at the opposing edges of the source electrode 42 and the drain electrode 44. In addition, the gate electrode 48 overlaps only one of the source electrode 42 and the drain electrode 44 as shown in FIG. 8, and the other as shown in FIG. You may make it align with the edge of an electrode or a drain electrode. In particular, the breakdown voltage can be improved by forming an insulating film having a two-layer structure using a material having a high breakdown voltage on the drain electrode 44 without overlapping the gate electrode on the drain electrode side.
In the present embodiment, the thickness of the insulating film is increased only between the drain electrode 44 and the gate electrode 48 in the MIS-HEMT of the sixth embodiment. As shown in FIG. 9, the drain electrode has a different thickness between the source electrode overlap region between the gate electrode 48 and the source electrode 42 and the drain electrode overlap region between the gate electrode 48 and the drain electrode 44. The overlap region is thicker than the source electrode overlap region, and is asymmetric with respect to the thickness of the insulating film. In the upper part of the channel Ch and the source electrode overlap, the thickness of the insulating film 46 is 100 nm, and in the drain electrode overlap region, the thickness of the insulating film 46 is 400 nm. The insulating film 46 is composed of HfO 2 . As a result, the gate overlap capacitance can be reduced to increase the operation speed, the breakdown voltage can be improved, and the operable voltage can be increased. Of course, also in this embodiment, as shown in FIG. 3, both ends of the gate electrode 48 may be configured to be positioned at the opposing edges of the source electrode 42 and the drain electrode 44. In addition, the gate electrode 48 overlaps only one of the source electrode 42 and the drain electrode 44 as shown in FIG. 9 and the other as shown in FIG. You may make it align with the edge of an electrode or a drain electrode. In particular, the withstand voltage can be improved by increasing the thickness of the insulating film on the drain electrode 44 without overlapping the gate electrode on the drain electrode side. These structures can also be used in MOSFETs.
In this example, in the MIS-HEMT of Example 6, the insulating film has a two-layer structure only in the drain electrode overlap region. As shown in FIG. 10, an insulating film 46 made of HfO 2 having a thickness of 100 nm is provided on the source electrode overlap region between the gate electrode 48 and the source electrode 42 and on the channel Ch. The drain electrode overlap region between the gate electrode 48 and the drain electrode 44 has a two-layer structure of an insulating film 46 made of HfO 2 having a thickness of 100 nm and a second insulating film 71 made of SiO 2 having a thickness of 200 nm. . The second insulating film 71 may have a region 711 extending not only directly above the drain electrode 44 but also on the channel Ch side. The second insulating film 71 may be made of other materials such as alumina and SiN x having a high dielectric breakdown voltage in addition to SiO 2 . Of course, also in this embodiment, as shown in FIG. 3, both ends of the gate electrode 48 may be configured to be positioned at the opposing edges of the source electrode 42 and the drain electrode 44. In addition, the gate electrode 48 overlaps only one of the source electrode 42 and the drain electrode 44 as shown in FIG. 10 and the other as shown in FIG. You may make it align with the edge of an electrode or a drain electrode. In particular, the breakdown voltage can be improved by making the insulating film on the drain electrode 24 a two-layer structure using an insulating film having a high breakdown voltage without overlapping the gate electrode on the drain electrode side. These structures can also be used in MOSFETs.
In this example, in the MIS-HEMT of Example 8, the upper limit relationship between the insulating film 46 and the second insulating film 71 is reversed in the drain electrode overlap region. That is, as shown in FIG. 11, the second insulating film 72 has a portion 721 that is located below the insulating film 46 and is bonded to the drain electrode 44 and bonded to the barrier layer 36. In this case, it is effective to use silicon nitride SiN x typified by Si 3 N 4 as the second insulating film 72. In addition, as shown in FIG. 11, the gate electrode 48 has both ends 48a and 48b of the gate electrode 48, the edge 42a of the source electrode 42 (edge facing the drain electrode) and the drain electrode, as in the second embodiment. It may be extended to 44 edge 44b (edge facing the source electrode). Further, on the source electrode 42, the gate electrode 48 overlaps, and on the drain electrode 44 side, the end face 48b of the gate electrode 48 extends to the edge 44b of the drain electrode 44 as shown in FIG. It may be a shape. As a result, the gate overlap capacitance can be reduced to increase the operation speed, the breakdown voltage can be improved, and the operable voltage can be increased. As shown in FIG. 10, the gate electrode 48 may overlap both the source electrode 42 and the drain electrode 44. These structures can also be used in MOSFETs.
In this embodiment, in the MOSFET of the fifth embodiment shown in FIG. 7, as shown in FIG. 12, the insulating film includes a first insulating film 80 on the source electrode 22, a first insulating film 81 on the drain electrode 24, The first insulating films 80 and 81 and the second insulating film 85 formed on the upper surface of the p-GaN second layer 16 have a two-layer structure. That is, the first insulating films 80 and 81 are composed of a 200 nm thick SiO 2 film, and the second insulating film 85 is composed of a 100 nm thick HfO 2 film. That is, in the case where the insulating film on the source electrode 22 and the drain electrode 24 is constituted by a plurality of layers, in this embodiment, the second insulating film 85 which is a gate insulating film is on the upper side, contrary to the fifth embodiment. The first insulating films 80 and 81 to be formed are disposed on the lower side. Of course, also in this embodiment, the first insulating film may be formed only on the drain electrode 24 of the source electrode 22 and the drain electrode 24. Of course, also in this embodiment, as shown in FIG. 3, the both ends of the gate electrode 28 may be configured to be located at the opposing edges of the source electrode 22 and the drain electrode 24. In addition, the gate electrode 28 overlaps only one of the source electrode 22 and the drain electrode 24 as shown in FIG. 12, and the other as shown in FIG. You may make it align with the edge of an electrode or a drain electrode. In particular, the withstand voltage can be improved by making the insulating film on the drain electrode 24 have a two-layer structure without overlapping the gate electrode on the drain electrode side.
In this example, in the MIS-HEMT of Example 6 shown in FIG. 8, as shown in FIG. 13, the insulating films are the first insulating film 80 on the source electrode 42 and the first insulating film 81 on the drain electrode 44. And a second insulating film 85 formed on the first insulating films 80 and 81 and the second insulating film 85 formed on the upper surface of the barrier layer 36. That is, the first insulating films 80 and 81 are composed of a 200 nm thick SiO 2 film, and the second insulating film 85 is composed of a 100 nm thick HfO 2 film. That is, in the case where the insulating film on the source electrode 42 and the drain electrode 44 is constituted by a plurality of layers, in this embodiment, the second insulating film 85 which is a gate insulating film is on the upper side, contrary to the sixth embodiment. The first insulating films 80 and 81 to be formed are disposed on the lower side. Of course, also in this embodiment, the first insulating film may be formed only on the drain electrode 44 of the source electrode 42 and the drain electrode 44. Of course, also in this embodiment, as shown in FIG. 3, both ends of the gate electrode 48 may be configured to be positioned at the opposing edges of the source electrode 42 and the drain electrode 44. In addition, the gate electrode 48 overlaps only one of the source electrode 42 and the drain electrode 44 as shown in FIG. 13 and the other as shown in FIG. You may make it align with the edge of an electrode or a drain electrode. In particular, the withstand voltage can be improved by making the insulating film on the drain electrode 44 a two-layer structure using a material having a high withstand voltage without overlapping the gate electrode on the drain electrode side.
Next, a method for forming the source electrode, drain electrode, first insulating film, second insulating film, gate electrode, source region, and drain region of the MOSFET of Example 10 and the MIS-FET of Example 11 will be described. The following description relates to the MIS-FET of Example 11. The manufacturing method is the same for the MOSFET of Example 10.
Until the formation of the uppermost semiconductor layer, the MOCVD method is used as usual. As shown in FIG. 14A, a photoresist film 71 is formed to a uniform thickness on a semiconductor layer 70 composed of a channel layer 34 and a barrier layer 36, and exposure and etching are performed to form a source electrode and a drain. A window 72 is formed in a region where an electrode is to be formed. Next, Ti, Al, Ni, and Au are sequentially deposited on the exposed surface of the semiconductor layer 70 of the window 72 and on the remaining photoresist film 71 to form an electrode layer 73 having a total thickness of 400 nm. did. Next, the SiO 2 film 74 was uniformly deposited to a thickness of 200 nm by sputtering. Thereafter, the photoresist film 71 is lifted off from the semiconductor layer 70, and as shown in FIG. 14B, the source electrode 42 and the first insulating film 80 thereon, and the drain electrode 44 and the first insulation thereon. Layer 81 was formed.
Next, the source electrode 42, the drain electrode 44, the barrier layer 36, and a part of the channel layer 34 were alloyed by heating at 850 ° C. for 1 minute, so that the source region 38 and the drain region 40 were formed. The source region 38 and the drain region 40 are formed at least to a depth reaching the channel Ch formed at the interface between the barrier layer 36 and the channel layer 34 and on the channel layer 34 side.
Thereafter, an insulating film 85 made of HfO 2 is formed to a thickness of 100 nm on the surface of the barrier layer 36, the surface of the first insulating film 80 on the source electrode 42, and the surface of the first insulating film 81 on the drain electrode 44 by laser ablation. Deposited. Next, the resist is removed only in the formation region of the gate electrode 48 by applying photoresist and photolithography to form a predetermined resist pattern, and Ti / Pt / Au is formed in this order so that the total thickness becomes 400 nm. Laminated. Thereafter, the resist was lifted off to obtain a gate electrode 48 having a thickness of 400 nm.
When the insulating film on the source electrode and the drain electrode is composed of two or more layers, the insulating film other than the gate insulating film is formed in the same process as the evaporation of the source electrode and the drain electrode as described above. The photoresist is lifted off. As a result, photolithography and etching for forming the insulating film (first insulating film) are not required, and the manufacturing process is simplified.
Next, another manufacturing method will be described. In the above example, when the SiO 2 film 74 is deposited, the photoresist film 71 is exposed to a high temperature and thus may be solidified. For this reason, when the photoresist film 71 is peeled from the semiconductor layer 70 using a solvent, the peeling may be difficult. Therefore, the following method can be adopted so as not to cause this problem.
As shown in FIG. 15A, a resist film 75 is deposited on the semiconductor layer 70 to a uniform thickness. However, the resist film 75 may be photosensitive, but it is not always necessary. It is desirable to use a resin having a high curing temperature for the resist film 75. Next, a SiO 2 film 76 is uniformly formed to a thickness of 500 nm on the resist film 75. Next, a photoresist film 77 is formed to a uniform thickness, and a window 78 is formed in a region where a source electrode and a drain electrode are formed by exposure and etching. Then, by using the remaining photoresist film 77 as a mask, the SiO 2 film 76 and the resist film 75 of the window 78 are etched by reactive ion etching, and as shown in FIG. Expose the surface. At this time, the resist film 75 is side-etched and becomes narrower than the width of the upper SiO 2 film 76.
Next, as shown in FIG. 15C, Ti, Al, Ni, and Au are sequentially deposited on the exposed surface of the barrier layer 36 of the window 78 and on the remaining photoresist film 77, An electrode layer 73 having a total thickness of 400 nm was formed. Next, the SiO 2 film 74 was uniformly deposited to a thickness of 200 nm by sputtering. Thereafter, the resist film 75 is lifted off from the barrier layer 36, and as shown in FIG. 15D, the source electrode 42 and the first insulating film 80 thereon, and the drain electrode 44 and the first insulating layer thereon. 81 was formed.
Next, heating is performed at 850 ° C. for 1 minute to alloy the source electrode 42 and the drain electrode 44, the barrier layer 36, and a part of the channel layer 34, and as shown in FIG. And a drain region 40 were formed. The source region 38 and the drain region 40 are formed up to a depth that reaches at least the channel Ch formed at the interface between the barrier layer 36 and the channel layer 34 and on the channel layer 34 side.
According to such a method, as shown in FIGS. 15B and 15C, the width of the remaining resist film 75 becomes narrower than the widths of the SiO 2 film 74 and the photoresist film 77 immediately above it. Therefore, the penetration of the solvent becomes easy and the lift-off can be performed reliably.
In all the embodiments described above, in the MIS-HEMT, Al x In 1-x N (0.7 ≦ x ≦ 0.9) may be used as the barrier layer. When x = 0.83, the lattice constant of GaN of the channel layer can be matched, which is effective for further improvement of characteristics. The channel layer may be made of In y Ga 1-y N (0 <y ≦ 0.2) instead of GaN.
In all the above embodiments, a silicon carbide substrate, a silicon substrate, a zinc oxide substrate, a GaN substrate, or the like can be used instead of the sapphire substrate.
The present invention is effective in improving the characteristics of a normally-off type field effect transistor using a group III nitride semiconductor.
Sectional drawing which shows the structure of MOSFET which concerns on the specific Example 1 of this invention. The measured operating characteristic figure of MOSFET which concerns on the Example. Sectional drawing which shows the structure of MOSFET which concerns on the specific Example 2 of this invention. Sectional drawing which shows the structure of MOSFET which concerns on the specific Example 3 of this invention. Sectional drawing which shows the structure of MIS-HEMT which concerns on the specific Example 4 of this invention. The measured operating characteristic figure of MIS-HEMT concerning the example. Sectional drawing which shows the structure of MOSFET which concerns on the specific Example 5 of this invention. Sectional drawing which shows the structure of MIS-HEMT which concerns on the specific Example 6 of this invention. Sectional drawing which shows the structure of MOSFET which concerns on specific Example 7 of this invention. Sectional drawing which shows the structure of MIS-HEMT which concerns on the specific Example 8 of this invention. Sectional drawing which shows the structure of MIS-HEMT which concerns on the specific Example 9 of this invention. Sectional drawing which shows the structure of MIS-HEMT which concerns on the specific Example 10 of this invention. Sectional drawing which shows the structure of MIS-HEMT which concerns on the specific Example 11 of this invention. The process figure which showed the manufacturing method of MIS-HEMT which concerns on the specific Example 11 of this invention. Process drawing which showed the other manufacturing method of MIS-HEMT based on the specific Example 11 of this invention.
Explanation of symbols
DESCRIPTION OF SYMBOLS 10 ... Sapphire substrate 14 ... 1st layer 16 ... 2nd layer 22, 42 ... Source electrode 24, 44 ... Drain electrode 18, 38 ... Source region 20, 40 ... Drain electrode 26, 46 ... Insulating film 28, 48 ... Gate electrode 70, 71 ... second insulating film
In a normally-off field effect transistor made of a group III nitride semiconductor, which controls the current flowing through the channel formed in the semiconductor layer by the voltage applied to the gate electrode,
A source electrode made of metal formed on the uppermost semiconductor layer made of a group III nitride semiconductor;
A drain electrode made of metal formed on the uppermost semiconductor layer and spaced apart from the source electrode;
A source region formed by alloying the metal of the source electrode and at least the uppermost semiconductor layer;
A drain region formed by alloying the metal of the drain electrode and at least the uppermost semiconductor layer;
An insulating film formed on the uppermost semiconductor layer, the source electrode, and the drain electrode;
A field effect transistor comprising: a gate electrode formed on the insulating film between the source electrode and the drain electrode, and extending at least to edges of the source electrode and the drain electrode facing each other.
The source electrode and the drain electrode are formed by laminating titanium, aluminum, nickel, and gold sequentially from the top semiconductor layer side, and the gate electrode is composed of titanium, platinum, gold, sequentially from the insulating film side. The field effect transistor according to claim 1, wherein the field effect transistor is formed by stacking layers.
3. The field effect according to claim 1, wherein the gate electrode is also formed to extend on the insulating film above a part of the region of the source electrode and the drain electrode. Transistor.
4. The field effect transistor according to claim 1, wherein the insulating film is made of at least one of HfO 2 , HfO x , HfON, ZrO 2 , and ZrO x .
The insulating film is formed thicker than the insulating film located above the channel, at least between the drain electrode and the gate electrode, between the drain electrode and the gate electrode and between the source electrode and the gate electrode. The field effect transistor according to any one of claims 1 to 4, wherein the field effect transistor is provided.
The insulating film is formed of a plurality of layers made of different materials between the drain electrode and the gate electrode and between the source electrode and the gate electrode at least between the drain electrode and the gate electrode. 6. The field effect transistor according to claim 1, wherein:
The effective dielectric constant of the insulating film between the drain electrode and the gate electrode and between the source electrode and the gate electrode is smaller than a dielectric constant of the insulating film located above the channel. The field effect transistor according to any one of claims 1 to 6.
The insulating film includes a first insulating film formed on the drain electrode and the source electrode, and a second insulating film formed on the uppermost semiconductor layer with a uniform thickness. The field effect transistor according to claim 1, comprising an insulating film.
The first insulating film includes at least one of SiO 2 , Al 2 O 3 , SiO x , SiN x , AlO x , SiON, and AlN x , and the second insulating film includes HfO 2 , HfO x , HfON, field effect transistor according to claim 8, Nikki be characterized in that it consists of at least one of ZrO 2, ZrO x.
2. The non-conduction between the source electrode and the drain electrode in a state where the channel is formed on the surface of the uppermost semiconductor layer and no voltage is applied to the gate electrode. 10. The field effect transistor according to any one of items 9.
A barrier layer that is the uppermost semiconductor layer; and a channel layer that is heterojunction with the barrier layer and has a channel formed at an interface with the barrier layer, the barrier layer including the gate electrode, the source electrode, and the drain electrode The source electrode and the drain electrode have a non-conducting thickness in a state where the thickness is uniform and uniform in the whole area below the gate electrode and no voltage is applied to the gate electrode. The field effect transistor according to any one of claims 1 to 9.
In a method for manufacturing a normally-off type field effect transistor made of a group III nitride semiconductor, in which a current flowing through a channel formed in a semiconductor layer is controlled by a voltage applied to a gate electrode,
On the uppermost semiconductor layer made of a group III nitride semiconductor, a mask in which a window is formed is formed in a region for forming a source electrode and a drain electrode,
Depositing metal on the window and the mask;
Depositing an insulating film on the metal;
By removing the mask, a source electrode and a drain electrode made of the metal and a first insulating film formed on the electrodes are formed,
Alloying the metal and at least the uppermost semiconductor layer to form a source region and a drain region;
Forming a second insulating film on the exposed surfaces of the first insulating film and the uppermost semiconductor layer;
A gate electrode is formed on the second insulating film between the source electrode and the drain electrode, extending to at least edges facing each other of the source electrode and the drain electrode. Effect transistor manufacturing method.
The method of claim 12, wherein the mask is made of a single layer of photoresist.
13. The method of manufacturing a field effect transistor according to claim 12, wherein the mask is formed in a multi-layer structure of a resist, an insulating film made of oxide or nitride, and a photoresist.
The first insulating film includes at least one of SiO 2 , Al 2 O 3 , SiO x , SiN x , AlO x , SiON, and AlN x , and the second insulating film includes HfO 2 , HfO x , HfON, ZrO 2, a method of manufacturing a field effect transistor according to any one of claims 12 to claim 14 Nikki be characterized in that it consists of at least one of ZrO x.
16. The gate electrode according to claim 12, wherein the gate electrode is also formed to extend on the second insulating film above a part of the source electrode and the drain electrode. A method for producing the field effect transistor according to 1.
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Jackie Cummings, a veteran and paramedic, talks about her experiences with Wounded Warriors Canada's Trauma Resiliency Program at the Wounded Warriors Run BC launch. A team will run across Vancouver Island to raise awareness and funds for the organization that provides mental health supports to veterans, serving military and first responders. (Shalu Mehta/News Staff)
Wounded Warriors Run BC gets ready to hit the road
Local runners aim to raise $100,000 for PTSD-related programs, supports
Shalu Mehta
Feb. 8, 2019 4:45 p.m.
A team of brave runners will be making their way down the Island from Port Hardy to Victoria at the end of the month as part of the Wounded Warriors Run BC.
The team, made up of veterans, current serving military, first responders and supporters, will be raising funds and awareness for Wounded Warriors Canada — an organization that delivers mental health programs and services to veterans, military members, first responders and their families who are dealing with operational stress injuries such as post-traumatic stress disorder (PTSD).
"We're there to show everyone that if we talk about it and touch more people, more people will come for help and not suffer in silence," said Jacqueline Zweng, the Wounded Warriors Canada ambassador in Victoria.
One of the programs offered by the organization is called BOS — Before Operational Stress — which helps people identify symptoms of PTSD and learn how to address them. There is also a program called COPE — couples overcoming PTSD every day — that has treated at least 300 couples already. Both programs started in Victoria.
Jackie Cummings is a veteran and paramedic who recently graduated from a Wounded Warriors Canada's Trauma Resiliency Program. It brought veterans, serving military and first responders together for three days to learn about PTSD.
READ MORE: Langford Fire Rescue partners with Wounded Warriors to focus on mental health
"Through my jobs, I have been exposed to things that most people don't wake up to and go to work and find in their normal day," Cummings said as she described her journey with Wounded Warriors Canada.
Cummings noted the program helped her connect with the others who were in it.
"For the first time since my injury I truly felt like I had found my people," Cummings said. "A lot of us had finally found words and explanations for the things that we had been experiencing that actually made sense … to be able to stand in front of a room or alongside others and go 'wow, me too, you just finally nailed it for me, thank you."
Cummings said they were exposed to things in their daily life that most people don't encounter but the program gave her and other participants tools to work with.
"The thing with PTSD is that we live in a very stoic culture," Cummings said. "We put on a strong front, we tell our stories and a lot of those stories are void of emotion. What [the program] did was strip that down and make us connect to that emotion."
READ MORE: VIDEO: Wounded Warriors ride to Victoria in memory of fallen soldiers
The Wounded Warriors Run BC team is looking to raise $100,000 this year for the organization. At the launch, donors such as the Saunders Family Foundation, Serious Coffee and Tilray made donations to the team. Langford Mayor Stew Young also announced that the team will receive $10,000 at the finish line from the City and the West Shore Developers Association.
Zweng said after the launch, the team had raised about $30,000 already.
The run will start on Feb. 25 in Port Hardy with athletes covering more than 600 kilometres in seven days. They will reach their final destination, the B.C. Legislature in Victoria, on March 3.
This is the sixth year the run has taken place in B.C. and runners plan to stop at Legions and in communities to share their stories and raise awareness and funds.
Anyone interested in donating can visit the team's website here.
shalu.mehta@goldstreamgazette.com
Transport Canada orders new braking protocol after fatal CP derailment in Field
Not sending firefighters to medical emergencies could cost lives: B.C. fire chief

redpajama_set_name: RedPajamaCommonCrawl


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When you are ready to take legal action in your case, get to know us better by scheduling a free and confidential consultation. You will pay no legal fees unless we secure a verdict, settlement or benefits for you.
Types of Cases Our Fredericksburg Injury Law Firm Handles
At Marks & Harrison, we represent only plaintiffs in personal injury and wrongful death matters. If you have been injured by a careless driver in an auto accident and need a Fredericksburg car accident lawyer or harmed by a negligent medical professional or impacted by a defective product, we want to help you.
Our firm also assists those who have suffered a job-related injury or illness or who are struggling to get by due to a permanent disability that prevents them from working.
Our Fredricksburg disability attorneys handle workers' compensation as well as Social Security disability cases, from the initial filing of claims through all necessary levels of appeal.
Our Involvement Within the Community
Marks & Harrison, doesn't just practice law in Fredericksburg. We contribute to the community in a variety of ways.
For instance, throughout the year, our employees make donations that allow them to dress casually for the day in our office. We use those donated funds to buy meals for Fredericksburg-area families during the holiday season.
It is called our "Casual for a Cause" program. The program has been warmly received in the community, including receiving special recognition from the Spotsylvania Department of Social Services in 2012.
Our personal injury law firm also serves as a sponsor of Rappahannock Legal Services, which provides free legal help to low-income clients in Fredericksburg and surrounding areas.
Fredericksburg Personal Injury Lawyers
If you have suffered injury due to someone else's negligence, you should not wait to learn about your legal rights and options. You may eligible to recover compensation for your medical expenses, lost wages, pain, suffering, emotional distress and more. At Marks & Harrison, we can discuss your case today. You can find our conveniently located Fredericksburg office on Route 1 in front of the Virginia Department of Motor Vehicles building.
For more than 100 years, we have served personal injury victims and their families throughout Virginia, making us one of the oldest law firms in the Commonwealth. We are also one of the largest personal injury law firms in Virginia, with offices in Fredericksburg and nine other cities, including our headquarters in Richmond. Our legal team features 20 lawyers, 50 paralegals and a crew of skilled investigators. We have been honored as a "Best Law Firm" by U.S. News – Best Lawyers® – a distinction based on the reviews of our peers in the legal profession.
Bryan L. Meadows serves as our lead attorney in Fredericksburg. Bryan is joined in the office by our hard-working, highly dedicated paralegals: Carolyn Bryant, Kelly Powers, Cindy J. Torrice, and Emily Torrice. Our consultations are always free, and you will owe us nothing for our legal services unless and until we secure compensation for you. To learn more about how we can put our skill, experience and resources to work for you, contact us today.
How Can Our Fredericksburg Personal Injury Lawyers Help You?
When you work with Marks & Harrison at our Fredericksburg office, we will be committed to providing the highly professional and sincerely compassionate service that you deserve. Your case will start with a free consultation. We will take the time to find out what happened to you and learn how your injuries have affected your ability to work and enjoy your life. You can also feel free to ask any questions that you may have about your case or about our law firm's approach to serving our clients.
You can also count on our legal team to:
Promptly investigate your case – Our investigate team includes former law enforcement officers and an insurance claims adjuster. We also regularly consult with experts in fields such as accident reconstruction and life-care planning. We can quickly collect evidence in your case and carefully analyze it to determine why your accident occurred, who should be held responsible for it and how much you may be eligible to recover in damages.
Handle all paperwork – We will timely and properly file all required documents with the insurance companies and in the court with jurisdiction over your case. Keep in mind that the statute of limitations in Virginia limits the time you have to file a claim. So, you should contact us as soon as you are ready to take legal action
Seek a full and fair settlement – We will thoroughly document your accident, injuries and damages and demand a full and fair settlement. We know how to present strong cases to insurance companies and aggressively negotiate with them for the funds our clients deserve.
Take your case to trial if necessary – If an insurance company challenges liability or the amount of damages in a personal injury or wrongful death lawsuit, we will be prepared to fight for you in court. Our attorneys are highly trained and experienced trial lawyers.
We represent personal injury clients in Fredericksburg on a contingency fee basis. In other words, we will not get paid unless and until we recover compensation for you through a settlement or a jury verdict. Before we begin work on your case, we will fully explain the details of our fee and cost agreement with you.
What Types of Injury Cases Does Our Fredericksburg Injury Law Firm Handle?
Our personal injury attorneys at Marks & Harrison assist clients in Fredericksburg, VA and surrounding areas in a broad range of injury cases, including:
We understand the chronic pain and other complications that people suffer from when they receive a whiplash injury in an accident. We can review your medical records and consult with doctors and other medical experts in order to assess the harm you have sustained and seek a recovery of your medical expenses.
Another important factor to consider is the extent of your property damage and/or bodily injuries.Tears, strains and other types of injuries to cartilage, ligaments, tendons and muscles can be painful and debilitating. Our attorneys realize how these injuries can keep people from working and engaging in normal life activities. We give serious attention to these injuries and seek compensation that victims are due.
A fracture that you suffer in an accident can significantly alter your life. Your recovery could involve surgery, physical therapy and more. As a result of the injury, you could miss work for an extended period of time and may face a permanent disability.
Depending on the severity of the burn, you may suffer from a loss of function as well as permanent scarring and disfigurement. A burn can also leave you vulnerable to infections and other potentially fatal complications. Our goal will be to secure funds that allow you to get the medical treatment you need.
The force of impact in a crash or fall can cause internal bleeding or damage to organs which requires immediate medical attention. In some cases, broken ribs or other fractures can lead to life-threatening internal injuries.
If you or your loved one has suffered traumatic brain injury (TBI), we will conduct a thorough, careful analysis of the cause of the injury and the extent of its impact. We realize how these injuries – even mild concussions – can have a major effect on a person's ability to think clearly, move around and control his or her behavior.
Due to a traumatic blow to the spine in an accident, victims may sustain a wide range of injuries, from paralysis to a herniated or slipped disc. Our attorneys work tirelessly to pursue compensation that covers a victim's medical needs and reflects the full impact of a spinal cord injury on a person's ability to work and engage in daily activities.
If your loved one could have brought a personal injury claim against another if he or she had survived the incident, then you are likely eligible to pursue a wrongful death claim against that party. A Marks & Harrison wrongful death lawyer can help you to seek damages that include the recovery of your loved one's lost financial support and the expenses incurred in putting your loved one to rest.
Marks & Harrison Named Top Law Firm in the 2020 "Best of the Burg" Awards
The personal injury attorneys of Marks & Harrison extend a hearty thanks to Fredericksburg residents for voting our law firm as the "Best of the Burg" for 2020.
The awards, sponsored by the Fredericksburg Free-Lance Star, ask readers to nominate their favorite businesses in the area. The top five nominees are then voted upon to determine who wins "Best of the Burg" in their particular category.
Marks & Harrison has served injured people throughout Virginia since 1911. Our injury lawyers are dedicated to pursuing compensation for clients who have been harmed in a variety of accidents in Richmond, Harrisonburg, Petersburg, Fredericksburg, Tappahannock, Chesterfield, Hopewell, Charlottesville, Louisa, Staunton, and the surrounding communities.
How Did Your Injury Occur in Fredericksburg?
If someone else's negligence caused injury to you or a loved one, an experienced Fredericksburg personal injury attorney at Marks & Harrison will fight for the compensation you deserve. We frequently work with clients in cases involving:
Fredericksburg Legal Information
If you are pursuing a personal injury or wrongful death claim in Fredericksburg, your case may be litigated in the Fredericksburg Circuit Court on Princess Anne Street or the Spotsylvania Circuit Court on Judicial Center Lane in Spotsylvania. Those courts are part of the 15th Judicial Circuit. The other courts in the Circuit are Caroline, Essex, Hanover, King George, Lancaster, Northumberland, Richmond County, Stafford and Westmoreland.
Our Fredericksburg Practice Areas
Our legal team works with skilled, full-time investigators and highly qualified experts in accident reconstruction and other fields. We can determine why your crash occurred, who should pay for your losses and what you should seek to fully compensate you for the damages you have suffered.
Our Fredericksburg Personal Injury Attorneys Are Ready to Help You
At Marks & Harrison, we represent only plaintiffs in personal injury and wrongful death matters. If you have been injured by a careless driver in an auto accident and need a Fredericksburg car accident lawyer or if you were harmed by a negligent medical professional or impacted by a defective product, we want to help you. When you are ready to take legal action in your case, get to know us better by scheduling a free and confidential consultation. You will pay no legal fees unless we secure a verdict or settlement on your behalf.


I am on my husband's sign-on as a guest. I have a call in to a Priest. I want to acknowledge my faith in God. I have been Episcopalian all my life, but want a better understanding of Coptic Christianity. I believe in one God, the Father, Son and Holy Spirit and I want to better be able to demonstrate my faith.
God bless you in your search for the Truth, and in your desire to Worship God in the Fullness of Truth. If you have any questions regarding the Orthodox Faith as preserved and practised by the Coptic Orthodox Church, please feel free to ask.
I pray that God may lead you to His Church.
I found it most benefitting about 10 years ago to have "information interviews" with hierarchs, clergy and laymen who know about Orthodoxy to be able to determine the right faith. I was orthodox by name then. It grows afterwards with practice and worship. So, we might be able to assist you better if you let us know your general location. If in the Southern US, I would recommend Bishop Youssef as a contact.
If not an option, Iqbal is the one having most knowledge about the faith on these forums, and we will try to assist in any way possible.
and god never leave those who want to get near to him!
May the true God bless you, and open your heart to the light of the truth. AngloJohn, God won't leave you or forsake you. He'll be knocking on the door of your heart, and open for him to accept the faith. God loves you. Ask God to show you himself, God never leaves himself without a witness. God Bless you, Guide you to the light of Christianity the light, and be with you.
and click on "aflaam" but it is written in arabic!


What were you doing in Italy? I lived and worked there for 6 months a couple of years ago on Lake Garda! I know the 'coming home feeling' oh so well, i've done it lots of times. Everything has changed, we've seen so much etc but a couple of weeks back in the UK and everything is back to normal and it's like we haven't been away. I guess the blog is a good way to deal with this in that you can post about your life abroad long after everyone back home has got bored listening to to us!


text:
The Last Flight of Noah's Ark
The Last Flight of Noah's Ark is a 1980 American family adventure film produced by Walt Disney Productions starring Elliott Gould, Geneviève Bujold and Ricky Schroder. The film was released by Buena Vista Distribution on July 9, 1980. A full-scale Boeing B-29 Superfortress bomber was featured in the film as the "ark".[5]
film poster by Dan Goozee[1]
Jan Williams
Steven W. Carabatsos
Sandy Glass
George Arthur Bloom
"The Gremlin's Castle"
by Ernest K. Gann
Charles F. Wheeler
Gordon D. Brenner
July 9, 1980 (1980-07-09) (Los Angeles)[2]
$6-8 million[3]
6.2 Citations
6.3 Bibliography
PlotEdit
A jaded pilot named Noah Dugan (Elliott Gould) is unemployed and owes a large amount of money due to his gambling. He goes to an old friend, Stoney (Vincent Gardenia), who owns an airfield. He is offered a job flying a cargo of animals to a remote South Pacific island aboard a B-29 bomber, a large plane well past its prime.[Note 1] Bernadette Lafleur (Geneviève Bujold) is the prim missionary who accompanies him. Bernadette has raised the animals at an orphanage and is close to two of the orphans, Bobby (Ricky Schroder) and Julie (Tammy Lauren).
As the aircraft prepares to taxi for takeoff, Bobby is concerned about Dugan's treatment of the animals, and decides to stow away aboard the bomber so that he can make sure his special friends are properly cared for. Julie follows Bobby aboard. During the flight, the bomber goes off course, and Dugan is forced to crash-land on an uncharted island that Bobby has spotted with his keen eyesight. While on the island, the group meets two elderly Japanese holdout soldiers who have lived there alone for 35 years. Dugan treats them as enemies, as the soldiers are unaware that World War II is over, but Bernadette wins their friendship and trust. They are able to communicate because the mother of one of the soldiers had spent time in America, and she taught her son how to speak English. She even named him "Cleveland", after her favorite place there.
The soldiers convince Dugan and Bernadette that there is no hope of rescue should they stay on the island, as the two had been there for decades with no one coming to repatriate them. They propose a plan to turn the old aircraft into a boat to sail back to civilization. This requires flipping the B-29 upside down, as this will be a more stable and watertight configuration. Bernadette needs to construct a sail for the boat, so the soldiers give her their battle flag of the Japanese Empire, which she uses as the primary fabric for the sail. She tells the soldiers that she will sew it in the top position as a symbol of respect.
Noah and Bernadette (or "Bernie", as he calls her) fall in love after the two had resented each other at first. Bernie paints the name "Noah's Ark" on the converted boat-plane. Dugan tells her that he does not like his first name, but as she starts to remove the paint, he says he is okay with it. The animals are also brought on board at Bobby's insistence. Bernadette keeps a Bible close to her. After many days at sea, she tells Dugan that she has been inspired by the story of Noah's ark in how a dove was sent to search for a sign of hope, so they decide to send their duck with a message attached, telling of their need for rescue. The duck flies westward, away from the direction of Hawaii, and hope dwindles. Bobby has been resentful of Dugan (since his first mistreatment of the animals), but the two eventually develop a close bond, especially after Dugan saves Bobby's life when the boy falls overboard when they try to fish for food while a big shark is circling them. They are rescued by a United States Coast Guard cutter, which has the duck aboard, and the Ark is towed to Oahu.
CastEdit
Elliott Gould as Noah Dugan
Geneviève Bujold as Bernadette Lafleur
Ricky Schroder as Bobby
Vincent Gardenia as Stoney
Tammy Lauren as Julie[Note 2]
John Fujioka as "Cleveland"
Yuki Shimoda as Hiro
Dana Elcar as Benchley
John Ryan as Coslough
Ruth Manning as Charlotte Braithwaite
Arthur Adams as Leipzig Manager
Austin Willis as Slabotsky
Peter Renaday as Irate Pilot
Bob Whiting as Chaplain
P2B-1S, Bureau Number 84029, Fertile Myrtle's forward fuselage now on display at Fantasy of Flight, Florida
The main story for the film, "The Gremlin's Castle", was written by Ernest K. Gann, who also wrote the classic aviation novels The High and the Mighty and Fate Is the Hunter, which were also turned into films.[6][7]
The film was announced in December 1979 as part of Disney's slate of films for the next year. Others included The Watcher in the Woods, Condorman, The Black Hole, and Herbie Goes Bananas.[8]
Ron Miller, head of Disney at the time, deliberately used a director and actors who had not worked with Disney before. "We've got to broaden our base", said producer Dan Miller.[3]
This film reunites director Charles Jarrott with several people he worked with in other films at other studios; he had previously directed Geneviève Bujold in Universal's Anne of the Thousand Days, which had earned them Academy Award nominations. The film's theme song, "Half of Me", had lyrics by Hal David, who also wrote the lyrics to songs to the 1973 Columbia Pictures movie musical Lost Horizon and whose brother Mack David did the same for Walt Disney's 1950 animated feature Cinderella. Meanwhile, both Gould and Bujold were making their first film for Disney,[9] as were Ricky Schroder and Dana Elcar who both appeared in The Champ, which came out on April 4, shortly before this film started shooting on April 22, 1979.[10] Elcar would also appear in Jarrott's next film, Condorman, another Disney release the following year. Schroder, for whom this was also his first film that wasn't a remake of an earlier film, turned nine years old on April 13, exactly nine days between the two aforementioned dates in either direction.
Location photography included scenes at a desert airfield near Victorville, California, Kauai and Waikiki Beach, Hawaii, with interiors shot at the Disney Studios sound stages. The scrapped airframes from four B-29 aircraft that were located at the US Navy's China Lake Facilities were used. Two of the scrapped aircraft were used in Hawaii, while the other two were shipped to the Burbank studio for interiors. Extensive modifications were made in order to have a fuselage that could float. After filming, all the aircraft remains had to be returned to the US Navy.[11] One additional aircraft, the former US Navy P2B-1S long-range-search version of the B-29 Superfortress, named Fertile Myrtle, actually flew in the film.[12]
ReceptionEdit
The Last Flight of Noah's Ark was released to many drive-in theaters on a double bill with One Hundred and One Dalmatians. The film's promotional slogan was "treat your family to a Disney summer".
Among the reactions from critics, Roger Ebert's 1.5-star review was particularly harsh: "Walt Disney's 'The Last Flight of Noah's Ark' is a dreadful movie, bankrupt of creative imagination—an Identi-kit film, assembled from familiar pieces but with no identity of its own. It's so depressingly predictable that in the last half hour we're sitting there thinking: Let's see…the raft has put out to sea, so there has to be at least one shark attack and one bad storm before they're rescued. There are."[13] Janet Maslin of The New York Times called it "a so-so Disney picture" that was "dull, but inoffensive, except during its infrequent musical interludes."[14] Gene Siskel of the Chicago Tribune gave the film 1 star out of four and wrote, "The inescapable conclusion to be drawn from watching the latest Disney comic adventure film, 'The Last Flight of Noah's Ark,' is that Walt Disney productions had no conception of whom they were making this film for. It's a very bad film that falls in the gap between a kiddie show and adult entertainment."[15] Variety derisively wrote that the film teaches "fundamental values, mainly that every human being should be willing to risk their life for an animal, or even a chicken if the chance arises", and "stresses a subsidiary hint for the little ones: If you don't get your way, whine and cry a lot and maybe the old folks will give in."[16] Charles Champlin of the Los Angeles Times was generally positive, declaring that the film "is in most ways the smooth and satisfying family film out of the Disney past, with cute kids (who are at least as smart as the grown-ups) and a dazzling gimmick at the center of the story."[17] Gary Arnold of The Washington Post wrote, "A low-octane adventure fable, 'Last Flight' keeps sputtering out on the stodgy, overprotective mechanics typical of Disney juvenile entertainment."[18]
Leonard Maltin's home video guide gave it 2.5 stars out of 4 and noted: "Typical Disney sentimentality; somewhat effective."[19]
The film was a box office disappointment.[20] Miller called it a "$6 million write-off."[21]
List of surviving Boeing B-29 Superfortresses
NotesEdit
^ Boeing B-29 Superfortress bombers bore the brunt of U.S. bombing raids against Japan decades earlier during World War II.
^ Tammy Lauren was director Charles Jarrott's stepdaughter.
CitationsEdit
^ https://www.filmonpaper.com/posters/last-flight-noahs-ark-one-sheet-usa/
^ "The Last Flight of Noah's Ark — Details". AFI Catalog of Feature Films. American Film Institute. Retrieved May 3, 2019.
^ a b SCHREGER, CHARLES. (Mar 7, 1979). "FILM CLIPS: Times Are a-Changing at Disney". Los Angeles Times. p. f12.
^ The Last Flight of Noah's Ark at Box Office Mojo
^ Wilkinson, Stephan. "Movie Stars with wings." History.net, March 8, 2012. Retrieved: November 17 2015.
^ O'Leary 1980, p. 59.
^ "LAST FLIGHT OF NOAH'S ARK, The". Monthly Film Bulletin. 47 (552). London. Jan 1, 1980. p. 135.
^ EARL C. GOTTSCHALK JR. (Jan 9, 1979). "Disney Plan Enables 2 Executives to Earn $1.5 Million in 1978". Wall Street Journal. p. 20.
^ O'Leary 1980, p. 58
^ ALJEAN HARMETZ (Mar 4, 1979). "Disney Studio Risks $17.5 Million on 'Black Hole': Exhibitors Shown Ad Choice Is Explained Three More Contemplated". New York Times. p. 55.
^ Bevil, Dewayne (March 4, 2014). "Fantasy of Flight attraction to close". Orlando Sentinel. Retrieved November 17, 2015.
^ Ebert, Roger. "Reviews: 'The Last Flight of Noah's Ark'". rogerebert.com, July 15, 1980. Retrieved: November 17, 2015.
^ Maslin, Janet (August 2, 1980). "Film: 'Last Flight' Gives Noah's Ark New Twist". The New York Times. p. 10.
^ Siskel, Gene (July 15, 1980). "An attempt to win young and old sinks 'Noah's Ark'". Chicago Tribune. p. Section 2, p. 4.
^ "Film Reviews: The Last Flight of Noah's Ark". Variety. June 11, 1980. p. 22.
^ Champlin, Charles (July 9, 1980). "Swell Sailing On 'Noah's Ark'". Los Angeles Times. p. Part VI, p. 7.
^ Arnold, Gary (July 15, 1980). "'Noah' and the Little Ark That Couldn't". The Washington Post. p. C3.
^ Maltin, Leonard, ed. (1995). Leonard Maltin's 1996 Movie & Video Guide. Signet. p. 726. ISBN 0-451-18505-6.
^ CHARLES J. ELIA (17 July 1980). "Concern Over Attendance at Disney's Parks Weakens Its Stock Despite Recent Profit Gain". Wall Street Journal. p. 41.
^ "WISHING UPON A FALLING STAR AT DISNEY". New York Times (Late (East Coast) ed.). 16 Nov 1980. p. A.144.
BibliographyEdit
O'Leary, Michael. "The Last Flight of Noah's Ark". Air Classics, Volume 16, Number 4, April 1980.
The Last Flight of Noah's Ark at the TCM Movie Database
The Last Flight of Noah's Ark on IMDb
Movie/DVD Review at UltimateDisney.com
The Last Flight of Noah's Ark at Rotten Tomatoes
Retrieved from "https://en.wikipedia.org/w/index.php?title=The_Last_Flight_of_Noah%27s_Ark&oldid=992320183"
Last edited on 4 December 2020, at 17:29
This page was last edited on 4 December 2020, at 17:29 (UTC).


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