The invention is a product and method for forming same comprising a storage contact capacitor of a dynamic random access memory (DRAM) device wherein at least two annular rings and a vertical fin of silicon are fabricated in a self-aligned opening parallel to and in contact with the contact area of the substrate. The rings and fin comprise the storage node of the capacitor, and the fin is substantially centered in the rings. The fin is fabricated by forming silicon in a channel remaining after alternating layers of silicon and oxide are deposited in the opening. The final deposition of oxide is subjected to a spacer etch thereby retaining the final oxide only on sidewalls of the channel. The final oxide then functions as a masking pattern for extending the channel by subjecting the alternating layers to subsequent etches. The silicon fin contacts all of the silicon rings thereby providing electrical communication between the fin and the rings. Once the fin is formed the oxide is exposed, and at least portions of the oxide are etched. A dielectric layer is deposited to overlie the fins and a cell polycrystalline silicon layer is deposited to overlie the dielectric and complete the capacitor fabrication.
This invention relates to semiconductor technology and, more particularly, to cell capacitors for use in dynamic random access memories (DRAMs).
The memory cells of dynamic random access memories (DRAMs) which are arranged in an array having a configuration of intersecting wordlines and digit lines are comprised of two main components, a field-effect transistor (FET) and a capacitor. In DRAM cells utilizing a conventional planar capacitor, far more chip surface area is dedicated to the planar capacitor than to the field-effect transistor. In a typical construction the wordlines are generally etched from a polysilicon-1 layer. A doped region of monocrystalline silicon substrate functions as the lower capacitor plate (storage node), while a polysilicon-2 generally functions as the upper capacitor plate (cell plate).
Although planar capacitors have generally proven adequate for use in DRAM chips up to the 1-megabit level, they are considered to be unusable for more advanced DRAM generations. As component density in memory chips has increased, the shrinkage of cell capacitor size has resulted in a number of problems. Firstly, the alpha-particle component of normal background radiation can generate hole-electron pairs in the silicon substrate, which functions as the lower capacitor plate. This phenomena will cause a charge stored within the affected cell capacitor to rapidly dissipate, resulting in a "soft" error. Secondly, the sense amplifier differential signal is reduced. This aggravates noise sensitivity and makes it more difficult to design a sense amplifier having appropriate signal selectivity. Thirdly, as cell capacitor size is decreased, the cell refresh time must generally be shortened, thus requiring more frequent interruptions for refresh overhead. The difficult goal of a DRAM designer is to increase or, at least, maintain cell capacitance as cell size shrinks, without resorting to processes that reduce product yield or that markedly increase the number of masking and deposition steps in the production process.
Some manufactures of 4-megabit DRAMs are utilizing cell designs based on nonplanar capacitors. Two basic nonplanar capacitor designs are currently in use: the trench capacitor and the stacked capacitor. Both types of nonplanar capacitors typically require a greater number of masking, deposition and etching steps for their manufacture than does a planar capacitor.
In a trench capacitor, charge is stored primarily vertically, as opposed to horizontally as in the planar capacitor. Since trench capacitors are fabricated in trenches which are etched in the substrate, the typical trench capacitor, like the planar capacitor, is subject to soft errors. In addition, there are several other problems inherent in the trench design. One problem is that of trench-to-trench charge leakage, caused by the parasitic transistor effect between adjacent trenches. Another problem is the difficulty of completely cleaning the trenches during the fabrication process; failure to completely clean a trench will generally result in a defective cell.
The stacked capacitor design, on the other hand, has proven somewhat more reliable and easier to fabricate than the trench design. Since both the lower and the upper plates of a typical stacked capacitor are formed from individual polysilicon layers, the stacked capacitor is generally much less susceptible to soft errors than either the planar or trench capacitors. By placing both the wordline and the digit line beneath the capacitive layers, and having the lower layer make contact with the substrate by means of a buried contact, some manufacturers have created stacked capacitor designs in which vertical portions of the capacitor contribute significantly to the total charge storing capacity. Since a stacked capacitor generally covers not only the entire area of a cell (including the cell's access FET), but adjacent field oxide regions as well, capacitance is considerably enhanced over that available from a planar type cell.
The method for forming the typical fin configuration stacked capacitor uses polycrystalline silicon/nitride layers to implement spacing of the fins. The method is complicated and employs multi-depositions and subsequent etch steps to create this stacked capacitor fin structure.
Alternatives for increasing capacitance comprise utilizing materials having larger dielectric constants, decreasing the thickness of the dielectric (decreasing the distance between the capacitor plates), or increasing capacitor surface area by texturizing the polycrystalline silicon surface.
One experimental method for increasing the capacitor surface area is the fabrication of a storage node capacitor having a double-wall crown shaped lower capacitor plate structure wherein the fabrication of the structure is initiated by etching an opening in an SiO2 interlayer in order to expose a contact area of the substrate. A first polycrystalline silicon layer is then deposited to overlie the surface of the SiO2 interlayer and the substrate contact area. Next SiO2 is deposited in conjunction with a spacer etch to form vertical portions of SiO2 adjacent to the polycrystalline silicon and forming sidewalls of the opening. A second polycrystalline silicon layer is then deposited overlying the portions of SiO2 and overlying the first polycrystalline silicon layer still exposed after the SiO2 deposition. The second polycrystalline silicon layer directly contacts the first polycrystalline silicon layer overlying the contact area of the substrate. The remaining portion of the opening is filled with SiO2. The first and second polycrystalline silicon layers are etched to expose the SiO2. Next the SiO2 is etched completing the fabrication of the lower capacitor plate structure which comprises the first and second polycrystalline silicon layers remaining after the etches. Thus the lower capacitor plate comprises a two layer lower portion of polycrystalline silicon in contact with the substrate and comprises two annular rings extending vertically from the two layer portion in contact with the substrate.
The invention is a product and method for forming same comprising a storage contact capacitor of a dynamic random access memory (DRAM) device wherein at least two annular rings and a vertical fin of polycrystalline silicon are fabricated in a self-aligned opening parallel to and in contact with the contact area of the substrate. The storage contact capacitor of the invention utilizes the vertical portion of the DRAM by fabricating at least a portion of the storage node capacitor plate vertically in the DRAM. The vertical fabrication increases capacitor area while maximizing die space for a given lateral area.
The invention is an improvement of the double-wall crown shaped lower capacitor plate structure. The invention increases the area of the lower capacitor plate structure by the fabrication of at least two annular rings and a vertical fin of silicon. Alternating layers of polycrystalline silicon and oxide are deposited in an opening exposing a contact area of substrate. The opening is created by etching an oxide interlayer. The initial alternating layer contacts the exposed portion of the substrate and comprises polycrystalline silicon. A center silicon fin is formed in a channel retained and extended after the alternating depositions. The final oxide layer deposited alternatingly functions as a mask to extend the channel. The oxide mask is formed by a spacer etch wherein the oxide is retained only on the sidewalls of the channel. The alternately deposited polycrystalline silicon and oxide are alternately and insitu reative ion etched (RIE) according to the oxide mask to expose at least the initial deposition of polycrystalline silicon. The center silicon fin is formed in the extended channel to contact all previously deposited polycrystalline silicon layers above the contact area of the substrate, thereby creating a contiguous silicon structure.
The capacitor fabrication continues by exposing and then etching the oxide layers to create cavities interposed between the portions of silicon. Although an etch or planarization defines the horizontal dimension of the low capacitor plate, the height of the oxide interlayer defines the vertical dimension of the lower capacitor plate. The process is completed with a deposition of a dielectric nitride layer followed by a deposition of at least one cell polycrystalline silicon layer.
The invention allows the vertical portion of a DRAM device to be utilized as the storage cell thus maximizing die space in the horizontal direction, and reducing the stack capacitor height prior to contacts. The formation of multiple annular rings and a center fin increases the capacitor area in a given lateral area thus increasing capacitance.
Even though the capacitor can encroach the area over the wordline, the cell plate contact and the cell plate are self-aligned. The capacitor cell is compact since the buried contact size remains the same even though the contact hole is larger when encroaching the area over the wordline.
The process utilizes minimal masking steps. The process facilitates the effective use of a tungsten buried digit line configuration. The invention is conducive to fabricating the capacitor and tungsten plug in an adjacent relationship. In addition, there are no bit line stringers, thus yield is increased.
FIG. 1 is a cross-sectional view of a portion of a partially processed semiconductor wafer which depicts field-effect transistors (FETs) overlying a silicon substrate and wordlines overlying field oxide.
FIG. 2 is a cross-sectional view of the wafer portion of FIG. 1 following the deposit of an undoped thick oxide layer and planarization thereof.
FIG. 3 is a cross-sectional view of the wafer portion of FIG. 2 following the patterning and etching of the undoped thick oxide layer to form an opening exposing a contact area of the substrate.
FIG. 4 is a cross-sectional view of the wafer portion of FIG. 3 following the alternating depositions of polycrystalline silicon and oxide deposited to fill all but a channel in the opening of FIG. 3.
FIG. 5A is a cross-sectional view of the wafer portion of FIG. 4 following an alternating insitu reative ion etch (RIE) of the alternating layers of polycrystalline silicon and oxide. The insitu etch is performed in order to expose an initial polycrystalline layer.
FIG. 5B is an alternate cross-sectional view of the wafer-portion of FIG. 4 following an alternating insitu RIE etch of the alternating depositions of polycrystalline silicon and oxide. The insitu etch is performed in order to expose the substrate.
FIG. 6A is a cross-sectional view of the wafer portion of FIG. 5A following a conformal deposition of polycrystalline silicon to fill the channel of FIG. 5A.
FIG. 6B is a cross-sectional view of the wafer portion of FIG. 5B following the growth of epitaxial silicon to fill the channel of FIG. 5B.
FIG. 7A is a cross-sectional view of the wafer portion of FIG. 6A following the removal of the polycrystalline silicon deposit of FIG. 6A to exposed the oxide layers.
FIG. 7B is a cross-sectional view of the wafer portion of FIG. 6B following the removal of the epitaxial silicon of FIG. 6B. Alternately FIG. 7B can represent a cross-sectional view of the wafer portion of FIG. 6B after a planarization of the alternate layers of polycrystalline silicon and oxide, and the polysilicon deposit of FIG. 6B.
FIG. 8A is a cross-sectional view of the wafer portion of FIG. 7A following etching of the oxide layers and a deposition of a dielectric layer comprising silicon nitride.
FIG. 8B is a cross-sectional view of the wafer portion of FIG. 7B following etching of the oxide layers and a deposition of a dielectric layer comprising silicon nitride.
FIG. 9A is a cross-sectional view of the wafer portion of FIG. 8A following the deposition of a cell polycrystalline silicon layer and a temporary deposition of silicon nitride.
FIG. 9B is a cross-sectional view of the wafer portion of FIG. 8B following the deposition of a cell polycrystalline silicon layer.
FIG. 10 is a cross-sectional view of the wafer portion of FIG. 9A following the patterning and etching of the storage node capacitor plate.
FIG. 11 is a cross-sectional view of the wafer portion of FIG. 10 following the oxidation of the storage node polycrystalline silicon exposed during the etch of the storage node capacitor plate.
FIG. 12A is a cross-sectional view of the wafer portion of FIG. 11 following the etch of the temporary silicon nitride layer, the deposition of a second cell polycrystalline silicon layer, and the patterning of a cell polycrystalline silicon interconnect.
FIG. 12B is a cross-sectional view of the wafer portion of FIG. 9B following the patterning of the cell polycrystalline silicon interconnect.
FIG. 13A is a cross-sectional view of the wafer portion of FIG. 12A following the etch of the cell polycrystalline silicon interconnect and the removal of the cell polycrystalline silicon mask.
FIG. 13B is a cross-sectional view of the wafer portion of FIG. 12B following the etch of the cell polycrystalline silicon interconnect and the removal of the cell polycrystalline silicon mask.
FIG. 14A is a cross-sectional view of the wafer portion of FIG. 13A following the formation of a tungsten plug.
FIG. 14B is a cross-sectional view of the wafer portion of FIG. 13B following the formation of a tungsten plug.
FIG. 15A is a cross-sectional view of the wafer portion of FIG. 14A following the patterning of metallic interconnect lines for providing an electrical connection between the tungsten plugs and peripheral contacts of the DRAM.
FIG. 15B is a cross-sectional view of the wafer portion of FIG. 14B following the patterning of metallic interconnect lines for providing an electrical connection between the tungsten plugs and peripheral contacts of the DRAM.
The invention is the method of forming a storage node capacitor in a dynamic random access memory (DRAM). The storage node capacitor plate of the storage node capacitor has multiple parallel vertical sides formed in a deep contact opening. Since the contact height is approximately 1 micron, the transistor formation and buried bit line formation needs to be done before the tungsten plug is constructed. This facilitates the connection of the rowline and cell polycrystalline silicon to contacts at the periphery of the array. The storage node silicon is self-aligned to the rowline poly and to the buried contact pattern. The capacitor can be made taller as the need arises for a higher capacitance but the size of the horizontal component minimally effects the total capacitance.
Referring now to FIG. 1, a cross-sectional view of two in-process DRAM cells is shown following conventional local oxidation of silicon (LOCOS) or special LOCOS processing which creates substantially planar field oxide regions 1 (created using modified LOCOS process) and future active areas 2 (those regions of the substrate not covered by field oxide) on a silicon substrate 3. The creation of the field oxide is preceded by a thermally grown dielectric layer 4 of silicon oxide. The depicted cells are two of many cells that are fabricated simultaneously and comprise a memory array. Following the creation of the field oxide region 1 and dielectric layer 4 a first conductively doped polysilicon layer 10, a metal silicide layer (WSix) 15, an oxide layer 16, and a thick nitride layer 20 are deposited. The thick nitride layer 20 will function as an etch stop during the storage node buried contact etch, thus allowing self-alignment. The layers are patterned and etched to form wordlines 21 and N-channel (NCH) field effect transistors 22. The polysilicon layer 10 forms the gate regions of the FETs and is insulated from lightly-doped source/drain regions 25 by the dielectric layer 4. The lightly-doped regions 25 are created utilizing a phosphorus implant. Deposition, densification and a reactive ion etch (RIE) of a silicon dioxide spacer layer has created principal spacers 30 which offset an arsenic implant used to create the heavily-doped source/drain regions 35. Principal spacers 30 insulate the wordlines and FETs from subsequent digit line and capacitor fabrications. Eventually the wordlines are connected to periphery contacts. The periphery contacts are located at the end of the array and are capable of being in electrical communication with peripheral circuitry.
After the RIE etch the punchthrough improvement implant is processed to improve breakdown voltage of drain to source when VGate equals zero volts (BVDSS) and to reduce subthreshold leakage. The gate oxide 4 remains intact and the field oxide is not etched.
Although the formation of the FETs 22 and wordlines 21 as described are preferred, other methods of fabrication are also feasible and perhaps equally viable. The following steps represent the method of capacitor fabrication of the preferred embodiment of the invention.
In FIG. 2 a thick conformal doped layer of borophosphosilicate glass (BPSG) oxide interlayer 40 is blanket deposited to fill the storage node areas and overlie the FETS 22 and wordlines 21. The oxide interlayer 40 is deposited to a height selected to define the desired height of the parallel capacitor and is undoped to minimize dopant out diffusion from the oxide interlayer 40 to the doped regions of the substrate. The oxide interlayer 40 is planarized, either mechanically or chemically, in order to provide a uniform height.
In FIG. 3 the oxide interlayer 40 of FIG. 2 is masked by photoresist pattern 45 to define the buried contact area 50 of the substrate 3. The oxide interlayer 40 is then RIE etched to form an opening 55 in the oxide interlayer 40 exposing the buried contact area 50. During subsequent process steps the storage node capacitor plate of the preferred embodiment is fabricated to contact the buried contact area 50.
In FIG. 4 the photoresist pattern 45 of FIG. 3 is removed. FIG. 4 depicts the initial blanket deposit of a polycrystalline silicon layer 60 insitu doped with phosphorous. The polycrystalline silicon layer 60 overlies the buried contact area 50 and the oxide interlayer 40. The initial polycrystalline silicon layer 60 deposit is followed by alternating depositions of oxide 65 and polycrystalline silicon 70 insitu doped with phosphorous. The total number of alternating depositions 65 and 70 selected is determined by the DRAM designer. The depositions do not completely fill the opening 55 and a channel 75 is centered in a final deposition of oxide 80.
In the preferred embodiment shown in FIG. 5A an alternating RIE insitu etch removes horizontal portions of the alternating layers of polycrystalline silicon 70 and oxide 65 and the final oxide deposition 80. Final oxide deposition 80 is retained overlying vertical sidewalls of the final deposit of polycrystalline silicon 70 forming filaments that function as a mask pattern for increasing the depth of the channel 75 during the RIE insitu etching. The RIE insitu etching increases the depth of channel 75 and exposes a portion of the polycrystalline silicon 60 overlying the buried contact region. The initial polycrystalline silicon layer 60 is not etched during these alternating etches.
In an alternate embodiment shown in FIG. 5B the alternating insitu etch is continued in order to etch the initial deposit of polycrystalline silicon 60 according to the mask pattern provided by oxide deposition 80 in order to expose the substrate 3 in the contact area 50. Etching of the initial polycrystalline silicon layer 60 is typically a more delicate process since the etching may result in punch through of the contact area 50 when the substrate 3 is exposed.
An alternating insitu etch is a plural etch within a single etch step. In the preferred and alternate embodiments the oxide etch is timed until the final oxide is removed by the etch. The oxide etch is then turned off. Next the silicon etch is timed until the silicon is removed, and then the silicon etch is turned off. The process is repeated until the layers have been etched to expose the initial polycrystalline silicon layer in the preferred embodiment or the substrate in the alternate embodiment.
In FIG. 6A a conformal polycrystalline silicon layer 85 is deposited to completely fill the channel 75 of FIG. 5A and contact the initial polycrystalline silicon deposition 60 and all alternating polycrystalline silicon depositions 70 exposed during the etching, thereby providing electrical communication between all polycrystalline silicon layers. The polycrystalline silicon layer 85 is insitu doped with phosphorus.
In the alternate embodiment shown in FIG. 6B silicon 86 may be epitaxially grown from the monocrystalline silicon contact area 50 exposed during the etch of the polycrystalline silicon layer 60. The epitaxial silicon eventually fills channel 75 of the FIG. 5B and functions electrically as the polycrystalline silicon layer 85, thereby providing electrical communication between itself and polycrystalline silicon layers 60 and 70. Typically, growing epitaxial silicon is a relatively expensive and a relatively slow process, therefore it is not preferred.
In FIG. 7A a wet poly etch is utilized to expose the oxide depositions 65 and 80 of FIG. 7A while retaining the initial polycrystalline silicon layer 60 and the polycrystalline silicon depositions 70 and 85 formed in the opening 55 of FIG. 3.
Optionally the polycrystalline layers 60, 70, and 85 and the oxide layers 65 and 80 can be chemically mechanically planarized in order to expose the oxide layers 65 and 80 and interlayer 40. This wafer portion would then look similar to the wafer portion of FIG. 8B where the layers 60, 65, 70, 80 and 86 of the alternate embodiment of FIG. 7B have been planarized to expose the oxide layers 65 and 80. A wet etch of the silicon layer 86 is a viable alternative to the planarization and effects a similar cross-sectional view as well as a similar functionality.
In FIG. 8A of the preferred embodiment and 8B of the alternate embodiment the oxide layers have been selectively and controllably etched by either a wet or a vapor etch method to form cavities 90 between the silicon layers. The cavities 90 form parallel annular rings 95 and a parallel center fin 96. The annular rings 95 are in electrical communication one with another via the center fin 96, formed by the silicon layers 85 and 86 respectively. These annular rings 95 and center fin 96 eventually comprise the storage node capacitor plate of the storage node capacitor of the invention. The horizontal component of the oxide 65 is retained after the etch to provide stability to the annular rings 95. Since the initial polycrystalline layer 60 was not etched during the insitu etch described relative to FIG. 5A, the annular rings 95 and center fin 96 have a maximum height in the preferred embodiment. This maximum height effects maximum capacitance.
Still referring to FIGS. 8A and 8B a thin cell nitride dielectric layer 100 is then deposited to overlie all of the exposed silicon and oxide surfaces. An optional wet anneal may be performed subsequent to the silicon nitride deposition to oxidize the silicon in pinholes of the nitride. The wet anneal improves dielectric breakdown properties of the capacitor thus formed.
In FIG. 9A of the preferred embodiment and 9B of the alternate embodiment a thick cell polycrystalline silicon layer 105 is deposited to overlie the thin nitride dielectric layer 100 of FIGS. 8A and 8B respectively. As the polycrystalline silicon layer 105 is deposited it is insitu doped with phosphorus. The cell polycrystalline silicon layer 105 will comprise the upper capacitor plate of the storage node capacitor. In FIG. 9A a thin oxidation resistant nitride dielectric layer 110 is blanket deposited to overlie the cell polycrystalline silicon layer 105 and offers protection against oxidation of a majority of the cell polycrystalline silicon layer 105 in subsequent processing steps.
In the preferred embodiment as shown in FIG. 10 the cell polycrystalline silicon layer 105 and the storage node polycrystalline silicon layer 60 are patterned only within the storage capacitor with photoresist mask 120. The cell polycrystalline silicon layer 105, nitride dielectric layers 100 and 110 and storage node polycrystalline silicon layer 60 are RIE etched in the unmasked regions. It is not necessary to use a wet poly etch in this process. The polycrystalline silicon layer 60 remaining after the etch comprises the storage node capacitor plate of the storage node capacitor of the preferred embodiment.
In FIG. 11 the storage node pattern 120 is removed and the ends 125 of the storage node polycrystalline silicon layer 60 and the cell polycrystalline silicon layer 105 are oxidized in order to insulate the storage node polycrystalline silicon layer 60 from subsequent poly depositions. Although the cell polycrystalline silicon layer 105 is oxidized during this step, this oxidation is irrelevant to the process.
In FIG. 12A of the preferred embodiment the upper nitride layer 110 is removed with an RIE etch. A relatively thin layer of polycrystalline silicon layer 130 is blanket deposited to overlie and be in electrical communication with the cell polycrystalline silicon layer 105 and thick oxide layer 40. The thin layer of polycrystalline silicon layer 130 is contiguous to all of the cells of the array. The thin polycrystalline silicon layer 130 is insitu doped with phosphorus. The polycrystalline silicon layer 130 is masked with an interconnect pattern 140 which defines electrical interconnection of the cells of the array. The thin polycrystalline silicon layer 130 is RIE etched according to the interconnect pattern.
In FIG. 12B of the alternate embodiment the cell polycrystalline silicon layer 105 is masked with an interconnect pattern 140 which defines electrical interconnection of the cells of the array. The cell polycrystalline silicon layer 105 is RIE etched according to the interconnect pattern.
FIGS. 13A of the preferred embodiment and 13B of the alternate embodiment depict the storage node capacitor 150 of the invention following the RIE etches of the thin polycrystalline silicon layer 130 in FIG. 14A and the cell polycrystalline silicon layer 105 in 14B. With the removal of the interconnect pattern 140 the fabricated storage node capacitor 150 formation of the preferred and alternate embodiments, respectively, is complete.
FIG. 14A of the preferred embodiment and 14B of the alternate embodiment depict the completion of the interconnect process. An approximately 3 KA thick dielectric oxide deposition 160 is deposited overlying the thin polycrystalline silicon layer 130 and the cell polycrystalline silicon layer 105 respectively. Subsequently a contact mask (not shown) is used as a pattern to etch a contact hole (not shown) in the oxide layers 160 and 40. An RIE etch exposes the substrate 3. The contact mask is removed. A contact plug 165 is formed in the contact hole by first depositing a TiN layer 170 followed by a conformal deposition of tungsten 175 to fill the contact hole. The final formation of the contact plug results from the etchback of the TiN 170 and tungsten 175 to expose the oxide layer 160, thus retaining TiN 170 and tungsten 175 only in the contact hole.
In FIG. 15A of the preferred embodiment and 15B of the alternate embodiment interconnect lines are formed using an RIE etch after a metalization layer 190 overlying the dielectric oxide layer 160 is patterned with a digit line interconnect pattern (not shown). The digit lines thus formed provide electrical communication between the interconnect tungsten plugs 165 and the peripheral contacts (not shown) of the cell array. No passivation layers are shown.
It should be noted that for a parallel capacitor height of approximately 1 micron the capacitor will have a capacitance of 30 microfarads in a 0.6 micron contact hole. Since an increase in capacitance is directly proportional to increase in capacitor area, increasing the capacitor height increases the capacitance.
In summary, the invention allows the vertical portion of a DRAM device to be utilized as the storage cell thus maximizing die space in the horizontal direction, and reducing the stack capacitor height prior to contacts. The formation of multiple annular rings in addition to a center fin increases the capacitor area in a given lateral area thus increasing capacitance.
It can be seen that the process utilizes minimal masking steps and facilitates the effective use of a buried digit line tungsten plug configuration. The invention is conducive to fabricating the capacitor and tungsten plug in an adjacent relationship. In addition, there are no bit line stringers, thus yield is increased.
Although the preferred embodiment is typically employed in DRAMs containing up to 256 megabit DRAM cells, the process is not limited to these uses.
Although specific crystalline silicon structures have been described in the preferred and alternate embodiments, amorphous, monocrystalline, and polycrystalline silicon structures may be substituted as desired. It is also conceivable that a starting substrate comprising another material other than silicon may be employed in this invention with equal success thereby necessitating the epitaxial growth of that alternate starting substrate to fill the cavity. Of course other conductive materials may replace the doped polycrystalline silicon and remain within the scope of the invention as claimed.
Although a preferred and an alternate embodiment of the invention have been herein described, it will be apparent to one skilled in the art that changes and modifications may be made thereto without departing from the spirit and scope of the invention as claimed.
k) blanket depositing a cell conductive layer to overlie said dielectric layer, said cell conductive layer capable of functioning as a second capacitor plate, said dielectric layer capable of electrically insulating said first and second capacitor plates one from the other.
2. The method as specified in claim 1, further comprising planarizing said interlayer prior to forming said opening.
b) removing said photoresist pattern subsequent to said step of forming said opening.
4. The method as specified in claim 3, wherein said forming further comprises reactive ion etching said interlayer according to said contact photoresist pattern.
5. The method as specified in claim 1, wherein said forming said conductive fin further comprises depositing a conductive material in said channel.
6. The method as specified in claim 1, wherein said extending said channel further comprises exposing said substrate.
7. The method as specified in claim 6, wherein said forming said conductive fin further comprises epitaxially growing said fin from said substrate.
8. The method as specified in claim 1, wherein said exposing further comprises etching at least said conductive fin.
9. The method as specified in claim 8, wherein said etching at least said conductive fin further comprises reactive ion etching said conductive fin.
10. The method as specified in claim 8, wherein said etching at least said conductive fin further comprises wet poly etching said conductive fin.
11. The method as specified in claim 1, wherein said exposing further comprises planarizing at least said conductive fin.
12. The method as specified in claim 11, wherein said planarizing further comprises chemical mechanical polishing.
13. The method as specified in claim 1, wherein said anisotropically etching said masking insulative layer and said alternating layers further comprises reactive ion etching.
14. The method as specified in claim 1, wherein said etching at least a portion of said alternate and masking insulative layers further comprises wet etching said alternate and masking insulative layers.
15. The method as specified in claim 1, wherein said etching at least a portion of said alternate and masking insulative layers further comprises vapor etching said alternate and masking insulative layers.
16. The method as specified in claim 1, further comprising performing a wet anneal subsequent to said depositing said dielectric layer.
17. The method as specified in claim 1, wherein said insitu etching further comprises alternating reactive ion etchants confined in a chamber, said alternating etchants initiated with an etchant specific to said masking insulative layer, followed by alternating etchants for said at least on alternate conductive layer and said at least on alternate insulative layer, said insitu etching terminated with an etchant for said alternate insulative layer.
n) depositing a cell conductive layer to overlie said dielectric layer, said cell conductive layer capable of functioning as second capacitor plates of said plurality of capacitors, said cell conductive layer providing electrical communication between said second capacitor plates of said plurality of capacitors, said dielectric layer capable of electrically insulating said first and second capacitor plates one from the other.
19. The method as specified in claim 18, wherein said exposing said alternate and masking insulative layers and said defining and isolating said horizontal area of said first capacitor plates further comprises planarizing said initial and alternate conductive layers and said alternate and masking insulative layers and said fins in order to expose said interlayer.
f) removing said first capacitor plate photoresist mask and said oxidation resistant material in order to expose said cell plate layer, hence said cell plate layer ready to accept said cell conductive layer.
d) removing said photoresist mask to expose said dielectric layer, hence said dielectric layer ready to accept said cell conductive layer.
22. The method as specified in claim 18, wherein said extending said channels further comprises exposing said contact areas.
23. The method as specified in claim 22, wherein said forming said conductive fins comprises epitaxially growing said fins from said substrate.
24. The method as specified in claim 18, wherein said forming said conductive fins comprises depositing a conductive material in said channel.
25. The method as specified in claim 18, wherein said insitu etching further comprises alternating reactive ion etchants confined in a chamber, said alternating etchants initiated with an etchant specific to said masking insulative layer, followed by alternating etchants for said alternate conductive layers and said alternate insulative layers, said insitu etching terminated with an etchant for said alternate insulative layer.
c) removing said cell conductive layer photoresist pattern.
s) depositing a cell conductive layer to overlie said cell plate layer, said cell conductive layer and said cell plate layer being in electrical communication, said cell plate layer and said cell conductive layer capable of functioning as second capacitor plates of said plurality of capacitors, said cell conductive layer providing electrical communication between said second capacitor plates of said plurality of capacitors, said dielectric layer capable of electrically insulating said first and second capacitor plates one from the other.
28. The plurality of capacitors as specified in claim 27, wherein said conductive fins are formed by depositing a conductive material in said channel.
29. The plurality of capacitors as specified in claim 28, wherein said conductive fins comprise polycrystalline silicon subjected to an insitu phosphorous diffusion doping.
30. The plurality of capacitors as specified in claim 27, wherein said insitu etching further comprises alternating reactive ion etchants confined in a chamber, said alternating etchants initiated with an etchant specific to said masking insulative layer, followed by alternating etchants for said alternate conductive layers and said alternate insulative layers, said insitu etching terminated with an etchant for said alternate insulative layer.
31. The plurality of capacitors as specified in claim 27, wherein said initial conductive layer comprises depositing a polycrystalline silicon layer subjected to an insitu phosphorous diffusion doping.
32. The plurality of capacitors as specified in claim 27, wherein said at least one alternate conductive layer further comprises a polycrystalline silicon layer subjected to an insitu phosphorous diffusion doping.
33. The plurality of capacitors as specified in claim 27, wherein said dielectric isolation interlayer comprises borophosphosilicate.
34. The plurality of capacitors as specified in claim 27, wherein said at least one alternate insulative layer and said masking insulative layer comprise oxide.
35. The plurality of capacitors as specified in claim 27, wherein said dielectric layer comprises silicon nitride.
h) a dielectric layer interposed between said first and said second capacitor plates, said dielectric layer electrically insulating said first and second capacitor plates one from the other.
37. The capacitor as specified in claim 36, further comprising a projecting conductive rim contiguous and substantially perpendicular to said first sidewall at an uppermost perimeter of said sidewall, an outer perimeter of said rim larger than the uppermost perimeter of said sidewall.
38. The capacitor as specified in claim 37, wherein said contiguous cell conductive layer overlies said rim.
39. The capacitor as specified in claim 36, further comprising an additional conductive layer, said additional conductive layer having an additional conductive bottom portion smaller than, overlying, and substantially parallel to a preceding bottom portion located below said additional portion, said preceding and additional bottom portions interposed with an additional insulative layer, said insulative layer electrically isolating said additional and said preceding bottom portions, and said additional conductive layer having additional conductive sidewalls extending substantially vertical to said substrate and contiguous to an outer perimeter of said additional bottom portion, said cell capacitor layer overlying said additional sidewalls, said conductive fin dissecting said addition bottom portion and in electrical communication with said additional conductive layer.
40. The capacitor as specified in claim 39, wherein said capacitor further comprises a plurality of said additional conductive layers.
41. The capacitor as specified in claim 40, wherein said additional conductive layers comprise polycrystalline silicon layers subjected to an insitu phosphorous diffusion doping.
42. The capacitor as specified in claim 36, wherein said first conductive bottom portion is formed in an opening formed according to a masking pattern providing for a self-aligned opening in previously fabricated semiconductor structures and exposing said contact area.
43. The capacitor as specified in claim 36, wherein said conductive fin, said first conductive layer, said second conductive layer, and said cell conductive layer comprise polycrystalline silicon subjected to an insitu phosphorous diffusion doping.
44. The capacitor as specified in claim 36, wherein said insulative portion and said additional insulative layer comprise oxide.
45. The capacitor as specified in claim 36, wherein said dielectric layer comprises silicon nitride.
46. The capacitor as specified in claim 36, wherein the capacitor is a portion of a semiconductor device containing a plurality of said capacitors, said plurality having a common conductive cell plate layer overlying and in electrical communication with said cell conductive layer and overlying and insulated from ends of said projecting conductive rim, said plurality of capacitors attaining electrical communication one with the other via said common conductive cell plate layer.
47. The capacitor as specified in claim 46, wherein said common conductive cell plate layer comprises a polycrystalline silicon layer subjected to an insitu phosphorous diffusion doping.
"3-Dimensional Stacked Capacitor Cell for 16M and 64M Drams" pp. 592-595, 1988, by T. Ema et al.


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text:
Washington Voters May Decide Class Size, Money In Politics Measures
NWNews | By Austin Jenkins
Published July 1, 2014 at 3:07 PM PDT
July 3 is the deadline for initiative sponsors in Washington and Oregon to submit their petitions to qualify for the November election. Pot legalization and GMO-labeling are among the issues likely to make the ballot in Oregon. In Washington, it's guns, money and class-size.
Credit Austin Jenkins / Northwest News Network
File photo of initiative promoter Tim Eyman (right) unloading boxes of petitions for a ballot measure.
One element of a teacher's union-backed initiative to reduce Washington K-12 class sizes over four years includes kindergarten classes with a maximum of 17 students. That's in line with recommendations from the state's Quality Education Council. But the proposed measure doesn't come with a funding mechanism to hire the additional teachers and staff that would be needed.
Another initiative that plans to submit petitions this week is a non-binding message to Congress. It seeks a Constitutional amendment to overturn Citizens United and other recent Supreme Court rulings on campaign finance.
Meanwhile, dueling gun measures on background checks are already guaranteed a spot on Washington's fall ballot.
One ballot measure wildcard in Washington is whether professional initiative sponsor Tim Eyman will succeed in getting his latest anti-tax measure on the ballot.
Austin Jenkins
Since January 2004, Austin Jenkins has been the Olympia-based political reporter for the Northwest News Network. In that position, Austin covers Northwest politics and public policy, as well as the Washington State Legislature. You can also see Austin on television as host of TVW's (the C–SPAN of Washington State) Emmy-nominated public affairs program "Inside Olympia."
See stories by Austin Jenkins

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A World Apart, part 5: Relationships between Jews and non-Jews in Galicia
Posted on December 6, 2013 by Amy
My reading this time related largely to the relationships between the Jews and non-Jews in Galicia, socially, politically and otherwise. Margoshes began this section by claiming that at least in the region where he lived near Radomishla, the Jews were economically and politically often more powerful than most of the non-Jewish population. I would never have expected that at all; I assumed that the Jews were oppressed politically and economically. Instead, Margoshes asserted that in area from Rzeslow to Tarnow to Krakow, the peasants lived under the dominance of the Jewish estate holders. He wrote, "During the period between the 1880s and [World War I], this part of Galicia was a true paradise for Jews in some respects." (p. 99; emphasis added)
According to Margoshes, in this region, anti-Jewish persecution and acts were unknown, and Jews and gentiles lived peacefully together. If a peasant struck or even just insulted a Jew, the courts would punish the peasant by placing him in jail for at least two days. Peasants would tip their hats to Jewish estate-holders when they were driving (oxen or horses, I assume) on the road and when they entered their homes. (There is no mention of how the peasants treated and were treated by poor Jews, just the wealthier Jews, who in many instances were the employers of these peasants.)
Margoshes explains the political context for this by pointing out that in 1846 there had been a widespread revolt of the peasants against the wealthy Polish lords and landholders and that even forty years later, the politically powerful Polish aristocracy which controlled the government had not forgiven the peasants for the violence, deaths and damages caused by that uprising. Thus, in a dispute between a peasant and a Jew, the government would generally side with the Jew.
Margoshes also attributed much of the peacefulness of the region to the Austro-Hungarian gendarmes who were responsible for keeping law and order in the Empire as part of the imperial army. These soldiers lived in the area in barracks and frequently visited the estates to insure that all animals were registered and that everything was being managed according to the requirements of the Empire.
That did not mean that there were no disputes or problems between the peasants and their Jewish employers. Margoshes described a number of incidents of theft by the peasants who worked at his father-in-law's estate. He wrote, "A Jewish estate-holder and his household had to have eyes in the back of their heads in order to make sure that the workers were not stealing from him…." (p. 127). He also made the offensive generalization that it was part of the "inborn nature" of the peasants to steal: "he had to steal whenever the opportunity presented itself, especially from the Jewish estate-holder. For a peasant, the smallest stolen article was an asset."
In one story about the workers at his father-in-law's estate in Zgursk, moreoever, Margoshes also revealed that the relationships between the Polish peasants who worked on the estate and their Jewish employers were not always quite so amicable. There were at times hundreds of workers on the estate, and many of them boarded there. Margoshes himself admits that their living conditions were substandard: "everyone found a place to sleep in one of the three stables atop hay and straw and that was it. No pillows or sleepwear were provided and…a blanket used to cover horses served as a cover." (p. 96) The estate did provide three meals a day that Margoshes described as generous. Margoshes' mother-in-law and father-in-law were the task masters who oversaw all the work on the estate, and his father-in-law was known to be rather cold and strict.
Margoshes described one time that his father-in-law lost his temper with some of the workers who in his view were not working hard enough and began beating them with a paddle. In response, these workers and a number of others went on strike and refused to return to the fields. It took an intervention from the mother of the father-in-law to persuade the workers to return to work the next day. Margoshes described this as if it were a one-time incident, and perhaps it was, but it does reveal that there was some abuse of the peasants by at least this powerful Jew, his own father-in-law.
Thus, although Margoshes initially described the relationship between the gentile peasants and the Jews as peaceful and amicable, these incidents of theft and abusiveness suggest that there was in fact a great deal of resentment and anger among the peasants towards the Jews. Perhaps he was deluding himself when he wrote that it was a "true paradise" for Jews in this region during that time.
According to Margoshes, the wealthy Jews also had good relationships with the wealthy Polish lords and landowners, called pritsim or porits in the singular. He described his relationship with a neighboring porits as "very friendly, although from a distance." (p. 103) They would help each other out with favors, but were not social friends. Margoshes did not think that this relationship was unusual. He said that he "never heard of a case in the entire region of a porits who had negative relations with a Jew or where he insulted a Jew or harmed him in any way," (p. 104) although he did then go on to mention one polits who refused to trade with Jews.
There was also, according to Margoshes, peaceful co-existence between the Catholic priests and the Jewish population. Although he commented that "[p]riests, especially Catholic priests, cannot ever really be friends of the Jews" because "it is almost against [their]religion to love people of another faith," (p.111), he reported that nevertheless for the most part there was little conflict between the priests and the Jewish estate holders. He described a church law that prohibited Catholics from working as servants in Jewish homes, but pointed out that it was rarely enforced since the peasants needed employment and often worked in Jewish homes. Margoshes even developed a friendship with one of the local priests, but he severed that relationship when the priest tried to persuade Margoshes to come and see his church—not to convert, but just to go inside the church. Obviously, this "friendship" was a superficial one based on necessity, and feelings of distrust and difference outweighed any sense of real connection. Margoshes made it clear that it would not have been acceptable for him, as a Jew, to be seen in a Catholic church.
By the time I finished reading this section, I realized that Margoshes had had a very unrealistic view of the relationships between the Jews and non-Jews in Galicia during the late 19th century. First, his viewpoint is entirely based on the experiences of the wealthy Jewish estate-holders. The non-Jewish peasants may have seemed respectful and accepting of their Jewish employers, but beneath the surface there was likely a great deal of resentment and anger. The priests and non-Jewish estate-holders also may have been willing to live peacefully side-by-side with the wealthy Jews, but there certainly was not a true acceptance or friendship in these relationships. The gendarmes may have been keeping the peace, but beneath the surface the Jews were still the outsiders who were not integrated into the gentile world.
Moreover, Margoshes does not at all provide a picture of what life was like for the Jews who were not wealthy estate-holders. Were their relationships with the peasants, priests, and wealthy Polish landowners as "peaceful"? Or were they the targets of all the repressed resentment and anger that the gentiles felt towards the wealthy Jews?
It occurred to me after reading these chapters that Margoshes was writing in 1936. He had no idea what was going to happen in Poland during the Holocaust. I wonder whether his naiveté about how the gentiles felt about the Jews was widespread in Poland during the 1930s and 1940s. If only they had been more realistic, perhaps more of them would have left sooner.
Which brings me to another question: if things were so great in the 1880s and 1890s for wealthy Jews in Poland, why did Margoshes and so many others, including Joseph and Bessie, leave?
This entry was posted in Books, Favorite Posts, Galicia/Poland and tagged Galicia, Gentile, holocaust, Jew, Margoshes, poland, Radomishla, Tarnow, Zgursk by Amy. Bookmark the permalink.
I am interested in genealogy and family research, books, movies, cats, dogs, and baseball.
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7 thoughts on "A World Apart, part 5: Relationships between Jews and non-Jews in Galicia"
Robin on December 6, 2013 at 9:24 am said:
Good point at the end.
Amy on December 6, 2013 at 9:51 am said:
Thanks for reading, Robin.
Pingback: Galicia Mon Amour: A Conversation « brotmanblog
EmilyAnn Frances on June 16, 2016 at 2:18 pm said:
I'm almost finished reading this book, Amy. I'm glad I took you up on the recommendation. What is also interesting is that the relationships between members of the Jewish community also had elements of friction and deception, along with litigation. I'm thinking of the chapters about the Shtsutsin Meadows. Margoshes may have waxed nostalgic for earlier times but I'm finding many helpful directions from the details he provides about the towns and businesses. Much can be gained from reading this memoir more than once. For someone without any knowledge of Galicia or the situation at the time it can serve as an introduction to the events going on like the Reform Movement. It also offers non-Jews a chance to understand the differences in the sects and the customs.
What I enjoyed most during this first read was watching Mr. Margoshes come into his voice as he describes the life with his wife's family. We learn that many women didn't just keep house and have children. They managed the estates or forests while their husbands had other areas of business or study. Since this is a memoir I allow more latitude since the author is working from memory and memory is never perfect.
Amy on June 17, 2016 at 1:23 pm said:
Hi, Emily—sorry I somehow missed this comment yesterday. I am so glad you enjoyed the book. I read it quite a while ago, so many of the details are lost in my brain somewhere. I think you are right—it merits re-reading. As for divisions among the Jews, isn't that always a thing?? 🙂
EmilyAnn Frances on June 18, 2016 at 6:02 am said:
Yes, I understand this from living in Boro Park, Brooklyn. Even among the Hassids there are rivaling sects.
Amy on June 18, 2016 at 8:20 am said:
Yes, and for all of history, there have been divisions and differences among the Jewish people. Even Moses faced dissenters!


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Order UFC 264: Poirier vs McGregor 3
Felder laughs the laugh of someone who is still a competitive athlete, but not a professional prizefighter anymore. The June 6 event wasn't a fight, but the Ironman 70.3 in Virginia, a triathlon event that requires competitors to swim 1.2 miles, bike 56 miles, and run 13.1 miles.
A day like that can make you wonder whether getting punched in the face is a better option, but in his first time as a triathlete, the 37-year-old killed it, coming in 23rd in his age group and 135th overall in a race with 1,378 finishers. In other words, Felder's not too bad at this stuff, and when asked if he's ready to toe the line again, he says, "I don't think you even need me to answer that question knowing that you've interviewed me for fights for how many years. Of course, I thought, 'Oh, I gotta do better than that.' (Laughs) But I did pretty well, all things considered."
Pretty well is an understatement, but that's always how Felder carried himself as a fighter. He was never one to beat his chest and shout his merits from the mountaintop but, at the same time, he was a realist and someone always honest about where he was in his career. So it wasn't a big surprise that on May 22, Felder decided that after 23 pro fights, it was time to retire from the sport of MMA. Now that's just as an active fighter, as the longtime lightweight contender will continue to call the fights as an Octagonside analyst, but as far as strapping the gloves on again, he's content with his decision to walk away.
"I'm still young, I'm still fresh, I'm sharp, I can do the acting thing, I'm doing the commentary already, I'm racing now, I'm meeting new people and athletes through that, and there's something that's lining up to keep me plenty busy," Felder said. "I don't need to fight. The fights weren't there that I wanted and the guys below me deserved the opportunity to fight those higher-ranked guys. So it made sense to go. Other things are exciting me more than fighting is anymore."
Like racing triathlons. And not just showing up but trying to beat whoever is on the course with him.
Paul Felder's Top Finishes
"I'm training for this like I'm trying to win these things," he said. "Today (June 22) was a three-hour ride on the bike in my garage on the trainer, and an hour and ten-minute three-thousand-yard swim afterwards in the pool. I burn like 5,000 calories a day. I eat whatever I want now. (Laughs) It's a crazy new world that I've entered in, but I think it was the perfect thing I could have found to fill the void that I needed to fill, because if I didn't have something, I would have probably stuck around too long. I probably would have fought more and went way longer than I needed to because I didn't have that spark, that drive for something that wakes me up every day."
At the time that he made his retirement announcement during a UFC Fight Night broadcast, Felder was ranked ninth in the world at 155 pounds, a feat built on memorable wins over Alessandro Ricci, Stevie Ray, James Vick and Edson Barboza, as well as an unforgettable war with Dan Hooker and a Fight of the Night battle with Rafael Dos Anjos that would ultimately be his final fight. Oh yeah, he also beat some guy named Charles Oliveira who just happens to be the new UFC lightweight champion. Now that would be a storyline – Oliveira attempting to defeat the last man to hand him a loss while Felder gets his long-awaited title shot.
RELATED: Paul Felder Announces Retirement
Yes, Felder thought about it briefly.
"I can tell you, that at least made it a little bit harder, where I'm like, I beat this dude with elbows and TKOed him and nobody even knew how good this guy was, and he goes on to become champion of the world in my weight division," he laughs. "But, at the same time, I get to walk away and say right when that guy wins the belt I'm the last guy to beat him."
That's something to be proud of, as he should be proud of the 15 fights he gave UFC fans from 2014 to 2020. No, he didn't win a title in the Octagon, but he showed up to fight every time his name was called, and there's something to be said for that. Better yet, he made his mom, his girlfriend and his daughter happy when he called it a day and moved on to the next chapter in his life.
"I think everybody was just making sure that it was really what I wanted and that I wasn't doing it for them," said Felder. "Because they made it clear that they were kinda getting ready for it to be done a while ago, especially my mom being the worst, of course. She was ready for me to hang it up six years ago (Laughs), or even before that, before I ever did it. Christine (Felder's girlfriend) didn't want it to get to the point where I was doing it just to do it and if my heart wasn't in it. I think that became pretty apparent over the last year, since the pandemic. I kinda lost that edge towards the sport. And once that goes, then it's time."
Paul Felder: Girl Dad
That didn't stop Felder from making the walk one more time, though, and when Islam Makhachev was forced to withdraw from a November 14 main event with Dos Anjos, it was the Philadelphian who stepped up for the fight. On November 9.
That was Felder the Fighter in a nutshell. He didn't win against Dos Anjos, but he showed up on weight, ready to fight and he gave the fans one more stellar effort. For five rounds, no less. It wasn't the storybook ending for his career, but there was a story there, just like there appeared to be one for each of his UFC fights, whether it was dealing with being away from his daughter Aisling, his relationship with his mom, Marian, or the loss of his dad, Tom, to pancreatic cancer. Even fights like the one with Ricci in 2017 had something attached to it to make you care and get emotionally involved in what happened when the Octagon door closed.
Watch All Of Felder's Fights On UFC Fight Pass
"I was coming off a loss, and that was the first time that I ever trained with Duke Roufus and I lived in the basement of his gym in an old office with a futon for that one," laughs Felder, who agrees that his fights weren't just fights.
"There was a story there, and that's what the best fights do to us," he said. "The fights have always been a show to me; we're putting on a show, so for me to have some kind of personal circumstance that would feed into each one of these camps, so it wasn't just a performance but an entire eight to ten weeks, each one was different, whether it was Aisling, or family, like my dad passing away, whatever was going on with me and Christine at the time, my mom, they've all had something."
What they did was let us know who Paul Felder was and what made him tick. He wasn't just the guy showing up to throw down and take one to give two back for 15 or 25 minutes. He was a flesh and blood human being, an ordinary guy doing extraordinary things. And while some of his peers just want to fight and embrace that part of it, Felder was all-in for the whole process of going through camp, handling media obligations, and then making that walk.
"In a way, I'll miss the whole thing, because that, to me, is built into the fight," he explains. "What gets in there and what excites us in there can be a million different things and, for me, it was definitely the whole process. I had to suffer and it had to be almost like a Rocky-type thing for me because that's, in my mind, what training camp was. And then the interviews and thinking of all the things that were driving me for the fight, that's what got me into the cage. If I didn't have that stuff, you'd have to piss me off, and then I'd still throw down. I've been in fistfights, but the only thing making me do it professionally was the whole build-up. Even the weight cut, I miss hanging out with (nutritionist) Ian (Larios), I miss a little bit of that suffering and doing s**t that other people will never do in their lifetime. I think that's what excited me."
UFC lightweight Paul Felder announces his retirement from mixed martial arts while live on broadcast during the UFC Fight Night event at UFC APEX on May 22, 2021 in Las Vegas, Nevada. (Photo by Chris Unger/Zuffa LLC)
Now, it's swimming, biking and running with a new group of crazies pushing themselves to places most wouldn't dare to. And after the first one, it's clear that he's found a new competitive home.
"The race itself, the swim went better than I ever would have thought it would," Felder said of his 70.3 miler. "The bike was a blast - it was up through the Blue Ridge Mountains and it was like crazy climbs, over 3,000 feet elevation gain, crazy downhills, like 40-something miles an hour on them, just zipping past people, but the bike kinda crushed everybody and it's the first time that they've done it on this course in Virginia, ever, so nobody really knew how bad that bike course was gonna be, so everybody on the run looked like zombies. We're all running, it's 90 degrees with humidity that day, there was not a cloud in the sky to stop the sun. Those are the worst running conditions possible."
And this is what he'll do for fun in retirement?
"You don't fight in the UFC for seven years and get to the top 10 without having a little bit of crazy competitiveness in you, so thank God for this stuff," he said.
This is true. But the million-dollar question awaits: is mom happy that he's hung up the gloves and moved to triathlons?
"My mom still managed to get stressed out about how I looked afterwards because she said it looked like I was cutting weight," Felder laughs. It's a good laugh, the laugh of someone in a good place after a career well fought.
Paul Felder
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text:
FIR Registered Against Instagram by Manish Singh in Delhi
Delhi police have registered FIR against Instagram for allegedly showing lord Shiva in an objectionable manner. Manish Singh, a resident of Delhi and leader of Bhartiya Janta Party (BJP), filed an FIR after stickers of Lord Shiva with some glass surfaced on Instagram.
FIR on the grounds of hurting the religious sentiments has been filed.
The stickers can be found by searching lord shiva on the Instagram story page. According to the complaint, the stickers were provided by Instagram himself. Complaint further alleged that the GIF had been created to hurt Hindu commuting.
In his complaint, he stated, "Accused above-named have portrayed Lord Shiva in a terrible taste, it would be pertinent to mention herein that Lord Shiva is venerated by millions and millions of Hindus as the Supreme God."
"That the accused, in one of their Graphics Interchange Format (GIF), have shown the Supreme God, Lord Shiva, as holding a glass of wine in one hand and a mobile phone in the other hand," Singh complained.
"Given the above stated, it is, therefore,e, most respectfully submitted that a criminal case is registered against the CEO and other officials of Instagram, who in conspiracy with other persons have committed offenses falling within the parameters of the Indian Penal Code. Also, under the Information Technology Act," Singh said.
As per the reports, many complaints have been registered against Instagram.
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text:
Q: Is it possible to "concatenate" blocks from child and parent Tornado templates? I have a few templates like this:
base.html
<script src="/js/jquery.js"></script>
{% block scripts %}
{% end %}

blog-base.html
{% extends base.html %}
{% block scripts %}
    <script src="/js/blog-base.js"></script>
{% end %}

blog-article.html
{% extends blog-base.html %}
{% block scripts %}
    <script src="/js/blog-article.js"></script>
{% end %}

I would like to have all three scripts included in the final product, but of course the above code won't do that, instead opting to replace blog-base.html's script block with the one in blog-article.html. Is there any way, besides setting up a separate block name, to make this work? I imagined something like this for blog-article.html
{% extends base.html %}
{% block scripts %}
    <script src="/js/blog-base.js"></script>
    {% render-block scripts %}
    {% end %}
{% end %}

to have it both render the child template's scripts block and define a block for the parent base.html to use, but I have my doubts that such a thing exists.

A: It's not currently possible (and difficult to implement with the way Tornado templates currently work).  For the particular case of adding script tags you might be able to use UIModules (which have special support for adding scripts or css links to the current page) instead of extending a base template.

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text:
Aguero fires hat-trick as classy City hit six
Sun 19 Aug
City moved to the top of the Premier League with a pulsating victory over Huddersfield Town.
The Blues scored three goals in each half to emphatically swipe aside the Terriers 6-1 at the Etihad - a statement of intent if ever there was and the perfect way to start the home campaign.
The visitors came to defend in numbers and frustrate.
David Silva was at the heart of most of City's creative probings and Gabriel Jesus twice had chances to open the scoring in the opening minutes only to be denied by keeper Ben Hamer.
But the champions were patient and when the opening goal came, it wasn't either Silva (David or Bernardo) who made it - it was Ederson.
LITTLE BOY BLUE : David Silva cradles his son Mateo before kick-off
It seems the best way to foil any seemingly solid defensive plan is to do something a little different, so when the visitors saw the ball at Ederson's feet, there seemed little to worry about - but one pinpoint 70-yard pass later and City were about to strike.
The pass found Aguero, who still had plenty to do as he controlled the ball from his goalkeeper, but crucially, he was in behind the Terriers' defence.
He had one man-marker to worry about and after he'd worked himself a yard of space. he deftly chipped the ball over Hamer and the back-tracking Terence Kongolo on the line to put the Blues 1-0 up on 25 minutes.
CHEEKY CHIP : Sergio Aguero opens the scoring with a glorious clipped finish over Ben Hamer
Six minutes later it was 2-0.
Benjamin Mendy burst forward and exchanged passes with Gabriel Jesus before the ball fell loose to the Brazilian on the edge of the box and he immediately fizzed a low shot into the bottom corner with Hamer unsighted.
The blitz continues as the champions scored a third inside 10 minutes as Hamer spilled Mendy's cross allowing Aguero the simplest of tasks to poke the ball home from a couple of yards out.
The only blip on an otherwise peerless first half was moments before the break when Billing's throw was flicked on by Mounie and and Stankovic poked in from close range.
No matter - City restored a three-goal advantage just three minutes into the second half with a wonderful free-kick from 20 yards from David Silva that left Hamer flat-footed - the perfect way to mark his 250th Premier League appearance on his son Mateo's first Etihad visit.
EL MAGO : David Silva marks his 250th Premier League appearance with a wonderful goal - a free-kick, bent into the top corner
Aguero then came close to another hat-trick on 57 as he skipped away from a couple of challenges before firing a low shot against the foot of the post from outside the box with the visitors reeling.
Of course, with so long left, it was almost inevitable that the Blues would inflict further damage and it came on 75 minutes as Mendy sent in a fine low cross and Aguero deftly volleyed past Hamer from close range for yet another hat-trick in sky blue - his 13th in fact - to make it 5-1.
Kun's reward was to be replaced by Leroy Sane seconds later and the German winger almost grabbed a sixth goal shortly after as he raced into the box only to see his shot saved - but Kongolo finished the job as the ball hit his knee to make it 6-1 five minutes from the end of a long afternoon for the West Yorkshire side.
There could have been more in the time that remained, but nobody was complaining as the champions left the pitch to a standing ovation.
Man of the Match: Sergio Aguero
Hat-trick No.13 for the Argentine who looks fit and razor-sharp. Could this be his best season yet ? He's already got five this season and is well on his way to 300(!)
MINE'S A TREBLE : Three is the magic number!
City looking in fine fettle
Some of the approach play was delightful as the champions sent out a warning that it is business as usual despite the loss of Kevin De Bruyne.
Bernardo Silva was bright and inventive and playing two strikers proved too much for the Terriers to cope with.
The City defence will have many busier afternoons than this in the games to come, but it was important to post a warning to sides coming to defend that there is no hiding place against Pep Guardiola's relentless, well-oiled machine.
ALO MAE : The famous celebration!
Silva: Rolls Royce performance
Simply superb and worthy of the man of the match award - had Sergio not bagged a treble - David Silva seems ageless.
At the heart of all City's best moves for an hour or more, he capped appearance No.250 with a delightful free-kick to get his campaign off an running with a display that suggests he is going to be pulling the strings for the Blues for many seasons to come.
GENIUS AT WORK : David Silva attempts to weave some magic in the box
Reaction: Pep Guardiola
"We suffered last season a lot against Huddersfield - we had problems to attack more fluidly. Teams defended with four or five at the back, or deep - even the strikers go deep to help the holding midfielders.
"Last season, we did it once or twice but not much more. We decided to play with two strikers to have more of a presence in the box, knowing we also have Mendy arriving. He is clever - he can see the pass in front of the 'keeper, or the penalty spot, or the 18-yard box. He is a clever guy, arriving there.
"Today, it worked but that does not mean every time, we will play in that way. It depends on the players we have and the players that play.
"The way we attacked and our desire without the ball was perfect. We started with a lot of people coming back later. That showed in the Community Shield and against Arsenal and today, we were much better in terms of football and consistency. Against Chelsea and Arsenal, we survived rather than played well.Attacking with ten players in the box, we did quite well."
City travel to newly-promoted Wolves next Saturday, kick-off at 12.30pm.
News about Man City v Huddersfield
News Men's Team Match Report Premier League Huddersfield Town Manchester City Etihad Stadium


I have a 2001 WJ Grand Cherokee 4.0. I bought it yesterday with it missing bad, I ran the codes today and it was a random misfire code, misfire #1,2,3,4,5 and a bank one rich code. Any idea what this could be? It stumbles and misses at idle and even worse under load.
Being you just bought it and don't have the history. Check the fuel pressure. Check the spark plugs. Post up the make and part number of the plugs. Check the gap. Do a compression test. Verify you have spark. Check the plug boots to see they are not cracked or damaged.
Also check for vacuum or intake leaks.
Last edited by JPNinPA; 10-04-2016 at 08:37 PM.
Also check for leaks in your cooling system. could be a blown head gasket. Hopefuly not but if the cooling water runs low your head gasket will take a beating for sure.
I just did the combustion leak test, the blue liquid in clear tube, stuck in the radiator cap opening. It turned light green after about 4-5 minutes. So I'm guessing it's the head, since they're known to be crap. Then to top it off, when I was going to shut it off the oil pressure visage was at 0. I'm thinking I might as well get a used engine from Craigslist. This is just a vehicle I'm fixing to sell, trying to do it as fast and cheap as possible. Any input is appreciated.
No oil pressure could just be the sending unit.
Ya I had a sending unit that just needed to be cleaned. if you dont know how they work its a cheap replacement for a new one. If it is the head gasket it could cost 1.700.00 to replace it. Thats with a new water pump and cooling fan and igintion coil with a RnR on your radiator. I just payed that much on my 2000 Grand ! sould have run it across the scales because it has a leak in the heater core !


We are exposed to numerous amounts of advertisements, media, opinions and designs on a daily basis. Think back to when record players were introduced to our society in the late 1800's. I can only imagine what the hype was to listen to any selection of music in your own home and how excited people were about this grand invention, but now we can take music anywhere (your car, the gym, an airplane, to work or just walking down the street)!
We constantly have some type of outlet at our finger tips. When I get bored, the first thing I do is pick up my phone. Being impatient has reached a whole new level in this day-in-age. What happened to relaxation or living in the now?
I believe we are overstimulated. We may have the constant need to be doing something because of what we are exposed to on a daily basis. Companies are always looking at ways to not only catch the attention of consumers, but keep their attention. It will be interesting to see what companies have up their sleeves to engage consumers in 2014.
Visuals, visuals, visuals. Pinterest anyone? We are constantly looking at pictures. Whether it be web-related, magazines or an ad, we love visuals!
Speed. We want things when we want it. Companies will look to get things out to consumers as quickly as possible.
Mobile. We would be lost without our cell phones. Companies will give us (if they haven't already) access to education, financial services and health care, just to name a few. Cell phones give us the ability to get that information now.
Going against tradition. Companies want to surprise you. Out with the old, in with the new will be the theme of 2014.
If you or your company are looking to enhance visibility for consumers to notice you in our overstimulated world, try something different, but quick. Hopefully you can sit back and smell the roses every once-in-a-while as well.


ABB Control has the best solution for Low Power Factor and Harmonic Distortion.
Why improve low power factor?
"providing " needed reactive power (kvar) to the power supply. By supplying their own source of reactive power, the industrial user frees the utility from having to supply it; therefore, the total amount of apparent power (kVA) supplied by the utility will be less.
Power factor correction capacitors reduce the total current drawn from the distribution system and subsequently increase system capacity.
Many industrial and commercial applications can benefit from improving power factor levels. These include: manufacturers, hospitals, shopping malls, office building & institutions, pulp & paper mills, saw mills, textile mills, printing plants, Dlastic manufacturers. etc.
In the following example, if power factor correction is applied to the electrical network, increasing power factor to 90%, the potential annual savings on utility bills would be $4,322.23, or an average of $360 per month, a savings of up to 15%!
Typical installations will pay for themselves within 18 months, and in many cases, within 1 year!
Increase your system's capacity, etc.
ABB Control's Capacitors are Manufactured in Canada. Copyright © 1996 ABB Control. Reprinted with Permission.


text:
Shemaroo set to launch Marathi movie channel Shemaroo MarathiBana on 14th January
It has a huge library of movies, kids, news and regional content which it has been distributing to satellite, cable networks, and television channels.
By Basil Kannagi Arasu January 13, 2020 at 8:36 pm IST
Leading Indian content powerhouse Shemaroo Entertainment Limited is all set to officially launch its new Marathi movie channel Shemaroo MarathiBana on 14th January.
Shemaroo is all set to enter a new arena in 2020 with the launch of its own Television channel. Until now Shemaroo had been making business deals with DTH operators for providing premium content across genres including movies, devotion, comedy, kids and regional content. In 2019, Shemaroo launched its OTT service ShemarooMe.
It has a huge library of movies, kids, news and regional content which it has been distributing to satellite, cable networks, and television channels. It is now ready to tap into its huge library and use it for its own television channel.
The channel is currently available on DD Free Dish and on Dish TV through DD Free Dish. Shemaroo MarathiBana had landed a bucket D MPEG 2 slot in the 42nd E-Auction and was added on DD Free Dish on 1st December. The channel was initially using the license of MR TV before it was renamed in the first week of December 2019.
MR TV's test signal had started in mid-November on INSAT 4B. The channel paid Prasar Bharati Rs 1.55 crores for the slot on a pro-rata basis till 29th February 2020. The I&B Ministry is likely to have renamed MR TV license to Shemaroo MarathiBana as the official list of TV channels available on DD Free Dish released by Prasar Bharati carries Shemaroo MarathiBana. Prasar Bharati's official notice declaring the 42nd E-Auction result had mentioned MR TV as the winner of the slot.
While all of Shemaroo powered active channels are paid service channel with Shemaroo Me also coming with paid plans, interestingly Shemaroo MarathiBana is available on DD Free Dish. It remains to be seen if the channel is a paid or FTA channel for pay DTH operators.
Shemaroo has sent out press invites for the launch of Shemaroo MarathiBana which is scheduled for 14th January, 06:30 PM onwards. The event will be attended by the superstars of Marathi film fraternity who have entertained with their masala movies and plays.
Posted in: News TV Channels
Tags: ShemarooShemaroo MarathiBana
GTPL Hathway revenue at Rs 6875 million in Q3 FY 19-20; ventures into Tamil Nadu market
Dish TV and d2h offering Rs 10 cashback on downloading Watcho app
World Tamil TV Premiere
by dineshakshit1992 on Jan 30, 2023


text:
<?php

namespace common\models;

use Yii;
use yii\base\Model;

/**
 * Class SignupForm
 *
 * @package common\models
 * @author  Agiel K. Saputra <13nightevil@gmail.com>
 * @since   1.0
 */
class SignupForm extends Model
{
    /**
     * @var string
     */
    public $username;
    /**
     * @var string
     */
    public $email;
    /**
     * @var string
     */
    public $password;
    /**
     * @var boolean
     */
    public $term_condition;

    /**
     * @inheritdoc
     */
    public function rules()
    {
        return [
            ['username', 'filter', 'filter' => 'trim'],
            ['username', 'required'],
            ['username', 'unique', 'targetClass' => '\common\models\User', 'message' => 'This username has already been taken.'],
            ['username', 'string', 'min' => 2, 'max' => 255],

            ['email', 'filter', 'filter' => 'trim'],
            ['email', 'required'],
            ['email', 'email'],
            ['email', 'unique', 'targetClass' => '\common\models\User', 'message' => 'This email address has already been taken.'],

            ['password', 'required'],
            ['password', 'string', 'min' => 6],

            ['term_condition', 'required']
        ];
    }

    /**
     * Signs user up.
     *
     * @return User|null the saved model or null if saving fails
     */
    public function signup()
    {
        if ($this->validate()) {
            $user = new User();
            $user->username = $this->username;
            $user->email = $this->email;
            $user->setPassword($this->password);
            $user->generateAuthKey();
            if ($user->save()) {
                Yii::$app->authManager->assign( Yii::$app->authManager->getRole( Option::get('default_role') ), $user->id );
                return $user;
            }
        }

        return null;
    }
}

redpajama_set_name: RedPajamaGithub


If you're looking for a fast transit option, whether it's to shorten your commute or to get you started on an out of town vacation, booking a private plane is not your only option.
Longhorn Helicopters can take care of all your business travel needs in the DFW metroplex area.
But what sets helicopter travel apart from the airplane flights you're likely more used to? Here are a few things you should keep in mind as a first time helicopter passenger.
If you're a first time helicopter passenger, chances are that you might have some fear of unknown. We've all seen the action movies and the often explosive ends helicopters come to.
Fortunately, that's all movie magic. Helicopter fatalities are far fewer than those that result from driving, and helicopter accidents have been steadily falling even further for the past few years now.
Helicopters have extensive inspection and safety protocols, and your pilot will be able to brief you on your role as a passenger.
The added versatility of helicopters when it comes to where and when they can land also means that in case of emergency, they might be better outfitted than planes to deal with it.
Helicopter flights can be breezy and unpredictable in temperature, especially if you end up in an open door model. This means that lots of light, fitted layers are your ideal clothing plan.
If you have long hair, have a plan for tying it back. This isn't a great time to wear a lot of extra loose jewelry, hats or shoes that easily slip off. A light jacket that you can easily take on and off is a good flying essential.
Although you're not going to want too many extras, there are a few things that will be necessities.
A photo ID is important, just like it would be for an airplane flight. Even if it seems to be a cloudy day, you will likely want to grab some sunglasses just in case you get into clear, sunny skies. Especially if you have sensitive ears, you will probably want to have some hearing protection on hand as well.
Because helicopter flights are small and the number of people aboard will be limited by necessity, this allows for a lot more direct communication between you and the pilot.
This means that if you have questions or concerns, a highly trained pilot will be right there to answer you. You'll be given thorough instructions, and listening and learning will ensure that you have any information you need for a safe and comfortable ride.
Now that you're ready to fly, you can charter a helicopter with Longhorn Helicopters any time!


The two pals hit up Brazil while taking a break from their tour.
Rio de Janeiro just got a whole lot hotter this week when it was invaded by two silver foxes!
Andy Cohen and Anderson Cooper are in the middle of their tour "AC2: An Intimate Evening with Anderson Cooper and Andy Cohen," but the two BFFs have found time for some R&R.
The pair escaped the cold weather of New York City to relax in Brazil. Of course, they posted some envy-inducing tropical photos to prove it.
Andy and Anderson will be hitting Miami, Chicago and Atlanta in the coming months as part of their "Deep Talk and Shallow Tales" tour where the two promise an "unscripted, uncensored and unforgettable" night of conversation. Andy previously said, "We represent the two sides of your brain. Serious and silly. Deep and shallow. I bring out the fun side in Anderson and he makes me think."
"We know what's interesting about each other, so it'll be very much like eavesdropping on a friendship," Anderson added. They kicked off the tour in Boston just a couple of weeks ago.


After working normally, my phpMyFAQ installation now is refusing to show FAQs that were previously entered, unless I go to the Administrative section and "re-save" them. By "re-save" I mean I must go to the edit FAQ function and while the FAQ is on the screen click save, even though the entry was already in the system and had been saved and working properly before. When I "re-save" the entry I am making no other adjustments, the FAQ's had previously been set to "visible," and no other changes are being made.
faq-img-1.jpg shows the status of the system prior to any changes. In this case, it is clear that two FAQs have been entered into the system in the "security issues" category. However, I am unable to view either of the two FAQs.
faq-img-2.jpg shows what happens after I enter the system as Administrator and perform the re-saving operation described above on one of the two FAQs in the security issues category. At this point we can see the entry for one of the two FAQs and it is fully accessible by clicking on its description ("Eudora says the ...."). The other FAQ in the category is still not visible, however, since it has not been re-saved.
faq-img-3.jpg shows "All Categories" / "Categories with FAQs" page, indicating that the system is clearly aware that there are FAQs in the system, even though they cannot currently be displayed unless I go through the procedure above.
I get the same results whether I attempt to view the FAQs as a normal user / site visitor, or as an Administrator while logged into the system.
What is going on here and how can I fix it other than having to go through the edit / re-save process on all the FAQs in the system? Even if the re-save procedure works, it does not explain what has happened or offer any assurance that the same problem will not occur again. I can provide screen shots of other pages from the system if that will help.


text:
David Azulai (; 5 May 1954 – 30 October 2018) was an Israeli politician who served as a member of the Knesset for Shas for over 20 years from 1996 and 2018. He was also Minister of Religious Services from 2015 until his death in 2018.

Biography
David Azulai was born in Meknes in Morocco, and immigrated to Israel in 1963. From 1973 to 1993, he worked as a teacher and vice principal.

Political career
From 1978 to 1993, he was a member of Acre's local council and served in the municipality's committees. In 1993, he was elected to Nahal Iron Regional Council, serving as deputy mayor of the council and later as its mayor. He resigned following his election to the Knesset in 1996. He served as Chairman of the Internal Affairs and Environment Committee (2000–2001) and as Deputy Minister of Internal Affairs (2001–2003). In the latter post, he was assigned to head of commission regarding the status of the Falasha.

Following the 2015 elections, he was appointed Minister of Religious Services in the new government. He gave up his Knesset seat in March 2018 under the Norwegian Law due to an illness, and was replaced by his son Yinon.

Controversy
In a meeting with MK Ayelet Shaked about Women of the Wall, an Israeli group fighting for the right of Jewish women to pray at the Kotel in their fashion, Azulai referred to them as "provocateurs", and claimed that Reform Judaism is "a disaster for the nation of Israel". Women of the Wall then voiced a protest: "We expect Ayelet Shaked, like her predecessor, to announce unequivocally that as a woman and a justice minister, she will not sign discriminatory regulations, and will not be a part of exclusion of women from the Western Wall or from any other place. The court has already ruled that these regulations are discriminatory and illegal." Azulai's comments were also condemned by Rabbi Gilad Kariv, executive director of the Reform movement in Israel, who noted, "If Minister Azoulay cannot function as minister for all the citizens of Israel, then he should resign."

A month later, in July 2015, Azulai stated "The moment a Reform Jew stops following the religion of Israel... I cannot allow myself to call such a person a Jew."

Death
On 30 October 2018, Azulai died after a long-term battle with cancer. The illness had also forced him to resign from the Knesset early in the year. His son Yinon, who succeeded him in Knesset, is among those rumored to be candidates to take Azulai's place as the Israeli Religious Affairs Minister.

References

External links

1954 births
2018 deaths
Deputy ministers of Israel
Ministers of Religious affairs of Israel
Israeli Orthodox Jews
Israeli schoolteachers
Deaths from cancer in Israel
Mayors of regional councils in Israel
Members of the 14th Knesset (1996–1999)
Members of the 15th Knesset (1999–2003)
Members of the 16th Knesset (2003–2006)
Members of the 17th Knesset (2006–2009)
Members of the 18th Knesset (2009–2013)
Members of the 19th Knesset (2013–2015)
Members of the 20th Knesset (2015–2019)
Moroccan emigrants to Israel
20th-century Moroccan Jews
People from Acre, Israel
People from Meknes
Shas politicians

redpajama_set_name: RedPajamaWikipedia


text:
Q: What's the meaning of 'bootstrapped' in this context? From the description of the game called Natural Selection 2: 'Choose to play as a bootstrapped Marine or a beastly alien in the action-packed battle for ultimate survival. Natural Selection 2 flawlessly combines a multiplayer first-person shooter with real-time strategy elements for a game that is addictive, immersive and exciting! The tightly designed shooting mechanics combined with intricate maps create a competitive challenge for all players.' The text comes from: http://www.humblebundle.com/

A: I'm familiar with this game so have some context. Since the game is about marines deployed on alien planets or infested human colonies, and the fight to survive, I think the use of 'bootstrapped' is meant to confer a sense of self reliance, or self initiative. The marines are in it alone and can only rely on themselves to survive.

A: Bootstrapped

*

*Verb: To promote and develop by use of one's own initiative and work
without reliance on outside help

*Adjective: Undertaken or accomplished with minimal outside help.

By these definitions, it sounds as if they're trying to say the soldier is an individual who 'does things on his own, without any outside help'.
It's an awkward construction to be sure, but given the context of it being a Marine in a video game, and it being a player character, them being 'all on their own' seems very likely.


We noticed that Kittens coat went dull after his elbow op, but that came back to normal a few months later... With a bath a grooming palour and lots of brushing!!!
Hope you manage to get Sophie's nice soft coat back somehow.
Well, I don't have any different suggestions about her poor coat, but did you consider the dreaded Avon Skin-So-Soft for the fleas? I swear to god, that stuff is SOVEREIGN for anything to do with a bug!
If you mix it one parts SSS to 2 parts water, and use a really fine non-aerosol hairspray bottle/mister, it really does work. Mom's used it for at least 30 years to keep bugs away from the camping gear and off the dogs when we go out in the woods.
And I suppose a little topical moisture from the spray couldn't help but soften her coast a little.
Do all newf girls get bad coats after they have been spayed? Is it based on nutrition or genetics or both? Lucy was spayed last month and now I'm freaking out that she is going to lose her beautiful coat!


text:
Il Sei Nazioni 2002 (; ; ) fu la 3ª edizione del torneo annuale di rugby a 15 tra le squadre nazionali di , , , ,  e , nonché la 108ª in assoluto considerando anche le edizioni dell'Home Nations Championship e del Cinque Nazioni.

Noto per motivi di sponsorizzazione come 2002 Lloyds TSB Six Nations a seguito di accordo di partnership commerciale con la banca Lloyds TSB, si tenne dal  al  e fu l'ultima edizione con tale sponsor, che per cinque edizioni di torneo gli aveva dato il proprio nome; dalla stagione successiva e per 15 edizioni consecutive lo sponsor fu Royal Bank of Scotland.

Ad aggiudicarsi la vittoria finale del torneo fu la , al suo 21º titolo (13º indiviso) e, nell'occasione, anche al suo primo Grande Slam nell'era del Sei Nazioni e settimo complessivo.
La chiave di volta del torneo dei francesi fu la vittoria interna 20-14 sui campioni uscenti dell'; grazie a tale affermazione, infatti, i bianchi di Clive Woodward furono staccati in classifica e, pur vincendo gli ultimi due incontri, non riuscirono a riprendere la nazionale d'Oltremanica.

L', che proprio nell'ultima giornata di torneo ancora a zero vittorie ospitava gli inglesi, fu da essi sconfitta 9-45 e chiuse il suo secondo Sei Nazioni consecutivo senza punti; a seguito di tale ulteriore whitewash, la F.I.R. decise l'esonero del C.T. della nazionale, il neozelandese Brad Johnstone.

Nazionali partecipanti e sedi

Risultati

1ª giornata

2ª giornata

3ª giornata

4ª giornata

5ª giornata

Classifica

Note

Altri progetti

Collegamenti esterni


This institute uses Module 1 of the Developing Mathematical Ideas (DMI) professional development program developed by Deborah Schifter, Virginia Bastable and Susan Jo Russell. In this first module participants examine children's thinking to uncover their conceptions and misconceptions about the base ten number system. Using video and written cases, participants will explore their own ideas about the base ten system, learn how the core ideas of the number system develop across the grades; examine student work and learn to recognize key ideas students grapple with; and enhance their capacity to ask questions that help students deepen their understanding of the base ten system.


text:
Fight goes on against green space plans
HESTON residents fighting plans to concrete 0over green spaces on their estate have accused housing chiefs of ignoring their concerns.
Hounslow Homes, which manages council housing across the borough, first announced plans for more than 100 new homes on Brabazon Road estate more than a year ago.
The proposals, which include building on the main field and other green spaces, proved highly contentious and the architects have already been forced back to the drawing board twice.
Hounslow Homes launched its third round of consultation with an event at Berkeley School on Saturday, at a meeting attended by scores of residents.
But campaigners claim the latest proposals, which still include plans for homes on the main green, contain too few concessions.
They have also accused Hounslow Homes of doing too little to publicise the meeting, with local councillors finding out just days beforehand and no notice given to the press.
Sandra Middleton, chairman of Brabazon Estate Tenants' and Residents' Association, which was formed as a result of the proposals, said she remained firmly opposed to the latest plans.
"They say they've made concessions but I can't see any. They're still planning to build on the big green, Johnson Road and De Havilland Road," she told the Chronicle.
"Hounslow Homes put notices through people's letterboxes but I think they could have done more to publicise the meeting.
"They also refused to give a presentation about the proposals, so I'm organising another meeting to give them a chance to explain the plans to residents."
Mrs Middleton added that she had already collected 100 signatures on a petition against the latest proposals.
Councillor Elizabeth Hughes added: "They only told the council-lors about Saturday's meeting three days beforehand and I think a lot of people weren't invited who maybe should have been."
A spokeswoman for Hounslow Homes confirmed there was a 'reduced' proposal for development on the main green, but claimed the total number of new homes across the estate was likely to be well under 100.
Plans for a block of flats had been moved from the green to Cranford Lane, as suggested by residents.
She added that Hounslow Homes took residents' concerns 'very seriously' and planned to set up working group to discuss the latest proposals.